53 	struct zx_gpio *chip = to_zx(gc);  in zx_direction_input()  local
60 	spin_lock_irqsave(&chip->lock, flags);  in zx_direction_input()
61 	gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);  in zx_direction_input()
63 	writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);  in zx_direction_input()
64 	spin_unlock_irqrestore(&chip->lock, flags);  in zx_direction_input()
72 	struct zx_gpio *chip = to_zx(gc);  in zx_direction_output()  local
79 	spin_lock_irqsave(&chip->lock, flags);  in zx_direction_output()
80 	gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);  in zx_direction_output()
82 	writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);  in zx_direction_output()
85 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);  in zx_direction_output()
87 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);  in zx_direction_output()
88 	spin_unlock_irqrestore(&chip->lock, flags);  in zx_direction_output()
95 	struct zx_gpio *chip = to_zx(gc);  in zx_get_value()  local
97 	return !!(readw_relaxed(chip->base + ZX_GPIO_DI) & BIT(offset));  in zx_get_value()
102 	struct zx_gpio *chip = to_zx(gc);  in zx_set_value()  local
105 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);  in zx_set_value()
107 		writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);  in zx_set_value()
113 	struct zx_gpio *chip = to_zx(gc);  in zx_irq_type()  local
122 	spin_lock_irqsave(&chip->lock, flags);  in zx_irq_type()
124 	gpioiev = readw_relaxed(chip->base + ZX_GPIO_IV);  in zx_irq_type()
125 	gpiois = readw_relaxed(chip->base + ZX_GPIO_IVE);  in zx_irq_type()
126 	gpioi_epos = readw_relaxed(chip->base + ZX_GPIO_IEP);  in zx_irq_type()
127 	gpioi_eneg = readw_relaxed(chip->base + ZX_GPIO_IEN);  in zx_irq_type()
151 	writew_relaxed(gpiois, chip->base + ZX_GPIO_IVE);  in zx_irq_type()
152 	writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP);  in zx_irq_type()
153 	writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN);  in zx_irq_type()
154 	writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV);  in zx_irq_type()
155 	spin_unlock_irqrestore(&chip->lock, flags);  in zx_irq_type()
165 	struct zx_gpio *chip = to_zx(gc);  in zx_irq_handler()  local
170 	pending = readw_relaxed(chip->base + ZX_GPIO_MIS);  in zx_irq_handler()
171 	writew_relaxed(pending, chip->base + ZX_GPIO_IC);  in zx_irq_handler()
184 	struct zx_gpio *chip = to_zx(gc);  in zx_irq_mask()  local
188 	spin_lock(&chip->lock);  in zx_irq_mask()
189 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) | mask;  in zx_irq_mask()
190 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);  in zx_irq_mask()
191 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) & ~mask;  in zx_irq_mask()
192 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);  in zx_irq_mask()
193 	spin_unlock(&chip->lock);  in zx_irq_mask()
199 	struct zx_gpio *chip = to_zx(gc);  in zx_irq_unmask()  local
203 	spin_lock(&chip->lock);  in zx_irq_unmask()
204 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) & ~mask;  in zx_irq_unmask()
205 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);  in zx_irq_unmask()
206 	gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) | mask;  in zx_irq_unmask()
207 	writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);  in zx_irq_unmask()
208 	spin_unlock(&chip->lock);  in zx_irq_unmask()
221 	struct zx_gpio *chip;  in zx_gpio_probe()  local
225 	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);  in zx_gpio_probe()
226 	if (!chip)  in zx_gpio_probe()
230 	chip->base = devm_ioremap_resource(dev, res);  in zx_gpio_probe()
231 	if (IS_ERR(chip->base))  in zx_gpio_probe()
232 		return PTR_ERR(chip->base);  in zx_gpio_probe()
234 	spin_lock_init(&chip->lock);  in zx_gpio_probe()
236 		chip->gc.request = gpiochip_generic_request;  in zx_gpio_probe()
237 		chip->gc.free = gpiochip_generic_free;  in zx_gpio_probe()
241 	chip->gc.direction_input = zx_direction_input;  in zx_gpio_probe()
242 	chip->gc.direction_output = zx_direction_output;  in zx_gpio_probe()
243 	chip->gc.get = zx_get_value;  in zx_gpio_probe()
244 	chip->gc.set = zx_set_value;  in zx_gpio_probe()
245 	chip->gc.base = ZX_GPIO_NR * id;  in zx_gpio_probe()
246 	chip->gc.ngpio = ZX_GPIO_NR;  in zx_gpio_probe()
247 	chip->gc.label = dev_name(dev);  in zx_gpio_probe()
248 	chip->gc.dev = dev;  in zx_gpio_probe()
249 	chip->gc.owner = THIS_MODULE;  in zx_gpio_probe()
251 	ret = gpiochip_add(&chip->gc);  in zx_gpio_probe()
258 	writew_relaxed(0xffff, chip->base + ZX_GPIO_IM);  in zx_gpio_probe()
259 	writew_relaxed(0, chip->base + ZX_GPIO_IE);  in zx_gpio_probe()
263 		gpiochip_remove(&chip->gc);  in zx_gpio_probe()
267 	ret = gpiochip_irqchip_add(&chip->gc, &zx_irqchip,  in zx_gpio_probe()
272 		gpiochip_remove(&chip->gc);  in zx_gpio_probe()
275 	gpiochip_set_chained_irqchip(&chip->gc, &zx_irqchip,  in zx_gpio_probe()
278 	platform_set_drvdata(pdev, chip);  in zx_gpio_probe()