113 static inline unsigned long ti_qspi_read(struct ti_qspi *qspi,  in ti_qspi_read()  argument
116 	return readl(qspi->base + reg);  in ti_qspi_read()
119 static inline void ti_qspi_write(struct ti_qspi *qspi,  in ti_qspi_write()  argument
122 	writel(val, qspi->base + reg);  in ti_qspi_write()
127 	struct ti_qspi	*qspi = spi_master_get_devdata(spi->master);  in ti_qspi_setup()  local
128 	struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg;  in ti_qspi_setup()
133 		dev_dbg(qspi->dev, "master busy doing other trasnfers\n");  in ti_qspi_setup()
137 	if (!qspi->spi_max_frequency) {  in ti_qspi_setup()
138 		dev_err(qspi->dev, "spi max frequency not defined\n");  in ti_qspi_setup()
142 	clk_rate = clk_get_rate(qspi->fclk);  in ti_qspi_setup()
144 	clk_div = DIV_ROUND_UP(clk_rate, qspi->spi_max_frequency) - 1;  in ti_qspi_setup()
147 		dev_dbg(qspi->dev, "clock divider < 0, using /1 divider\n");  in ti_qspi_setup()
152 		dev_dbg(qspi->dev, "clock divider >%d , using /%d divider\n",  in ti_qspi_setup()
157 	dev_dbg(qspi->dev, "hz: %d, clock divider %d\n",  in ti_qspi_setup()
158 			qspi->spi_max_frequency, clk_div);  in ti_qspi_setup()
160 	ret = pm_runtime_get_sync(qspi->dev);  in ti_qspi_setup()
162 		dev_err(qspi->dev, "pm_runtime_get_sync() failed\n");  in ti_qspi_setup()
166 	clk_ctrl_reg = ti_qspi_read(qspi, QSPI_SPI_CLOCK_CNTRL_REG);  in ti_qspi_setup()
171 	ti_qspi_write(qspi, clk_ctrl_reg, QSPI_SPI_CLOCK_CNTRL_REG);  in ti_qspi_setup()
175 	ti_qspi_write(qspi, clk_mask, QSPI_SPI_CLOCK_CNTRL_REG);  in ti_qspi_setup()
178 	pm_runtime_mark_last_busy(qspi->dev);  in ti_qspi_setup()
179 	ret = pm_runtime_put_autosuspend(qspi->dev);  in ti_qspi_setup()
181 		dev_err(qspi->dev, "pm_runtime_put_autosuspend() failed\n");  in ti_qspi_setup()
188 static void ti_qspi_restore_ctx(struct ti_qspi *qspi)  in ti_qspi_restore_ctx()  argument
190 	struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg;  in ti_qspi_restore_ctx()
192 	ti_qspi_write(qspi, ctx_reg->clkctrl, QSPI_SPI_CLOCK_CNTRL_REG);  in ti_qspi_restore_ctx()
195 static inline u32 qspi_is_busy(struct ti_qspi *qspi)  in qspi_is_busy()  argument
200 	stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);  in qspi_is_busy()
203 		stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);  in qspi_is_busy()
210 static inline int ti_qspi_poll_wc(struct ti_qspi *qspi)  in ti_qspi_poll_wc()  argument
216 		stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);  in ti_qspi_poll_wc()
222 	stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);  in ti_qspi_poll_wc()
228 static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t,  in qspi_write_msg()  argument
237 	cmd = qspi->cmd | QSPI_WR_SNGL;  in qspi_write_msg()
242 		if (qspi_is_busy(qspi))  in qspi_write_msg()
247 			dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %02x\n",  in qspi_write_msg()
248 					cmd, qspi->dc, *txbuf);  in qspi_write_msg()
253 				writel(data, qspi->base +  in qspi_write_msg()
256 				writel(data, qspi->base +  in qspi_write_msg()
259 				writel(data, qspi->base +  in qspi_write_msg()
262 				writel(data, qspi->base +  in qspi_write_msg()
267 				writeb(*txbuf, qspi->base + QSPI_SPI_DATA_REG);  in qspi_write_msg()
268 				cmd = qspi->cmd | QSPI_WR_SNGL;  in qspi_write_msg()
274 			dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %04x\n",  in qspi_write_msg()
275 					cmd, qspi->dc, *txbuf);  in qspi_write_msg()
276 			writew(*((u16 *)txbuf), qspi->base + QSPI_SPI_DATA_REG);  in qspi_write_msg()
279 			dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %08x\n",  in qspi_write_msg()
280 					cmd, qspi->dc, *txbuf);  in qspi_write_msg()
281 			writel(*((u32 *)txbuf), qspi->base + QSPI_SPI_DATA_REG);  in qspi_write_msg()
285 		ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG);  in qspi_write_msg()
286 		if (ti_qspi_poll_wc(qspi)) {  in qspi_write_msg()
287 			dev_err(qspi->dev, "write timed out\n");  in qspi_write_msg()
297 static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t,  in qspi_read_msg()  argument
305 	cmd = qspi->cmd;  in qspi_read_msg()
320 		dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", cmd, qspi->dc);  in qspi_read_msg()
321 		if (qspi_is_busy(qspi))  in qspi_read_msg()
324 		ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG);  in qspi_read_msg()
325 		if (ti_qspi_poll_wc(qspi)) {  in qspi_read_msg()
326 			dev_err(qspi->dev, "read timed out\n");  in qspi_read_msg()
331 			*rxbuf = readb(qspi->base + QSPI_SPI_DATA_REG);  in qspi_read_msg()
334 			*((u16 *)rxbuf) = readw(qspi->base + QSPI_SPI_DATA_REG);  in qspi_read_msg()
337 			*((u32 *)rxbuf) = readl(qspi->base + QSPI_SPI_DATA_REG);  in qspi_read_msg()
347 static int qspi_transfer_msg(struct ti_qspi *qspi, struct spi_transfer *t,  in qspi_transfer_msg()  argument
353 		ret = qspi_write_msg(qspi, t, count);  in qspi_transfer_msg()
355 			dev_dbg(qspi->dev, "Error while writing\n");  in qspi_transfer_msg()
361 		ret = qspi_read_msg(qspi, t, count);  in qspi_transfer_msg()
363 			dev_dbg(qspi->dev, "Error while reading\n");  in qspi_transfer_msg()
374 	struct ti_qspi *qspi = spi_master_get_devdata(master);  in ti_qspi_start_transfer_one()  local
382 	qspi->dc = 0;  in ti_qspi_start_transfer_one()
385 		qspi->dc |= QSPI_CKPHA(spi->chip_select);  in ti_qspi_start_transfer_one()
387 		qspi->dc |= QSPI_CKPOL(spi->chip_select);  in ti_qspi_start_transfer_one()
389 		qspi->dc |= QSPI_CSPOL(spi->chip_select);  in ti_qspi_start_transfer_one()
397 	qspi->cmd = 0;  in ti_qspi_start_transfer_one()
398 	qspi->cmd |= QSPI_EN_CS(spi->chip_select);  in ti_qspi_start_transfer_one()
399 	qspi->cmd |= QSPI_FLEN(frame_len_words);  in ti_qspi_start_transfer_one()
401 	ti_qspi_write(qspi, qspi->dc, QSPI_SPI_DC_REG);  in ti_qspi_start_transfer_one()
403 	mutex_lock(&qspi->list_lock);  in ti_qspi_start_transfer_one()
406 		qspi->cmd = ((qspi->cmd & ~QSPI_WLEN_MASK) |  in ti_qspi_start_transfer_one()
412 		ret = qspi_transfer_msg(qspi, t, transfer_len_words * wlen);  in ti_qspi_start_transfer_one()
414 			dev_dbg(qspi->dev, "transfer message failed\n");  in ti_qspi_start_transfer_one()
415 			mutex_unlock(&qspi->list_lock);  in ti_qspi_start_transfer_one()
425 	mutex_unlock(&qspi->list_lock);  in ti_qspi_start_transfer_one()
427 	ti_qspi_write(qspi, qspi->cmd | QSPI_INVAL, QSPI_SPI_CMD_REG);  in ti_qspi_start_transfer_one()
436 	struct ti_qspi      *qspi;  in ti_qspi_runtime_resume()  local
438 	qspi = dev_get_drvdata(dev);  in ti_qspi_runtime_resume()
439 	ti_qspi_restore_ctx(qspi);  in ti_qspi_runtime_resume()
453 	struct  ti_qspi *qspi;  in ti_qspi_probe()  local
460 	master = spi_alloc_master(&pdev->dev, sizeof(*qspi));  in ti_qspi_probe()
477 	qspi = spi_master_get_devdata(master);  in ti_qspi_probe()
478 	qspi->master = master;  in ti_qspi_probe()
479 	qspi->dev = &pdev->dev;  in ti_qspi_probe()
480 	platform_set_drvdata(pdev, qspi);  in ti_qspi_probe()
517 	mutex_init(&qspi->list_lock);  in ti_qspi_probe()
519 	qspi->base = devm_ioremap_resource(&pdev->dev, r);  in ti_qspi_probe()
520 	if (IS_ERR(qspi->base)) {  in ti_qspi_probe()
521 		ret = PTR_ERR(qspi->base);  in ti_qspi_probe()
526 		qspi->ctrl_mod = true;  in ti_qspi_probe()
527 		qspi->ctrl_base = devm_ioremap_resource(&pdev->dev, res_ctrl);  in ti_qspi_probe()
528 		if (IS_ERR(qspi->ctrl_base)) {  in ti_qspi_probe()
529 			ret = PTR_ERR(qspi->ctrl_base);  in ti_qspi_probe()
535 		qspi->mmap_base = devm_ioremap_resource(&pdev->dev, res_mmap);  in ti_qspi_probe()
536 		if (IS_ERR(qspi->mmap_base)) {  in ti_qspi_probe()
537 			ret = PTR_ERR(qspi->mmap_base);  in ti_qspi_probe()
542 	qspi->fclk = devm_clk_get(&pdev->dev, "fck");  in ti_qspi_probe()
543 	if (IS_ERR(qspi->fclk)) {  in ti_qspi_probe()
544 		ret = PTR_ERR(qspi->fclk);  in ti_qspi_probe()
553 		qspi->spi_max_frequency = max_freq;  in ti_qspi_probe()