Lines Matching refs:mcasp_clr_bits

121 static inline void mcasp_clr_bits(struct davinci_mcasp *mcasp, u32 offset,  in mcasp_clr_bits()  function
176 mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); in mcasp_start_rx()
214 mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); in mcasp_start_tx()
253 mcasp_clr_bits(mcasp, DAVINCI_MCASP_EVTCTLR_REG, in mcasp_stop_rx()
269 mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); in mcasp_stop_rx()
278 mcasp_clr_bits(mcasp, DAVINCI_MCASP_EVTCTLX_REG, in mcasp_stop_tx()
294 mcasp_clr_bits(mcasp, reg, FIFO_ENABLE); in mcasp_stop_tx()
404 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); in davinci_mcasp_set_dai_fmt()
405 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); in davinci_mcasp_set_dai_fmt()
411 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); in davinci_mcasp_set_dai_fmt()
412 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); in davinci_mcasp_set_dai_fmt()
458 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); in davinci_mcasp_set_dai_fmt()
461 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); in davinci_mcasp_set_dai_fmt()
464 mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AFSX | AFSR); in davinci_mcasp_set_dai_fmt()
469 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); in davinci_mcasp_set_dai_fmt()
472 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); in davinci_mcasp_set_dai_fmt()
475 mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, ACLKX | ACLKR); in davinci_mcasp_set_dai_fmt()
481 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); in davinci_mcasp_set_dai_fmt()
482 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); in davinci_mcasp_set_dai_fmt()
484 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); in davinci_mcasp_set_dai_fmt()
485 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE); in davinci_mcasp_set_dai_fmt()
487 mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, in davinci_mcasp_set_dai_fmt()
498 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); in davinci_mcasp_set_dai_fmt()
499 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); in davinci_mcasp_set_dai_fmt()
508 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); in davinci_mcasp_set_dai_fmt()
509 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); in davinci_mcasp_set_dai_fmt()
526 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); in davinci_mcasp_set_dai_fmt()
527 mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); in davinci_mcasp_set_dai_fmt()
602 mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); in davinci_mcasp_set_sysclk()
603 mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); in davinci_mcasp_set_sysclk()
604 mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX); in davinci_mcasp_set_sysclk()
766 mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); in mcasp_common_hw_param()
769 mcasp_clr_bits(mcasp, DAVINCI_MCASP_REVTCTL_REG, RXDATADMADIS); in mcasp_common_hw_param()
783 mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AXR(i)); in mcasp_common_hw_param()
896 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); in mcasp_i2s_hw_param()
944 mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); in mcasp_dit_hw_param()