Searched refs:TIMER_CTL_REG (Results 1 – 2 of 2) sorted by relevance
30 #define TIMER_CTL_REG(val) (0x10 * val + 0x10) macro61 u32 val = readl(timer_base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()62 writel(val & ~TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()73 u32 val = readl(timer_base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start()81 timer_base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start()174 timer_base + TIMER_CTL_REG(1)); in sun4i_timer_init()191 timer_base + TIMER_CTL_REG(0)); in sun4i_timer_init()
28 #define TIMER_CTL_REG(val) (0x20 * (val) + 0x10) macro82 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()83 writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()95 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_start()103 ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_start()218 base + TIMER_CTL_REG(1)); in sun5i_setup_clocksource()