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Searched refs:WREG32_SMC (Results 1 – 10 of 10) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Dtrinity_smc.c67 WREG32_SMC(SMU_SCRATCH0, 1); in trinity_dpm_config()
69 WREG32_SMC(SMU_SCRATCH0, 0); in trinity_dpm_config()
76 WREG32_SMC(SMU_SCRATCH0, n); in trinity_dpm_force_state()
83 WREG32_SMC(SMU_SCRATCH0, n); in trinity_dpm_n_levels_disabled()
Dtrinity_dpm.c381 WREG32_SMC(GFX_POWER_GATING_CNTL, value); in trinity_gfx_powergating_initialize()
505 WREG32_SMC(SMU_SCRATCH_A, (RREG32_SMC(SMU_SCRATCH_A) | 0x01)); in trinity_gfx_powergating_enable()
523 WREG32_SMC(PM_I_CNTL_1, value); in trinity_gfx_dynamic_mgpg_enable()
528 WREG32_SMC(SMU_S_PG_CNTL, value); in trinity_gfx_dynamic_mgpg_enable()
532 WREG32_SMC(SMU_S_PG_CNTL, value); in trinity_gfx_dynamic_mgpg_enable()
536 WREG32_SMC(PM_I_CNTL_1, value); in trinity_gfx_dynamic_mgpg_enable()
597 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_set_divider_value()
607 WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value); in trinity_set_divider_value()
619 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value); in trinity_set_ds_dividers()
631 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value); in trinity_set_ss_dividers()
[all …]
Dci_smc.c119 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in ci_start_smc()
127 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in ci_reset_smc()
143 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in ci_stop_smc_clock()
152 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in ci_start_smc_clock()
Dsi_smc.c119 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in si_start_smc()
133 WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp); in si_reset_smc()
149 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in si_stop_smc_clock()
158 WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp); in si_start_smc_clock()
Dci_dpm.c597 WREG32_SMC(config_regs->offset, data); in ci_program_pt_config_registers()
881 WREG32_SMC(CG_THERMAL_INT, tmp); in ci_thermal_set_temperature_range()
888 WREG32_SMC(CG_THERMAL_CTRL, tmp); in ci_thermal_set_temperature_range()
905 WREG32_SMC(CG_THERMAL_INT, thermal_int); in ci_thermal_enable_alert()
914 WREG32_SMC(CG_THERMAL_INT, thermal_int); in ci_thermal_enable_alert()
941 WREG32_SMC(CG_FDO_CTRL2, tmp); in ci_fan_ctrl_set_static_mode()
945 WREG32_SMC(CG_FDO_CTRL2, tmp); in ci_fan_ctrl_set_static_mode()
1119 WREG32_SMC(CG_FDO_CTRL0, tmp); in ci_fan_ctrl_set_fan_speed_percent()
1196 WREG32_SMC(CG_TACH_CTRL, tmp);
1212 WREG32_SMC(CG_FDO_CTRL2, tmp); in ci_fan_ctrl_set_default_mode()
[all …]
Dkv_dpm.c275 WREG32_SMC(local_cac_reg->cntl, data);
315 WREG32_SMC(config_regs->offset, data); in kv_program_pt_config_registers()
406 WREG32_SMC(LCAC_SX0_OVR_SEL, 0);
407 WREG32_SMC(LCAC_SX0_OVR_VAL, 0);
410 WREG32_SMC(LCAC_MC0_OVR_SEL, 0);
411 WREG32_SMC(LCAC_MC0_OVR_VAL, 0);
414 WREG32_SMC(LCAC_MC1_OVR_SEL, 0);
415 WREG32_SMC(LCAC_MC1_OVR_VAL, 0);
418 WREG32_SMC(LCAC_MC2_OVR_SEL, 0);
419 WREG32_SMC(LCAC_MC2_OVR_VAL, 0);
[all …]
Dcik.c9701 WREG32_SMC(cntl_reg, tmp); in cik_set_uvd_clock()
9748 WREG32_SMC(CG_ECLK_CNTL, tmp); in cik_set_vce_clocks()
10021 WREG32_SMC(THM_CLK_CNTL, data); in cik_program_aspm()
10027 WREG32_SMC(MISC_CLK_CTRL, data); in cik_program_aspm()
10032 WREG32_SMC(CG_CLKPIN_CNTL, data); in cik_program_aspm()
10037 WREG32_SMC(CG_CLKPIN_CNTL_2, data); in cik_program_aspm()
10043 WREG32_SMC(MPLL_BYPASSCLK_SEL, data); in cik_program_aspm()
Dsi.c5450 WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_0, 0); in si_enable_uvd_mgcg()
5451 WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_1, 0); in si_enable_uvd_mgcg()
5462 WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_0, 0xffffffff); in si_enable_uvd_mgcg()
5463 WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_1, 0xffffffff); in si_enable_uvd_mgcg()
Dradeon.h2555 #define WREG32_SMC(reg, v) tn_smc_wreg(rdev, (reg), (v)) macro
Dsi_dpm.c2762 WREG32_SMC(offset, data); in si_program_cac_config_registers()