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Searched refs:speed_cntl (Results 1 – 7 of 7) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Drv770.c1975 u32 link_width_cntl, lanes, speed_cntl, tmp; in rv770_pcie_gen2_enable() local
2014 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in rv770_pcie_gen2_enable()
2015 if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) && in rv770_pcie_gen2_enable()
2016 (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) { in rv770_pcie_gen2_enable()
2027 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in rv770_pcie_gen2_enable()
2028 speed_cntl &= ~LC_TARGET_LINK_SPEED_OVERRIDE_EN; in rv770_pcie_gen2_enable()
2029 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl); in rv770_pcie_gen2_enable()
2031 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in rv770_pcie_gen2_enable()
2032 speed_cntl |= LC_CLR_FAILED_SPD_CHANGE_CNT; in rv770_pcie_gen2_enable()
2033 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl); in rv770_pcie_gen2_enable()
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Dr600.c4397 u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; in r600_pcie_gen2_enable() local
4421 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in r600_pcie_gen2_enable()
4422 if (speed_cntl & LC_CURRENT_DATA_RATE) { in r600_pcie_gen2_enable()
4450 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in r600_pcie_gen2_enable()
4451 if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) && in r600_pcie_gen2_enable()
4452 (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) { in r600_pcie_gen2_enable()
4466 speed_cntl &= ~LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_MASK; in r600_pcie_gen2_enable()
4467 speed_cntl |= (0x3 << LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_SHIFT); in r600_pcie_gen2_enable()
4468 speed_cntl &= ~LC_VOLTAGE_TIMER_SEL_MASK; in r600_pcie_gen2_enable()
4469 speed_cntl &= ~LC_FORCE_DIS_HW_SPEED_CHANGE; in r600_pcie_gen2_enable()
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Devergreen.c5819 u32 link_width_cntl, speed_cntl; in evergreen_pcie_gen2_enable() local
5838 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in evergreen_pcie_gen2_enable()
5839 if (speed_cntl & LC_CURRENT_DATA_RATE) { in evergreen_pcie_gen2_enable()
5846 if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) || in evergreen_pcie_gen2_enable()
5847 (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) { in evergreen_pcie_gen2_enable()
5853 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in evergreen_pcie_gen2_enable()
5854 speed_cntl &= ~LC_TARGET_LINK_SPEED_OVERRIDE_EN; in evergreen_pcie_gen2_enable()
5855 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl); in evergreen_pcie_gen2_enable()
5857 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in evergreen_pcie_gen2_enable()
5858 speed_cntl |= LC_CLR_FAILED_SPD_CHANGE_CNT; in evergreen_pcie_gen2_enable()
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Dsi.c7366 u32 speed_cntl, mask, current_data_rate; in si_pcie_gen3_enable() local
7389 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in si_pcie_gen3_enable()
7390 current_data_rate = (speed_cntl & LC_CURRENT_DATA_RATE_MASK) >> in si_pcie_gen3_enable()
7496 speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE; in si_pcie_gen3_enable()
7497 speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE; in si_pcie_gen3_enable()
7498 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl); in si_pcie_gen3_enable()
7510 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in si_pcie_gen3_enable()
7511 speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE; in si_pcie_gen3_enable()
7512 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl); in si_pcie_gen3_enable()
7515 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in si_pcie_gen3_enable()
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Dcik.c9765 u32 speed_cntl, mask, current_data_rate; in cik_pcie_gen3_enable() local
9788 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in cik_pcie_gen3_enable()
9789 current_data_rate = (speed_cntl & LC_CURRENT_DATA_RATE_MASK) >> in cik_pcie_gen3_enable()
9895 speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE; in cik_pcie_gen3_enable()
9896 speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE; in cik_pcie_gen3_enable()
9897 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl); in cik_pcie_gen3_enable()
9909 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in cik_pcie_gen3_enable()
9910 speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE; in cik_pcie_gen3_enable()
9911 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl); in cik_pcie_gen3_enable()
9914 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); in cik_pcie_gen3_enable()
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Dsi_dpm.c5674 u32 speed_cntl; in si_get_current_pcie_speed() local
5676 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL) & LC_CURRENT_DATA_RATE_MASK; in si_get_current_pcie_speed()
5677 speed_cntl >>= LC_CURRENT_DATA_RATE_SHIFT; in si_get_current_pcie_speed()
5679 return (u16)speed_cntl; in si_get_current_pcie_speed()
Dci_dpm.c4782 u32 speed_cntl = 0; in ci_get_current_pcie_speed() local
4784 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL) & LC_CURRENT_DATA_RATE_MASK; in ci_get_current_pcie_speed()
4785 speed_cntl >>= LC_CURRENT_DATA_RATE_SHIFT; in ci_get_current_pcie_speed()
4787 return (u16)speed_cntl; in ci_get_current_pcie_speed()