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Searched refs:TEGRA124_CLK_PLL_P (Results 1 – 14 of 14) sorted by relevance

/linux-4.4.14/drivers/clk/tegra/
Dclk-tegra124.c888 [tegra_clk_pll_p] = { .dt_id = TEGRA124_CLK_PLL_P, .present = true },
965 { .con_id = "pll_p", .dt_id = TEGRA124_CLK_PLL_P },
1363 {TEGRA124_CLK_UARTA, TEGRA124_CLK_PLL_P, 408000000, 0},
1364 {TEGRA124_CLK_UARTB, TEGRA124_CLK_PLL_P, 408000000, 0},
1365 {TEGRA124_CLK_UARTC, TEGRA124_CLK_PLL_P, 408000000, 0},
1366 {TEGRA124_CLK_UARTD, TEGRA124_CLK_PLL_P, 408000000, 0},
1377 {TEGRA124_CLK_VDE, TEGRA124_CLK_PLL_P, 0, 0},
1378 {TEGRA124_CLK_HOST1X, TEGRA124_CLK_PLL_P, 136000000, 1},
1379 {TEGRA124_CLK_DSIALP, TEGRA124_CLK_PLL_P, 68000000, 0},
1380 {TEGRA124_CLK_DSIBLP, TEGRA124_CLK_PLL_P, 68000000, 0},
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dnvidia,tegra124-car.txt96 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
102 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
/linux-4.4.14/Documentation/devicetree/bindings/cpufreq/
Dtegra124-cpufreq.txt36 <&tegra_car TEGRA124_CLK_PLL_P>,
/linux-4.4.14/include/dt-bindings/clock/
Dtegra124-car-common.h236 #define TEGRA124_CLK_PLL_P 211 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dtegra124-car-common.h236 #define TEGRA124_CLK_PLL_P 211 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dtegra124-car-common.h236 #define TEGRA124_CLK_PLL_P 211 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dtegra124-car-common.h236 #define TEGRA124_CLK_PLL_P 211 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dtegra124-car-common.h236 #define TEGRA124_CLK_PLL_P 211 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dtegra124-car-common.h236 #define TEGRA124_CLK_PLL_P 211 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dtegra124-car-common.h236 #define TEGRA124_CLK_PLL_P 211 macro
/linux-4.4.14/arch/arm/boot/dts/
Dtegra124-nyan-blaze-emc.dtsi9 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
15 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
21 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
27 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
33 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
39 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
Dtegra124-nyan-big-emc.dtsi9 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
15 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
21 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
27 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
33 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
39 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
Dtegra124-jetson-tk1-emc.dtsi9 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
15 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
21 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
27 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
33 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
39 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
Dtegra124.dtsi103 <&tegra_car TEGRA124_CLK_PLL_P>;
118 <&tegra_car TEGRA124_CLK_PLL_P>;
954 <&tegra_car TEGRA124_CLK_PLL_P>,