1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/device.h>
11 #include <linux/etherdevice.h>
12 #include <linux/export.h>
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/mtd/physmap.h>
17 #include <linux/spi/spi.h>
18 #include <linux/spi/flash.h>
19 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
20 #include <linux/usb/isp1362.h>
21 #endif
22 #include <linux/ata_platform.h>
23 #include <linux/irq.h>
24 #include <linux/gpio.h>
25 #include <asm/dma.h>
26 #include <asm/bfin5xx_spi.h>
27 #include <asm/portmux.h>
28 #include <asm/dpmc.h>
29 #include <linux/spi/mmc_spi.h>
30
31 /*
32 * Name the Board for the /proc/cpuinfo
33 */
34 const char bfin_board_name[] = "Bluetechnix CM BF537U";
35
36 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
37 /* all SPI peripherals info goes here */
38
39 #if IS_ENABLED(CONFIG_MTD_M25P80)
40 static struct mtd_partition bfin_spi_flash_partitions[] = {
41 {
42 .name = "bootloader(spi)",
43 .size = 0x00020000,
44 .offset = 0,
45 .mask_flags = MTD_CAP_ROM
46 }, {
47 .name = "linux kernel(spi)",
48 .size = 0xe0000,
49 .offset = 0x20000
50 }, {
51 .name = "file system(spi)",
52 .size = 0x700000,
53 .offset = 0x00100000,
54 }
55 };
56
57 static struct flash_platform_data bfin_spi_flash_data = {
58 .name = "m25p80",
59 .parts = bfin_spi_flash_partitions,
60 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
61 .type = "m25p64",
62 };
63
64 /* SPI flash chip (m25p64) */
65 static struct bfin5xx_spi_chip spi_flash_chip_info = {
66 .enable_dma = 0, /* use dma transfer with this chip*/
67 };
68 #endif
69
70 #if IS_ENABLED(CONFIG_MMC_SPI)
71 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
72 .enable_dma = 0,
73 };
74 #endif
75
76 static struct spi_board_info bfin_spi_board_info[] __initdata = {
77 #if IS_ENABLED(CONFIG_MTD_M25P80)
78 {
79 /* the modalias must be the same as spi device driver name */
80 .modalias = "m25p80", /* Name of spi_driver for this device */
81 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
82 .bus_num = 0, /* Framework bus number */
83 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
84 .platform_data = &bfin_spi_flash_data,
85 .controller_data = &spi_flash_chip_info,
86 .mode = SPI_MODE_3,
87 },
88 #endif
89
90 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
91 {
92 .modalias = "ad183x",
93 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
94 .bus_num = 0,
95 .chip_select = 4,
96 },
97 #endif
98
99 #if IS_ENABLED(CONFIG_MMC_SPI)
100 {
101 .modalias = "mmc_spi",
102 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
103 .bus_num = 0,
104 .chip_select = 1,
105 .controller_data = &mmc_spi_chip_info,
106 .mode = SPI_MODE_3,
107 },
108 #endif
109 };
110
111 /* SPI (0) */
112 static struct resource bfin_spi0_resource[] = {
113 [0] = {
114 .start = SPI0_REGBASE,
115 .end = SPI0_REGBASE + 0xFF,
116 .flags = IORESOURCE_MEM,
117 },
118 [1] = {
119 .start = CH_SPI,
120 .end = CH_SPI,
121 .flags = IORESOURCE_DMA,
122 },
123 [2] = {
124 .start = IRQ_SPI,
125 .end = IRQ_SPI,
126 .flags = IORESOURCE_IRQ,
127 },
128 };
129
130 /* SPI controller data */
131 static struct bfin5xx_spi_master bfin_spi0_info = {
132 .num_chipselect = 8,
133 .enable_dma = 1, /* master has the ability to do dma transfer */
134 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
135 };
136
137 static struct platform_device bfin_spi0_device = {
138 .name = "bfin-spi",
139 .id = 0, /* Bus number */
140 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
141 .resource = bfin_spi0_resource,
142 .dev = {
143 .platform_data = &bfin_spi0_info, /* Passed to driver */
144 },
145 };
146 #endif /* spi master and devices */
147
148 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
149 static struct platform_device rtc_device = {
150 .name = "rtc-bfin",
151 .id = -1,
152 };
153 #endif
154
155 #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
156 static struct platform_device hitachi_fb_device = {
157 .name = "hitachi-tx09",
158 };
159 #endif
160
161 #if IS_ENABLED(CONFIG_SMC91X)
162 #include <linux/smc91x.h>
163
164 static struct smc91x_platdata smc91x_info = {
165 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
166 .leda = RPC_LED_100_10,
167 .ledb = RPC_LED_TX_RX,
168 };
169
170 static struct resource smc91x_resources[] = {
171 {
172 .start = 0x20200300,
173 .end = 0x20200300 + 16,
174 .flags = IORESOURCE_MEM,
175 }, {
176 .start = IRQ_PF14,
177 .end = IRQ_PF14,
178 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
179 },
180 };
181
182 static struct platform_device smc91x_device = {
183 .name = "smc91x",
184 .id = 0,
185 .num_resources = ARRAY_SIZE(smc91x_resources),
186 .resource = smc91x_resources,
187 .dev = {
188 .platform_data = &smc91x_info,
189 },
190 };
191 #endif
192
193 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
194 static struct resource isp1362_hcd_resources[] = {
195 {
196 .start = 0x20308000,
197 .end = 0x20308000,
198 .flags = IORESOURCE_MEM,
199 }, {
200 .start = 0x20308004,
201 .end = 0x20308004,
202 .flags = IORESOURCE_MEM,
203 }, {
204 .start = IRQ_PG15,
205 .end = IRQ_PG15,
206 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
207 },
208 };
209
210 static struct isp1362_platform_data isp1362_priv = {
211 .sel15Kres = 1,
212 .clknotstop = 0,
213 .oc_enable = 0,
214 .int_act_high = 0,
215 .int_edge_triggered = 0,
216 .remote_wakeup_connected = 0,
217 .no_power_switching = 1,
218 .power_switching_mode = 0,
219 };
220
221 static struct platform_device isp1362_hcd_device = {
222 .name = "isp1362-hcd",
223 .id = 0,
224 .dev = {
225 .platform_data = &isp1362_priv,
226 },
227 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
228 .resource = isp1362_hcd_resources,
229 };
230 #endif
231
232 #if IS_ENABLED(CONFIG_USB_NET2272)
233 static struct resource net2272_bfin_resources[] = {
234 {
235 .start = 0x20200000,
236 .end = 0x20200000 + 0x100,
237 .flags = IORESOURCE_MEM,
238 }, {
239 .start = IRQ_PH14,
240 .end = IRQ_PH14,
241 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
242 },
243 };
244
245 static struct platform_device net2272_bfin_device = {
246 .name = "net2272",
247 .id = -1,
248 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
249 .resource = net2272_bfin_resources,
250 };
251 #endif
252
253 #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
254 static struct mtd_partition cm_partitions[] = {
255 {
256 .name = "bootloader(nor)",
257 .size = 0x40000,
258 .offset = 0,
259 }, {
260 .name = "linux kernel(nor)",
261 .size = 0x100000,
262 .offset = MTDPART_OFS_APPEND,
263 }, {
264 .name = "file system(nor)",
265 .size = MTDPART_SIZ_FULL,
266 .offset = MTDPART_OFS_APPEND,
267 }
268 };
269
270 static struct physmap_flash_data cm_flash_data = {
271 .width = 2,
272 .parts = cm_partitions,
273 .nr_parts = ARRAY_SIZE(cm_partitions),
274 };
275
276 static unsigned cm_flash_gpios[] = { GPIO_PH0 };
277
278 static struct resource cm_flash_resource[] = {
279 {
280 .name = "cfi_probe",
281 .start = 0x20000000,
282 .end = 0x201fffff,
283 .flags = IORESOURCE_MEM,
284 }, {
285 .start = (unsigned long)cm_flash_gpios,
286 .end = ARRAY_SIZE(cm_flash_gpios),
287 .flags = IORESOURCE_IRQ,
288 }
289 };
290
291 static struct platform_device cm_flash_device = {
292 .name = "gpio-addr-flash",
293 .id = 0,
294 .dev = {
295 .platform_data = &cm_flash_data,
296 },
297 .num_resources = ARRAY_SIZE(cm_flash_resource),
298 .resource = cm_flash_resource,
299 };
300 #endif
301
302 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
303 #ifdef CONFIG_SERIAL_BFIN_UART0
304 static struct resource bfin_uart0_resources[] = {
305 {
306 .start = UART0_THR,
307 .end = UART0_GCTL+2,
308 .flags = IORESOURCE_MEM,
309 },
310 {
311 .start = IRQ_UART0_TX,
312 .end = IRQ_UART0_TX,
313 .flags = IORESOURCE_IRQ,
314 },
315 {
316 .start = IRQ_UART0_RX,
317 .end = IRQ_UART0_RX,
318 .flags = IORESOURCE_IRQ,
319 },
320 {
321 .start = IRQ_UART0_ERROR,
322 .end = IRQ_UART0_ERROR,
323 .flags = IORESOURCE_IRQ,
324 },
325 {
326 .start = CH_UART0_TX,
327 .end = CH_UART0_TX,
328 .flags = IORESOURCE_DMA,
329 },
330 {
331 .start = CH_UART0_RX,
332 .end = CH_UART0_RX,
333 .flags = IORESOURCE_DMA,
334 },
335 };
336
337 static unsigned short bfin_uart0_peripherals[] = {
338 P_UART0_TX, P_UART0_RX, 0
339 };
340
341 static struct platform_device bfin_uart0_device = {
342 .name = "bfin-uart",
343 .id = 0,
344 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
345 .resource = bfin_uart0_resources,
346 .dev = {
347 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
348 },
349 };
350 #endif
351 #ifdef CONFIG_SERIAL_BFIN_UART1
352 static struct resource bfin_uart1_resources[] = {
353 {
354 .start = UART1_THR,
355 .end = UART1_GCTL+2,
356 .flags = IORESOURCE_MEM,
357 },
358 {
359 .start = IRQ_UART1_TX,
360 .end = IRQ_UART1_TX,
361 .flags = IORESOURCE_IRQ,
362 },
363 {
364 .start = IRQ_UART1_RX,
365 .end = IRQ_UART1_RX,
366 .flags = IORESOURCE_IRQ,
367 },
368 {
369 .start = IRQ_UART1_ERROR,
370 .end = IRQ_UART1_ERROR,
371 .flags = IORESOURCE_IRQ,
372 },
373 {
374 .start = CH_UART1_TX,
375 .end = CH_UART1_TX,
376 .flags = IORESOURCE_DMA,
377 },
378 {
379 .start = CH_UART1_RX,
380 .end = CH_UART1_RX,
381 .flags = IORESOURCE_DMA,
382 },
383 };
384
385 static unsigned short bfin_uart1_peripherals[] = {
386 P_UART1_TX, P_UART1_RX, 0
387 };
388
389 static struct platform_device bfin_uart1_device = {
390 .name = "bfin-uart",
391 .id = 1,
392 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
393 .resource = bfin_uart1_resources,
394 .dev = {
395 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
396 },
397 };
398 #endif
399 #endif
400
401 #if IS_ENABLED(CONFIG_BFIN_SIR)
402 #ifdef CONFIG_BFIN_SIR0
403 static struct resource bfin_sir0_resources[] = {
404 {
405 .start = 0xFFC00400,
406 .end = 0xFFC004FF,
407 .flags = IORESOURCE_MEM,
408 },
409 {
410 .start = IRQ_UART0_RX,
411 .end = IRQ_UART0_RX+1,
412 .flags = IORESOURCE_IRQ,
413 },
414 {
415 .start = CH_UART0_RX,
416 .end = CH_UART0_RX+1,
417 .flags = IORESOURCE_DMA,
418 },
419 };
420 static struct platform_device bfin_sir0_device = {
421 .name = "bfin_sir",
422 .id = 0,
423 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
424 .resource = bfin_sir0_resources,
425 };
426 #endif
427 #ifdef CONFIG_BFIN_SIR1
428 static struct resource bfin_sir1_resources[] = {
429 {
430 .start = 0xFFC02000,
431 .end = 0xFFC020FF,
432 .flags = IORESOURCE_MEM,
433 },
434 {
435 .start = IRQ_UART1_RX,
436 .end = IRQ_UART1_RX+1,
437 .flags = IORESOURCE_IRQ,
438 },
439 {
440 .start = CH_UART1_RX,
441 .end = CH_UART1_RX+1,
442 .flags = IORESOURCE_DMA,
443 },
444 };
445 static struct platform_device bfin_sir1_device = {
446 .name = "bfin_sir",
447 .id = 1,
448 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
449 .resource = bfin_sir1_resources,
450 };
451 #endif
452 #endif
453
454 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
455 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
456
457 static struct resource bfin_twi0_resource[] = {
458 [0] = {
459 .start = TWI0_REGBASE,
460 .end = TWI0_REGBASE,
461 .flags = IORESOURCE_MEM,
462 },
463 [1] = {
464 .start = IRQ_TWI,
465 .end = IRQ_TWI,
466 .flags = IORESOURCE_IRQ,
467 },
468 };
469
470 static struct platform_device i2c_bfin_twi_device = {
471 .name = "i2c-bfin-twi",
472 .id = 0,
473 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
474 .resource = bfin_twi0_resource,
475 .dev = {
476 .platform_data = &bfin_twi0_pins,
477 },
478 };
479 #endif
480
481 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
482 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
483 static struct resource bfin_sport0_uart_resources[] = {
484 {
485 .start = SPORT0_TCR1,
486 .end = SPORT0_MRCS3+4,
487 .flags = IORESOURCE_MEM,
488 },
489 {
490 .start = IRQ_SPORT0_RX,
491 .end = IRQ_SPORT0_RX+1,
492 .flags = IORESOURCE_IRQ,
493 },
494 {
495 .start = IRQ_SPORT0_ERROR,
496 .end = IRQ_SPORT0_ERROR,
497 .flags = IORESOURCE_IRQ,
498 },
499 };
500
501 static unsigned short bfin_sport0_peripherals[] = {
502 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
503 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
504 };
505
506 static struct platform_device bfin_sport0_uart_device = {
507 .name = "bfin-sport-uart",
508 .id = 0,
509 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
510 .resource = bfin_sport0_uart_resources,
511 .dev = {
512 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
513 },
514 };
515 #endif
516 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
517 static struct resource bfin_sport1_uart_resources[] = {
518 {
519 .start = SPORT1_TCR1,
520 .end = SPORT1_MRCS3+4,
521 .flags = IORESOURCE_MEM,
522 },
523 {
524 .start = IRQ_SPORT1_RX,
525 .end = IRQ_SPORT1_RX+1,
526 .flags = IORESOURCE_IRQ,
527 },
528 {
529 .start = IRQ_SPORT1_ERROR,
530 .end = IRQ_SPORT1_ERROR,
531 .flags = IORESOURCE_IRQ,
532 },
533 };
534
535 static unsigned short bfin_sport1_peripherals[] = {
536 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
537 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
538 };
539
540 static struct platform_device bfin_sport1_uart_device = {
541 .name = "bfin-sport-uart",
542 .id = 1,
543 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
544 .resource = bfin_sport1_uart_resources,
545 .dev = {
546 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
547 },
548 };
549 #endif
550 #endif
551
552 #if IS_ENABLED(CONFIG_BFIN_MAC)
553 #include <linux/bfin_mac.h>
554 static const unsigned short bfin_mac_peripherals[] = P_MII0;
555
556 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
557 {
558 .addr = 1,
559 .irq = IRQ_MAC_PHYINT,
560 },
561 };
562
563 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
564 .phydev_number = 1,
565 .phydev_data = bfin_phydev_data,
566 .phy_mode = PHY_INTERFACE_MODE_MII,
567 .mac_peripherals = bfin_mac_peripherals,
568 };
569
570 static struct platform_device bfin_mii_bus = {
571 .name = "bfin_mii_bus",
572 .dev = {
573 .platform_data = &bfin_mii_bus_data,
574 }
575 };
576
577 static struct platform_device bfin_mac_device = {
578 .name = "bfin_mac",
579 .dev = {
580 .platform_data = &bfin_mii_bus,
581 }
582 };
583 #endif
584
585 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
586 #define PATA_INT IRQ_PF14
587
588 static struct pata_platform_info bfin_pata_platform_data = {
589 .ioport_shift = 2,
590 };
591
592 static struct resource bfin_pata_resources[] = {
593 {
594 .start = 0x2030C000,
595 .end = 0x2030C01F,
596 .flags = IORESOURCE_MEM,
597 },
598 {
599 .start = 0x2030D018,
600 .end = 0x2030D01B,
601 .flags = IORESOURCE_MEM,
602 },
603 {
604 .start = PATA_INT,
605 .end = PATA_INT,
606 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
607 },
608 };
609
610 static struct platform_device bfin_pata_device = {
611 .name = "pata_platform",
612 .id = -1,
613 .num_resources = ARRAY_SIZE(bfin_pata_resources),
614 .resource = bfin_pata_resources,
615 .dev = {
616 .platform_data = &bfin_pata_platform_data,
617 }
618 };
619 #endif
620
621 static const unsigned int cclk_vlev_datasheet[] =
622 {
623 VRPAIR(VLEV_085, 250000000),
624 VRPAIR(VLEV_090, 376000000),
625 VRPAIR(VLEV_095, 426000000),
626 VRPAIR(VLEV_100, 426000000),
627 VRPAIR(VLEV_105, 476000000),
628 VRPAIR(VLEV_110, 476000000),
629 VRPAIR(VLEV_115, 476000000),
630 VRPAIR(VLEV_120, 500000000),
631 VRPAIR(VLEV_125, 533000000),
632 VRPAIR(VLEV_130, 600000000),
633 };
634
635 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
636 .tuple_tab = cclk_vlev_datasheet,
637 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
638 .vr_settling_time = 25 /* us */,
639 };
640
641 static struct platform_device bfin_dpmc = {
642 .name = "bfin dpmc",
643 .dev = {
644 .platform_data = &bfin_dmpc_vreg_data,
645 },
646 };
647
648 static struct platform_device *cm_bf537u_devices[] __initdata = {
649
650 &bfin_dpmc,
651
652 #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
653 &hitachi_fb_device,
654 #endif
655
656 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
657 &rtc_device,
658 #endif
659
660 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
661 #ifdef CONFIG_SERIAL_BFIN_UART0
662 &bfin_uart0_device,
663 #endif
664 #ifdef CONFIG_SERIAL_BFIN_UART1
665 &bfin_uart1_device,
666 #endif
667 #endif
668
669 #if IS_ENABLED(CONFIG_BFIN_SIR)
670 #ifdef CONFIG_BFIN_SIR0
671 &bfin_sir0_device,
672 #endif
673 #ifdef CONFIG_BFIN_SIR1
674 &bfin_sir1_device,
675 #endif
676 #endif
677
678 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
679 &i2c_bfin_twi_device,
680 #endif
681
682 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
683 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
684 &bfin_sport0_uart_device,
685 #endif
686 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
687 &bfin_sport1_uart_device,
688 #endif
689 #endif
690
691 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
692 &isp1362_hcd_device,
693 #endif
694
695 #if IS_ENABLED(CONFIG_SMC91X)
696 &smc91x_device,
697 #endif
698
699 #if IS_ENABLED(CONFIG_BFIN_MAC)
700 &bfin_mii_bus,
701 &bfin_mac_device,
702 #endif
703
704 #if IS_ENABLED(CONFIG_USB_NET2272)
705 &net2272_bfin_device,
706 #endif
707
708 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
709 &bfin_spi0_device,
710 #endif
711
712 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
713 &bfin_pata_device,
714 #endif
715
716 #if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
717 &cm_flash_device,
718 #endif
719 };
720
net2272_init(void)721 static int __init net2272_init(void)
722 {
723 #if IS_ENABLED(CONFIG_USB_NET2272)
724 int ret;
725
726 ret = gpio_request(GPIO_PH15, driver_name);
727 if (ret)
728 return ret;
729
730 ret = gpio_request(GPIO_PH13, "net2272");
731 if (ret) {
732 gpio_free(GPIO_PH15);
733 return ret;
734 }
735
736 /* Set PH15 Low make /AMS2 work properly */
737 gpio_direction_output(GPIO_PH15, 0);
738
739 /* enable CLKBUF output */
740 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
741
742 /* Reset the USB chip */
743 gpio_direction_output(GPIO_PH13, 0);
744 mdelay(2);
745 gpio_set_value(GPIO_PH13, 1);
746 #endif
747
748 return 0;
749 }
750
cm_bf537u_init(void)751 static int __init cm_bf537u_init(void)
752 {
753 printk(KERN_INFO "%s(): registering device resources\n", __func__);
754 platform_add_devices(cm_bf537u_devices, ARRAY_SIZE(cm_bf537u_devices));
755 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
756 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
757 #endif
758
759 #if IS_ENABLED(CONFIG_PATA_PLATFORM)
760 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
761 #endif
762
763 if (net2272_init())
764 pr_warning("unable to configure net2272; it probably won't work\n");
765
766 return 0;
767 }
768
769 arch_initcall(cm_bf537u_init);
770
771 static struct platform_device *cm_bf537u_early_devices[] __initdata = {
772 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
773 #ifdef CONFIG_SERIAL_BFIN_UART0
774 &bfin_uart0_device,
775 #endif
776 #ifdef CONFIG_SERIAL_BFIN_UART1
777 &bfin_uart1_device,
778 #endif
779 #endif
780
781 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
782 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
783 &bfin_sport0_uart_device,
784 #endif
785 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
786 &bfin_sport1_uart_device,
787 #endif
788 #endif
789 };
790
native_machine_early_platform_add_devices(void)791 void __init native_machine_early_platform_add_devices(void)
792 {
793 printk(KERN_INFO "register early platform devices\n");
794 early_platform_add_devices(cm_bf537u_early_devices,
795 ARRAY_SIZE(cm_bf537u_early_devices));
796 }
797
bfin_get_ether_addr(char * addr)798 int bfin_get_ether_addr(char *addr)
799 {
800 return 1;
801 }
802 EXPORT_SYMBOL(bfin_get_ether_addr);
803