1 /*
2  *
3  *  linux/arch/cris/arch-v10/kernel/setup.c
4  *
5  *  Copyright (C) 1995  Linus Torvalds
6  *  Copyright (c) 2001-2002  Axis Communications AB
7  */
8 
9 /*
10  * This file handles the architecture-dependent parts of initialization
11  */
12 
13 #include <linux/seq_file.h>
14 #include <linux/proc_fs.h>
15 #include <linux/delay.h>
16 #include <linux/param.h>
17 #include <arch/system.h>
18 
19 #ifdef CONFIG_PROC_FS
20 #define HAS_FPU		0x0001
21 #define HAS_MMU		0x0002
22 #define HAS_ETHERNET100	0x0004
23 #define HAS_TOKENRING	0x0008
24 #define HAS_SCSI	0x0010
25 #define HAS_ATA		0x0020
26 #define HAS_USB		0x0040
27 #define HAS_IRQ_BUG	0x0080
28 #define HAS_MMU_BUG	0x0100
29 
30 static struct cpu_info {
31 	char *model;
32 	unsigned short cache;
33 	unsigned short flags;
34 } cpu_info[] = {
35 	/* The first four models will never ever run this code and are
36 	   only here for display.  */
37 	{ "ETRAX 1",         0, 0 },
38 	{ "ETRAX 2",         0, 0 },
39 	{ "ETRAX 3",         0, HAS_TOKENRING },
40 	{ "ETRAX 4",         0, HAS_TOKENRING | HAS_SCSI },
41 	{ "Unknown",         0, 0 },
42 	{ "Unknown",         0, 0 },
43 	{ "Unknown",         0, 0 },
44 	{ "Simulator",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA },
45 	{ "ETRAX 100",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_IRQ_BUG },
46 	{ "ETRAX 100",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA },
47 	{ "ETRAX 100LX",     8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB | HAS_MMU | HAS_MMU_BUG },
48 	{ "ETRAX 100LX v2",  8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB | HAS_MMU  },
49 	{ "Unknown",         0, 0 }  /* This entry MUST be the last */
50 };
51 
show_cpuinfo(struct seq_file * m,void * v)52 int show_cpuinfo(struct seq_file *m, void *v)
53 {
54 	unsigned long revision;
55 	struct cpu_info *info;
56 
57 	/* read the version register in the CPU and print some stuff */
58 
59 	revision = rdvr();
60 
61 	if (revision >= ARRAY_SIZE(cpu_info))
62 		info = &cpu_info[ARRAY_SIZE(cpu_info) - 1];
63 	else
64 		info = &cpu_info[revision];
65 
66 	seq_printf(m,
67 		   "processor\t: 0\n"
68 		   "cpu\t\t: CRIS\n"
69 		   "cpu revision\t: %lu\n"
70 		   "cpu model\t: %s\n"
71 		   "cache size\t: %d kB\n"
72 		   "fpu\t\t: %s\n"
73 		   "mmu\t\t: %s\n"
74 		   "mmu DMA bug\t: %s\n"
75 		   "ethernet\t: %s Mbps\n"
76 		   "token ring\t: %s\n"
77 		   "scsi\t\t: %s\n"
78 		   "ata\t\t: %s\n"
79 		   "usb\t\t: %s\n"
80 		   "bogomips\t: %lu.%02lu\n",
81 
82 		   revision,
83 		   info->model,
84 		   info->cache,
85 		   info->flags & HAS_FPU ? "yes" : "no",
86 		   info->flags & HAS_MMU ? "yes" : "no",
87 		   info->flags & HAS_MMU_BUG ? "yes" : "no",
88 		   info->flags & HAS_ETHERNET100 ? "10/100" : "10",
89 		   info->flags & HAS_TOKENRING ? "4/16 Mbps" : "no",
90 		   info->flags & HAS_SCSI ? "yes" : "no",
91 		   info->flags & HAS_ATA ? "yes" : "no",
92 		   info->flags & HAS_USB ? "yes" : "no",
93 		   (loops_per_jiffy * HZ + 500) / 500000,
94 		   ((loops_per_jiffy * HZ + 500) / 5000) % 100);
95 
96 	return 0;
97 }
98 
99 #endif /* CONFIG_PROC_FS */
100 
101 void
show_etrax_copyright(void)102 show_etrax_copyright(void)
103 {
104 	printk(KERN_INFO
105                "Linux/CRIS port on ETRAX 100LX (c) 2001 Axis Communications AB\n");
106 }
107