1 /*
2 * PATA driver for AT91SAM9260 Static Memory Controller
3 * with CompactFlash interface in True IDE mode
4 *
5 * Copyright (C) 2009 Matyukevich Sergey
6 * 2011 Igor Plyatov
7 *
8 * Based on:
9 * * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
10 * * pata_at32 driver by Kristoffer Nyborg Gregertsen
11 * * at91_ide driver by Stanislaw Gruszka
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation.
16 *
17 */
18
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/blkdev.h>
22 #include <linux/gfp.h>
23 #include <scsi/scsi_host.h>
24 #include <linux/ata.h>
25 #include <linux/clk.h>
26 #include <linux/libata.h>
27 #include <linux/mfd/syscon.h>
28 #include <linux/mfd/syscon/atmel-smc.h>
29 #include <linux/platform_device.h>
30 #include <linux/ata_platform.h>
31 #include <linux/platform_data/atmel.h>
32 #include <linux/regmap.h>
33
34 #include <asm/gpio.h>
35
36 #define DRV_NAME "pata_at91"
37 #define DRV_VERSION "0.3"
38
39 #define CF_IDE_OFFSET 0x00c00000
40 #define CF_ALT_IDE_OFFSET 0x00e00000
41 #define CF_IDE_RES_SIZE 0x08
42 #define CS_PULSE_MAXIMUM 319
43 #define ER_SMC_CALC 1
44 #define ER_SMC_RECALC 2
45
46 struct at91_ide_info {
47 unsigned long mode;
48 unsigned int cs;
49 struct clk *mck;
50 void __iomem *ide_addr;
51 void __iomem *alt_addr;
52 };
53
54 /**
55 * struct smc_range - range of valid values for SMC register.
56 */
57 struct smc_range {
58 int min;
59 int max;
60 };
61
62 struct regmap *smc;
63
64 struct at91sam9_smc_generic_fields {
65 struct regmap_field *setup;
66 struct regmap_field *pulse;
67 struct regmap_field *cycle;
68 struct regmap_field *mode;
69 } fields;
70
71 /**
72 * adjust_smc_value - adjust value for one of SMC registers.
73 * @value: adjusted value
74 * @range: array of SMC ranges with valid values
75 * @size: SMC ranges array size
76 *
77 * This returns the difference between input and output value or negative
78 * in case of invalid input value.
79 * If negative returned, then output value = maximal possible from ranges.
80 */
adjust_smc_value(int * value,struct smc_range * range,int size)81 static int adjust_smc_value(int *value, struct smc_range *range, int size)
82 {
83 int maximum = (range + size - 1)->max;
84 int remainder;
85
86 do {
87 if (*value < range->min) {
88 remainder = range->min - *value;
89 *value = range->min; /* nearest valid value */
90 return remainder;
91 } else if ((range->min <= *value) && (*value <= range->max))
92 return 0;
93
94 range++;
95 } while (--size);
96 *value = maximum;
97
98 return -1; /* invalid value */
99 }
100
101 /**
102 * calc_smc_vals - calculate SMC register values
103 * @dev: ATA device
104 * @setup: SMC_SETUP register value
105 * @pulse: SMC_PULSE register value
106 * @cycle: SMC_CYCLE register value
107 *
108 * This returns negative in case of invalid values for SMC registers:
109 * -ER_SMC_RECALC - recalculation required for SMC values,
110 * -ER_SMC_CALC - calculation failed (invalid input values).
111 *
112 * SMC use special coding scheme, see "Coding and Range of Timing
113 * Parameters" table from AT91SAM9 datasheets.
114 *
115 * SMC_SETUP = 128*setup[5] + setup[4:0]
116 * SMC_PULSE = 256*pulse[6] + pulse[5:0]
117 * SMC_CYCLE = 256*cycle[8:7] + cycle[6:0]
118 */
calc_smc_vals(struct device * dev,int * setup,int * pulse,int * cycle,int * cs_pulse)119 static int calc_smc_vals(struct device *dev,
120 int *setup, int *pulse, int *cycle, int *cs_pulse)
121 {
122 int ret_val;
123 int err = 0;
124 struct smc_range range_setup[] = { /* SMC_SETUP valid values */
125 {.min = 0, .max = 31}, /* first range */
126 {.min = 128, .max = 159} /* second range */
127 };
128 struct smc_range range_pulse[] = { /* SMC_PULSE valid values */
129 {.min = 0, .max = 63}, /* first range */
130 {.min = 256, .max = 319} /* second range */
131 };
132 struct smc_range range_cycle[] = { /* SMC_CYCLE valid values */
133 {.min = 0, .max = 127}, /* first range */
134 {.min = 256, .max = 383}, /* second range */
135 {.min = 512, .max = 639}, /* third range */
136 {.min = 768, .max = 895} /* fourth range */
137 };
138
139 ret_val = adjust_smc_value(setup, range_setup, ARRAY_SIZE(range_setup));
140 if (ret_val < 0)
141 dev_warn(dev, "maximal SMC Setup value\n");
142 else
143 *cycle += ret_val;
144
145 ret_val = adjust_smc_value(pulse, range_pulse, ARRAY_SIZE(range_pulse));
146 if (ret_val < 0)
147 dev_warn(dev, "maximal SMC Pulse value\n");
148 else
149 *cycle += ret_val;
150
151 ret_val = adjust_smc_value(cycle, range_cycle, ARRAY_SIZE(range_cycle));
152 if (ret_val < 0)
153 dev_warn(dev, "maximal SMC Cycle value\n");
154
155 *cs_pulse = *cycle;
156 if (*cs_pulse > CS_PULSE_MAXIMUM) {
157 dev_err(dev, "unable to calculate valid SMC settings\n");
158 return -ER_SMC_CALC;
159 }
160
161 ret_val = adjust_smc_value(cs_pulse, range_pulse,
162 ARRAY_SIZE(range_pulse));
163 if (ret_val < 0) {
164 dev_warn(dev, "maximal SMC CS Pulse value\n");
165 } else if (ret_val != 0) {
166 *cycle = *cs_pulse;
167 dev_warn(dev, "SMC Cycle extended\n");
168 err = -ER_SMC_RECALC;
169 }
170
171 return err;
172 }
173
174 /**
175 * to_smc_format - convert values into SMC format
176 * @setup: SETUP value of SMC Setup Register
177 * @pulse: PULSE value of SMC Pulse Register
178 * @cycle: CYCLE value of SMC Cycle Register
179 * @cs_pulse: NCS_PULSE value of SMC Pulse Register
180 */
to_smc_format(int * setup,int * pulse,int * cycle,int * cs_pulse)181 static void to_smc_format(int *setup, int *pulse, int *cycle, int *cs_pulse)
182 {
183 *setup = (*setup & 0x1f) | ((*setup & 0x80) >> 2);
184 *pulse = (*pulse & 0x3f) | ((*pulse & 0x100) >> 2);
185 *cycle = (*cycle & 0x7f) | ((*cycle & 0x300) >> 1);
186 *cs_pulse = (*cs_pulse & 0x3f) | ((*cs_pulse & 0x100) >> 2);
187 }
188
calc_mck_cycles(unsigned long ns,unsigned long mck_hz)189 static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
190 {
191 unsigned long mul;
192
193 /*
194 * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
195 * x * (f / 1_000_000_000) =
196 * x * ((f * 65536) / 1_000_000_000) / 65536 =
197 * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
198 */
199
200 mul = (mck_hz / 10000) << 16;
201 mul /= 100000;
202
203 return (ns * mul + 65536) >> 16; /* rounding */
204 }
205
206 /**
207 * set_smc_timing - SMC timings setup.
208 * @dev: device
209 * @info: AT91 IDE info
210 * @ata: ATA timings
211 *
212 * Its assumed that write timings are same as read timings,
213 * cs_setup = 0 and cs_pulse = cycle.
214 */
set_smc_timing(struct device * dev,struct ata_device * adev,struct at91_ide_info * info,const struct ata_timing * ata)215 static void set_smc_timing(struct device *dev, struct ata_device *adev,
216 struct at91_ide_info *info, const struct ata_timing *ata)
217 {
218 int ret = 0;
219 int use_iordy;
220 unsigned int t6z; /* data tristate time in ns */
221 unsigned int cycle; /* SMC Cycle width in MCK ticks */
222 unsigned int setup; /* SMC Setup width in MCK ticks */
223 unsigned int pulse; /* CFIOR and CFIOW pulse width in MCK ticks */
224 unsigned int cs_pulse; /* CS4 or CS5 pulse width in MCK ticks*/
225 unsigned int tdf_cycles; /* SMC TDF MCK ticks */
226 unsigned long mck_hz; /* MCK frequency in Hz */
227
228 t6z = (ata->mode < XFER_PIO_5) ? 30 : 20;
229 mck_hz = clk_get_rate(info->mck);
230 cycle = calc_mck_cycles(ata->cyc8b, mck_hz);
231 setup = calc_mck_cycles(ata->setup, mck_hz);
232 pulse = calc_mck_cycles(ata->act8b, mck_hz);
233 tdf_cycles = calc_mck_cycles(t6z, mck_hz);
234
235 do {
236 ret = calc_smc_vals(dev, &setup, &pulse, &cycle, &cs_pulse);
237 } while (ret == -ER_SMC_RECALC);
238
239 if (ret == -ER_SMC_CALC)
240 dev_err(dev, "Interface may not operate correctly\n");
241
242 dev_dbg(dev, "SMC Setup=%u, Pulse=%u, Cycle=%u, CS Pulse=%u\n",
243 setup, pulse, cycle, cs_pulse);
244 to_smc_format(&setup, &pulse, &cycle, &cs_pulse);
245 /* disable or enable waiting for IORDY signal */
246 use_iordy = ata_pio_need_iordy(adev);
247 if (use_iordy)
248 info->mode |= AT91_SMC_EXNWMODE_READY;
249
250 if (tdf_cycles > 15) {
251 tdf_cycles = 15;
252 dev_warn(dev, "maximal SMC TDF Cycles value\n");
253 }
254
255 dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
256
257 regmap_fields_write(fields.setup, info->cs,
258 AT91SAM9_SMC_NRDSETUP(setup) |
259 AT91SAM9_SMC_NWESETUP(setup) |
260 AT91SAM9_SMC_NCS_NRDSETUP(0) |
261 AT91SAM9_SMC_NCS_WRSETUP(0));
262 regmap_fields_write(fields.pulse, info->cs,
263 AT91SAM9_SMC_NRDPULSE(pulse) |
264 AT91SAM9_SMC_NWEPULSE(pulse) |
265 AT91SAM9_SMC_NCS_NRDPULSE(cs_pulse) |
266 AT91SAM9_SMC_NCS_WRPULSE(cs_pulse));
267 regmap_fields_write(fields.cycle, info->cs,
268 AT91SAM9_SMC_NRDCYCLE(cycle) |
269 AT91SAM9_SMC_NWECYCLE(cycle));
270 regmap_fields_write(fields.mode, info->cs, info->mode |
271 AT91_SMC_TDF_(tdf_cycles));
272 }
273
pata_at91_set_piomode(struct ata_port * ap,struct ata_device * adev)274 static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
275 {
276 struct at91_ide_info *info = ap->host->private_data;
277 struct ata_timing timing;
278 int ret;
279
280 /* Compute ATA timing and set it to SMC */
281 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
282 if (ret) {
283 dev_warn(ap->dev, "Failed to compute ATA timing %d, "
284 "set PIO_0 timing\n", ret);
285 timing = *ata_timing_find_mode(XFER_PIO_0);
286 }
287 set_smc_timing(ap->dev, adev, info, &timing);
288 }
289
pata_at91_data_xfer_noirq(struct ata_device * dev,unsigned char * buf,unsigned int buflen,int rw)290 static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
291 unsigned char *buf, unsigned int buflen, int rw)
292 {
293 struct at91_ide_info *info = dev->link->ap->host->private_data;
294 unsigned int consumed;
295 unsigned int mode;
296 unsigned long flags;
297
298 local_irq_save(flags);
299 regmap_fields_read(fields.mode, info->cs, &mode);
300
301 /* set 16bit mode before writing data */
302 regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
303 AT91_SMC_DBW_16);
304
305 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
306
307 /* restore 8bit mode after data is written */
308 regmap_fields_write(fields.mode, info->cs, (mode & ~AT91_SMC_DBW) |
309 AT91_SMC_DBW_8);
310
311 local_irq_restore(flags);
312 return consumed;
313 }
314
315 static struct scsi_host_template pata_at91_sht = {
316 ATA_PIO_SHT(DRV_NAME),
317 };
318
319 static struct ata_port_operations pata_at91_port_ops = {
320 .inherits = &ata_sff_port_ops,
321
322 .sff_data_xfer = pata_at91_data_xfer_noirq,
323 .set_piomode = pata_at91_set_piomode,
324 .cable_detect = ata_cable_40wire,
325 };
326
at91sam9_smc_fields_init(struct device * dev)327 static int at91sam9_smc_fields_init(struct device *dev)
328 {
329 struct reg_field field = REG_FIELD(0, 0, 31);
330
331 field.id_size = 8;
332 field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
333
334 field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
335 fields.setup = devm_regmap_field_alloc(dev, smc, field);
336 if (IS_ERR(fields.setup))
337 return PTR_ERR(fields.setup);
338
339 field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
340 fields.pulse = devm_regmap_field_alloc(dev, smc, field);
341 if (IS_ERR(fields.pulse))
342 return PTR_ERR(fields.pulse);
343
344 field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
345 fields.cycle = devm_regmap_field_alloc(dev, smc, field);
346 if (IS_ERR(fields.cycle))
347 return PTR_ERR(fields.cycle);
348
349 field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
350 fields.mode = devm_regmap_field_alloc(dev, smc, field);
351 if (IS_ERR(fields.mode))
352 return PTR_ERR(fields.mode);
353
354 return 0;
355 }
356
pata_at91_probe(struct platform_device * pdev)357 static int pata_at91_probe(struct platform_device *pdev)
358 {
359 struct at91_cf_data *board = dev_get_platdata(&pdev->dev);
360 struct device *dev = &pdev->dev;
361 struct at91_ide_info *info;
362 struct resource *mem_res;
363 struct ata_host *host;
364 struct ata_port *ap;
365
366 int irq_flags = 0;
367 int irq = 0;
368 int ret;
369
370 /* get platform resources: IO/CTL memories and irq/rst pins */
371
372 if (pdev->num_resources != 1) {
373 dev_err(&pdev->dev, "invalid number of resources\n");
374 return -EINVAL;
375 }
376
377 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
378
379 if (!mem_res) {
380 dev_err(dev, "failed to get mem resource\n");
381 return -EINVAL;
382 }
383
384 irq = board->irq_pin;
385
386 smc = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "atmel,smc");
387 if (IS_ERR(smc))
388 return PTR_ERR(smc);
389
390 ret = at91sam9_smc_fields_init(dev);
391 if (ret < 0)
392 return ret;
393
394 /* init ata host */
395
396 host = ata_host_alloc(dev, 1);
397
398 if (!host)
399 return -ENOMEM;
400
401 ap = host->ports[0];
402 ap->ops = &pata_at91_port_ops;
403 ap->flags |= ATA_FLAG_SLAVE_POSS;
404 ap->pio_mask = ATA_PIO4;
405
406 if (!gpio_is_valid(irq)) {
407 ap->flags |= ATA_FLAG_PIO_POLLING;
408 ata_port_desc(ap, "no IRQ, using PIO polling");
409 }
410
411 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
412
413 if (!info) {
414 dev_err(dev, "failed to allocate memory for private data\n");
415 return -ENOMEM;
416 }
417
418 info->mck = clk_get(NULL, "mck");
419
420 if (IS_ERR(info->mck)) {
421 dev_err(dev, "failed to get access to mck clock\n");
422 return -ENODEV;
423 }
424
425 info->cs = board->chipselect;
426 info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
427 AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
428 AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
429
430 info->ide_addr = devm_ioremap(dev,
431 mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
432
433 if (!info->ide_addr) {
434 dev_err(dev, "failed to map IO base\n");
435 ret = -ENOMEM;
436 goto err_put;
437 }
438
439 info->alt_addr = devm_ioremap(dev,
440 mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
441
442 if (!info->alt_addr) {
443 dev_err(dev, "failed to map CTL base\n");
444 ret = -ENOMEM;
445 goto err_put;
446 }
447
448 ap->ioaddr.cmd_addr = info->ide_addr;
449 ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
450 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
451
452 ata_sff_std_ports(&ap->ioaddr);
453
454 ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
455 (unsigned long long)mem_res->start + CF_IDE_OFFSET,
456 (unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
457
458 host->private_data = info;
459
460 ret = ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
461 gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
462 irq_flags, &pata_at91_sht);
463 if (ret)
464 goto err_put;
465
466 return 0;
467
468 err_put:
469 clk_put(info->mck);
470 return ret;
471 }
472
pata_at91_remove(struct platform_device * pdev)473 static int pata_at91_remove(struct platform_device *pdev)
474 {
475 struct ata_host *host = platform_get_drvdata(pdev);
476 struct at91_ide_info *info;
477
478 if (!host)
479 return 0;
480 info = host->private_data;
481
482 ata_host_detach(host);
483
484 if (!info)
485 return 0;
486
487 clk_put(info->mck);
488
489 return 0;
490 }
491
492 static struct platform_driver pata_at91_driver = {
493 .probe = pata_at91_probe,
494 .remove = pata_at91_remove,
495 .driver = {
496 .name = DRV_NAME,
497 },
498 };
499
500 module_platform_driver(pata_at91_driver);
501
502 MODULE_LICENSE("GPL");
503 MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
504 MODULE_AUTHOR("Matyukevich Sergey");
505 MODULE_VERSION(DRV_VERSION);
506
507