1 /*
2 * MCP23S08 SPI/I2C GPIO gpio expander driver
3 *
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
5 * supported.
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
10 * support that yet.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/device.h>
15 #include <linux/mutex.h>
16 #include <linux/module.h>
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/mcp23s08.h>
21 #include <linux/slab.h>
22 #include <asm/byteorder.h>
23 #include <linux/interrupt.h>
24 #include <linux/of_irq.h>
25 #include <linux/of_device.h>
26
27 /**
28 * MCP types supported by driver
29 */
30 #define MCP_TYPE_S08 0
31 #define MCP_TYPE_S17 1
32 #define MCP_TYPE_008 2
33 #define MCP_TYPE_017 3
34
35 /* Registers are all 8 bits wide.
36 *
37 * The mcp23s17 has twice as many bits, and can be configured to work
38 * with either 16 bit registers or with two adjacent 8 bit banks.
39 */
40 #define MCP_IODIR 0x00 /* init/reset: all ones */
41 #define MCP_IPOL 0x01
42 #define MCP_GPINTEN 0x02
43 #define MCP_DEFVAL 0x03
44 #define MCP_INTCON 0x04
45 #define MCP_IOCON 0x05
46 # define IOCON_MIRROR (1 << 6)
47 # define IOCON_SEQOP (1 << 5)
48 # define IOCON_HAEN (1 << 3)
49 # define IOCON_ODR (1 << 2)
50 # define IOCON_INTPOL (1 << 1)
51 #define MCP_GPPU 0x06
52 #define MCP_INTF 0x07
53 #define MCP_INTCAP 0x08
54 #define MCP_GPIO 0x09
55 #define MCP_OLAT 0x0a
56
57 struct mcp23s08;
58
59 struct mcp23s08_ops {
60 int (*read)(struct mcp23s08 *mcp, unsigned reg);
61 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
62 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
63 u16 *vals, unsigned n);
64 };
65
66 struct mcp23s08 {
67 u8 addr;
68 bool irq_active_high;
69
70 u16 cache[11];
71 u16 irq_rise;
72 u16 irq_fall;
73 int irq;
74 bool irq_controller;
75 /* lock protects the cached values */
76 struct mutex lock;
77 struct mutex irq_lock;
78 struct irq_domain *irq_domain;
79
80 struct gpio_chip chip;
81
82 const struct mcp23s08_ops *ops;
83 void *data; /* ops specific data */
84 };
85
86 /* A given spi_device can represent up to eight mcp23sxx chips
87 * sharing the same chipselect but using different addresses
88 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
89 * Driver data holds all the per-chip data.
90 */
91 struct mcp23s08_driver_data {
92 unsigned ngpio;
93 struct mcp23s08 *mcp[8];
94 struct mcp23s08 chip[];
95 };
96
97 /* This lock class tells lockdep that GPIO irqs are in a different
98 * category than their parents, so it won't report false recursion.
99 */
100 static struct lock_class_key gpio_lock_class;
101
102 /*----------------------------------------------------------------------*/
103
104 #if IS_ENABLED(CONFIG_I2C)
105
mcp23008_read(struct mcp23s08 * mcp,unsigned reg)106 static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
107 {
108 return i2c_smbus_read_byte_data(mcp->data, reg);
109 }
110
mcp23008_write(struct mcp23s08 * mcp,unsigned reg,unsigned val)111 static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
112 {
113 return i2c_smbus_write_byte_data(mcp->data, reg, val);
114 }
115
116 static int
mcp23008_read_regs(struct mcp23s08 * mcp,unsigned reg,u16 * vals,unsigned n)117 mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
118 {
119 while (n--) {
120 int ret = mcp23008_read(mcp, reg++);
121 if (ret < 0)
122 return ret;
123 *vals++ = ret;
124 }
125
126 return 0;
127 }
128
mcp23017_read(struct mcp23s08 * mcp,unsigned reg)129 static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
130 {
131 return i2c_smbus_read_word_data(mcp->data, reg << 1);
132 }
133
mcp23017_write(struct mcp23s08 * mcp,unsigned reg,unsigned val)134 static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
135 {
136 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
137 }
138
139 static int
mcp23017_read_regs(struct mcp23s08 * mcp,unsigned reg,u16 * vals,unsigned n)140 mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
141 {
142 while (n--) {
143 int ret = mcp23017_read(mcp, reg++);
144 if (ret < 0)
145 return ret;
146 *vals++ = ret;
147 }
148
149 return 0;
150 }
151
152 static const struct mcp23s08_ops mcp23008_ops = {
153 .read = mcp23008_read,
154 .write = mcp23008_write,
155 .read_regs = mcp23008_read_regs,
156 };
157
158 static const struct mcp23s08_ops mcp23017_ops = {
159 .read = mcp23017_read,
160 .write = mcp23017_write,
161 .read_regs = mcp23017_read_regs,
162 };
163
164 #endif /* CONFIG_I2C */
165
166 /*----------------------------------------------------------------------*/
167
168 #ifdef CONFIG_SPI_MASTER
169
mcp23s08_read(struct mcp23s08 * mcp,unsigned reg)170 static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
171 {
172 u8 tx[2], rx[1];
173 int status;
174
175 tx[0] = mcp->addr | 0x01;
176 tx[1] = reg;
177 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
178 return (status < 0) ? status : rx[0];
179 }
180
mcp23s08_write(struct mcp23s08 * mcp,unsigned reg,unsigned val)181 static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
182 {
183 u8 tx[3];
184
185 tx[0] = mcp->addr;
186 tx[1] = reg;
187 tx[2] = val;
188 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
189 }
190
191 static int
mcp23s08_read_regs(struct mcp23s08 * mcp,unsigned reg,u16 * vals,unsigned n)192 mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
193 {
194 u8 tx[2], *tmp;
195 int status;
196
197 if ((n + reg) > sizeof(mcp->cache))
198 return -EINVAL;
199 tx[0] = mcp->addr | 0x01;
200 tx[1] = reg;
201
202 tmp = (u8 *)vals;
203 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
204 if (status >= 0) {
205 while (n--)
206 vals[n] = tmp[n]; /* expand to 16bit */
207 }
208 return status;
209 }
210
mcp23s17_read(struct mcp23s08 * mcp,unsigned reg)211 static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
212 {
213 u8 tx[2], rx[2];
214 int status;
215
216 tx[0] = mcp->addr | 0x01;
217 tx[1] = reg << 1;
218 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
219 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
220 }
221
mcp23s17_write(struct mcp23s08 * mcp,unsigned reg,unsigned val)222 static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
223 {
224 u8 tx[4];
225
226 tx[0] = mcp->addr;
227 tx[1] = reg << 1;
228 tx[2] = val;
229 tx[3] = val >> 8;
230 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
231 }
232
233 static int
mcp23s17_read_regs(struct mcp23s08 * mcp,unsigned reg,u16 * vals,unsigned n)234 mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
235 {
236 u8 tx[2];
237 int status;
238
239 if ((n + reg) > sizeof(mcp->cache))
240 return -EINVAL;
241 tx[0] = mcp->addr | 0x01;
242 tx[1] = reg << 1;
243
244 status = spi_write_then_read(mcp->data, tx, sizeof(tx),
245 (u8 *)vals, n * 2);
246 if (status >= 0) {
247 while (n--)
248 vals[n] = __le16_to_cpu((__le16)vals[n]);
249 }
250
251 return status;
252 }
253
254 static const struct mcp23s08_ops mcp23s08_ops = {
255 .read = mcp23s08_read,
256 .write = mcp23s08_write,
257 .read_regs = mcp23s08_read_regs,
258 };
259
260 static const struct mcp23s08_ops mcp23s17_ops = {
261 .read = mcp23s17_read,
262 .write = mcp23s17_write,
263 .read_regs = mcp23s17_read_regs,
264 };
265
266 #endif /* CONFIG_SPI_MASTER */
267
268 /*----------------------------------------------------------------------*/
269
mcp23s08_direction_input(struct gpio_chip * chip,unsigned offset)270 static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
271 {
272 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
273 int status;
274
275 mutex_lock(&mcp->lock);
276 mcp->cache[MCP_IODIR] |= (1 << offset);
277 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
278 mutex_unlock(&mcp->lock);
279 return status;
280 }
281
mcp23s08_get(struct gpio_chip * chip,unsigned offset)282 static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
283 {
284 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
285 int status;
286
287 mutex_lock(&mcp->lock);
288
289 /* REVISIT reading this clears any IRQ ... */
290 status = mcp->ops->read(mcp, MCP_GPIO);
291 if (status < 0)
292 status = 0;
293 else {
294 mcp->cache[MCP_GPIO] = status;
295 status = !!(status & (1 << offset));
296 }
297 mutex_unlock(&mcp->lock);
298 return status;
299 }
300
__mcp23s08_set(struct mcp23s08 * mcp,unsigned mask,int value)301 static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
302 {
303 unsigned olat = mcp->cache[MCP_OLAT];
304
305 if (value)
306 olat |= mask;
307 else
308 olat &= ~mask;
309 mcp->cache[MCP_OLAT] = olat;
310 return mcp->ops->write(mcp, MCP_OLAT, olat);
311 }
312
mcp23s08_set(struct gpio_chip * chip,unsigned offset,int value)313 static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
314 {
315 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
316 unsigned mask = 1 << offset;
317
318 mutex_lock(&mcp->lock);
319 __mcp23s08_set(mcp, mask, value);
320 mutex_unlock(&mcp->lock);
321 }
322
323 static int
mcp23s08_direction_output(struct gpio_chip * chip,unsigned offset,int value)324 mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
325 {
326 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
327 unsigned mask = 1 << offset;
328 int status;
329
330 mutex_lock(&mcp->lock);
331 status = __mcp23s08_set(mcp, mask, value);
332 if (status == 0) {
333 mcp->cache[MCP_IODIR] &= ~mask;
334 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
335 }
336 mutex_unlock(&mcp->lock);
337 return status;
338 }
339
340 /*----------------------------------------------------------------------*/
mcp23s08_irq(int irq,void * data)341 static irqreturn_t mcp23s08_irq(int irq, void *data)
342 {
343 struct mcp23s08 *mcp = data;
344 int intcap, intf, i;
345 unsigned int child_irq;
346
347 mutex_lock(&mcp->lock);
348 intf = mcp->ops->read(mcp, MCP_INTF);
349 if (intf < 0) {
350 mutex_unlock(&mcp->lock);
351 return IRQ_HANDLED;
352 }
353
354 mcp->cache[MCP_INTF] = intf;
355
356 intcap = mcp->ops->read(mcp, MCP_INTCAP);
357 if (intcap < 0) {
358 mutex_unlock(&mcp->lock);
359 return IRQ_HANDLED;
360 }
361
362 mcp->cache[MCP_INTCAP] = intcap;
363 mutex_unlock(&mcp->lock);
364
365
366 for (i = 0; i < mcp->chip.ngpio; i++) {
367 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
368 ((BIT(i) & intcap & mcp->irq_rise) ||
369 (mcp->irq_fall & ~intcap & BIT(i)))) {
370 child_irq = irq_find_mapping(mcp->irq_domain, i);
371 handle_nested_irq(child_irq);
372 }
373 }
374
375 return IRQ_HANDLED;
376 }
377
mcp23s08_gpio_to_irq(struct gpio_chip * chip,unsigned offset)378 static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
379 {
380 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
381
382 return irq_find_mapping(mcp->irq_domain, offset);
383 }
384
mcp23s08_irq_mask(struct irq_data * data)385 static void mcp23s08_irq_mask(struct irq_data *data)
386 {
387 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
388 unsigned int pos = data->hwirq;
389
390 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
391 }
392
mcp23s08_irq_unmask(struct irq_data * data)393 static void mcp23s08_irq_unmask(struct irq_data *data)
394 {
395 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
396 unsigned int pos = data->hwirq;
397
398 mcp->cache[MCP_GPINTEN] |= BIT(pos);
399 }
400
mcp23s08_irq_set_type(struct irq_data * data,unsigned int type)401 static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
402 {
403 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
404 unsigned int pos = data->hwirq;
405 int status = 0;
406
407 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
408 mcp->cache[MCP_INTCON] &= ~BIT(pos);
409 mcp->irq_rise |= BIT(pos);
410 mcp->irq_fall |= BIT(pos);
411 } else if (type & IRQ_TYPE_EDGE_RISING) {
412 mcp->cache[MCP_INTCON] &= ~BIT(pos);
413 mcp->irq_rise |= BIT(pos);
414 mcp->irq_fall &= ~BIT(pos);
415 } else if (type & IRQ_TYPE_EDGE_FALLING) {
416 mcp->cache[MCP_INTCON] &= ~BIT(pos);
417 mcp->irq_rise &= ~BIT(pos);
418 mcp->irq_fall |= BIT(pos);
419 } else
420 return -EINVAL;
421
422 return status;
423 }
424
mcp23s08_irq_bus_lock(struct irq_data * data)425 static void mcp23s08_irq_bus_lock(struct irq_data *data)
426 {
427 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
428
429 mutex_lock(&mcp->irq_lock);
430 }
431
mcp23s08_irq_bus_unlock(struct irq_data * data)432 static void mcp23s08_irq_bus_unlock(struct irq_data *data)
433 {
434 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
435
436 mutex_lock(&mcp->lock);
437 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
438 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
439 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
440 mutex_unlock(&mcp->lock);
441 mutex_unlock(&mcp->irq_lock);
442 }
443
mcp23s08_irq_reqres(struct irq_data * data)444 static int mcp23s08_irq_reqres(struct irq_data *data)
445 {
446 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
447
448 if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) {
449 dev_err(mcp->chip.dev,
450 "unable to lock HW IRQ %lu for IRQ usage\n",
451 data->hwirq);
452 return -EINVAL;
453 }
454
455 return 0;
456 }
457
mcp23s08_irq_relres(struct irq_data * data)458 static void mcp23s08_irq_relres(struct irq_data *data)
459 {
460 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
461
462 gpiochip_unlock_as_irq(&mcp->chip, data->hwirq);
463 }
464
465 static struct irq_chip mcp23s08_irq_chip = {
466 .name = "gpio-mcp23xxx",
467 .irq_mask = mcp23s08_irq_mask,
468 .irq_unmask = mcp23s08_irq_unmask,
469 .irq_set_type = mcp23s08_irq_set_type,
470 .irq_bus_lock = mcp23s08_irq_bus_lock,
471 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
472 .irq_request_resources = mcp23s08_irq_reqres,
473 .irq_release_resources = mcp23s08_irq_relres,
474 };
475
mcp23s08_irq_setup(struct mcp23s08 * mcp)476 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
477 {
478 struct gpio_chip *chip = &mcp->chip;
479 int err, irq, j;
480 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
481
482 mutex_init(&mcp->irq_lock);
483
484 mcp->irq_domain = irq_domain_add_linear(chip->dev->of_node, chip->ngpio,
485 &irq_domain_simple_ops, mcp);
486 if (!mcp->irq_domain)
487 return -ENODEV;
488
489 if (mcp->irq_active_high)
490 irqflags |= IRQF_TRIGGER_HIGH;
491 else
492 irqflags |= IRQF_TRIGGER_LOW;
493
494 err = devm_request_threaded_irq(chip->dev, mcp->irq, NULL, mcp23s08_irq,
495 irqflags, dev_name(chip->dev), mcp);
496 if (err != 0) {
497 dev_err(chip->dev, "unable to request IRQ#%d: %d\n",
498 mcp->irq, err);
499 return err;
500 }
501
502 chip->to_irq = mcp23s08_gpio_to_irq;
503
504 for (j = 0; j < mcp->chip.ngpio; j++) {
505 irq = irq_create_mapping(mcp->irq_domain, j);
506 irq_set_lockdep_class(irq, &gpio_lock_class);
507 irq_set_chip_data(irq, mcp);
508 irq_set_chip(irq, &mcp23s08_irq_chip);
509 irq_set_nested_thread(irq, true);
510 irq_set_noprobe(irq);
511 }
512 return 0;
513 }
514
mcp23s08_irq_teardown(struct mcp23s08 * mcp)515 static void mcp23s08_irq_teardown(struct mcp23s08 *mcp)
516 {
517 unsigned int irq, i;
518
519 for (i = 0; i < mcp->chip.ngpio; i++) {
520 irq = irq_find_mapping(mcp->irq_domain, i);
521 if (irq > 0)
522 irq_dispose_mapping(irq);
523 }
524
525 irq_domain_remove(mcp->irq_domain);
526 }
527
528 /*----------------------------------------------------------------------*/
529
530 #ifdef CONFIG_DEBUG_FS
531
532 #include <linux/seq_file.h>
533
534 /*
535 * This shows more info than the generic gpio dump code:
536 * pullups, deglitching, open drain drive.
537 */
mcp23s08_dbg_show(struct seq_file * s,struct gpio_chip * chip)538 static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
539 {
540 struct mcp23s08 *mcp;
541 char bank;
542 int t;
543 unsigned mask;
544
545 mcp = container_of(chip, struct mcp23s08, chip);
546
547 /* NOTE: we only handle one bank for now ... */
548 bank = '0' + ((mcp->addr >> 1) & 0x7);
549
550 mutex_lock(&mcp->lock);
551 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
552 if (t < 0) {
553 seq_printf(s, " I/O ERROR %d\n", t);
554 goto done;
555 }
556
557 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
558 const char *label;
559
560 label = gpiochip_is_requested(chip, t);
561 if (!label)
562 continue;
563
564 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
565 chip->base + t, bank, t, label,
566 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
567 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
568 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
569 /* NOTE: ignoring the irq-related registers */
570 seq_puts(s, "\n");
571 }
572 done:
573 mutex_unlock(&mcp->lock);
574 }
575
576 #else
577 #define mcp23s08_dbg_show NULL
578 #endif
579
580 /*----------------------------------------------------------------------*/
581
mcp23s08_probe_one(struct mcp23s08 * mcp,struct device * dev,void * data,unsigned addr,unsigned type,struct mcp23s08_platform_data * pdata,int cs)582 static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
583 void *data, unsigned addr, unsigned type,
584 struct mcp23s08_platform_data *pdata, int cs)
585 {
586 int status;
587 bool mirror = false;
588
589 mutex_init(&mcp->lock);
590
591 mcp->data = data;
592 mcp->addr = addr;
593 mcp->irq_active_high = false;
594
595 mcp->chip.direction_input = mcp23s08_direction_input;
596 mcp->chip.get = mcp23s08_get;
597 mcp->chip.direction_output = mcp23s08_direction_output;
598 mcp->chip.set = mcp23s08_set;
599 mcp->chip.dbg_show = mcp23s08_dbg_show;
600 #ifdef CONFIG_OF
601 mcp->chip.of_gpio_n_cells = 2;
602 mcp->chip.of_node = dev->of_node;
603 #endif
604
605 switch (type) {
606 #ifdef CONFIG_SPI_MASTER
607 case MCP_TYPE_S08:
608 mcp->ops = &mcp23s08_ops;
609 mcp->chip.ngpio = 8;
610 mcp->chip.label = "mcp23s08";
611 break;
612
613 case MCP_TYPE_S17:
614 mcp->ops = &mcp23s17_ops;
615 mcp->chip.ngpio = 16;
616 mcp->chip.label = "mcp23s17";
617 break;
618 #endif /* CONFIG_SPI_MASTER */
619
620 #if IS_ENABLED(CONFIG_I2C)
621 case MCP_TYPE_008:
622 mcp->ops = &mcp23008_ops;
623 mcp->chip.ngpio = 8;
624 mcp->chip.label = "mcp23008";
625 break;
626
627 case MCP_TYPE_017:
628 mcp->ops = &mcp23017_ops;
629 mcp->chip.ngpio = 16;
630 mcp->chip.label = "mcp23017";
631 break;
632 #endif /* CONFIG_I2C */
633
634 default:
635 dev_err(dev, "invalid device type (%d)\n", type);
636 return -EINVAL;
637 }
638
639 mcp->chip.base = pdata->base;
640 mcp->chip.can_sleep = true;
641 mcp->chip.dev = dev;
642 mcp->chip.owner = THIS_MODULE;
643
644 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
645 * and MCP_IOCON.HAEN = 1, so we work with all chips.
646 */
647
648 status = mcp->ops->read(mcp, MCP_IOCON);
649 if (status < 0)
650 goto fail;
651
652 mcp->irq_controller = pdata->irq_controller;
653 if (mcp->irq && mcp->irq_controller) {
654 mcp->irq_active_high =
655 of_property_read_bool(mcp->chip.dev->of_node,
656 "microchip,irq-active-high");
657
658 if (type == MCP_TYPE_017)
659 mirror = pdata->mirror;
660 }
661
662 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
663 mcp->irq_active_high) {
664 /* mcp23s17 has IOCON twice, make sure they are in sync */
665 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
666 status |= IOCON_HAEN | (IOCON_HAEN << 8);
667 if (mcp->irq_active_high)
668 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
669 else
670 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
671
672 if (mirror)
673 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
674
675 status = mcp->ops->write(mcp, MCP_IOCON, status);
676 if (status < 0)
677 goto fail;
678 }
679
680 /* configure ~100K pullups */
681 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
682 if (status < 0)
683 goto fail;
684
685 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
686 if (status < 0)
687 goto fail;
688
689 /* disable inverter on input */
690 if (mcp->cache[MCP_IPOL] != 0) {
691 mcp->cache[MCP_IPOL] = 0;
692 status = mcp->ops->write(mcp, MCP_IPOL, 0);
693 if (status < 0)
694 goto fail;
695 }
696
697 /* disable irqs */
698 if (mcp->cache[MCP_GPINTEN] != 0) {
699 mcp->cache[MCP_GPINTEN] = 0;
700 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
701 if (status < 0)
702 goto fail;
703 }
704
705 status = gpiochip_add(&mcp->chip);
706 if (status < 0)
707 goto fail;
708
709 if (mcp->irq && mcp->irq_controller) {
710 status = mcp23s08_irq_setup(mcp);
711 if (status) {
712 mcp23s08_irq_teardown(mcp);
713 goto fail;
714 }
715 }
716 fail:
717 if (status < 0)
718 dev_dbg(dev, "can't setup chip %d, --> %d\n",
719 addr, status);
720 return status;
721 }
722
723 /*----------------------------------------------------------------------*/
724
725 #ifdef CONFIG_OF
726 #ifdef CONFIG_SPI_MASTER
727 static const struct of_device_id mcp23s08_spi_of_match[] = {
728 {
729 .compatible = "microchip,mcp23s08",
730 .data = (void *) MCP_TYPE_S08,
731 },
732 {
733 .compatible = "microchip,mcp23s17",
734 .data = (void *) MCP_TYPE_S17,
735 },
736 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
737 {
738 .compatible = "mcp,mcp23s08",
739 .data = (void *) MCP_TYPE_S08,
740 },
741 {
742 .compatible = "mcp,mcp23s17",
743 .data = (void *) MCP_TYPE_S17,
744 },
745 { },
746 };
747 MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
748 #endif
749
750 #if IS_ENABLED(CONFIG_I2C)
751 static const struct of_device_id mcp23s08_i2c_of_match[] = {
752 {
753 .compatible = "microchip,mcp23008",
754 .data = (void *) MCP_TYPE_008,
755 },
756 {
757 .compatible = "microchip,mcp23017",
758 .data = (void *) MCP_TYPE_017,
759 },
760 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
761 {
762 .compatible = "mcp,mcp23008",
763 .data = (void *) MCP_TYPE_008,
764 },
765 {
766 .compatible = "mcp,mcp23017",
767 .data = (void *) MCP_TYPE_017,
768 },
769 { },
770 };
771 MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
772 #endif
773 #endif /* CONFIG_OF */
774
775
776 #if IS_ENABLED(CONFIG_I2C)
777
mcp230xx_probe(struct i2c_client * client,const struct i2c_device_id * id)778 static int mcp230xx_probe(struct i2c_client *client,
779 const struct i2c_device_id *id)
780 {
781 struct mcp23s08_platform_data *pdata, local_pdata;
782 struct mcp23s08 *mcp;
783 int status;
784 const struct of_device_id *match;
785
786 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
787 &client->dev);
788 if (match) {
789 pdata = &local_pdata;
790 pdata->base = -1;
791 pdata->chip[0].pullups = 0;
792 pdata->irq_controller = of_property_read_bool(
793 client->dev.of_node,
794 "interrupt-controller");
795 pdata->mirror = of_property_read_bool(client->dev.of_node,
796 "microchip,irq-mirror");
797 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
798 } else {
799 pdata = dev_get_platdata(&client->dev);
800 if (!pdata) {
801 pdata = devm_kzalloc(&client->dev,
802 sizeof(struct mcp23s08_platform_data),
803 GFP_KERNEL);
804 pdata->base = -1;
805 }
806 }
807
808 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
809 if (!mcp)
810 return -ENOMEM;
811
812 mcp->irq = client->irq;
813 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
814 id->driver_data, pdata, 0);
815 if (status)
816 goto fail;
817
818 i2c_set_clientdata(client, mcp);
819
820 return 0;
821
822 fail:
823 kfree(mcp);
824
825 return status;
826 }
827
mcp230xx_remove(struct i2c_client * client)828 static int mcp230xx_remove(struct i2c_client *client)
829 {
830 struct mcp23s08 *mcp = i2c_get_clientdata(client);
831
832 if (client->irq && mcp->irq_controller)
833 mcp23s08_irq_teardown(mcp);
834
835 gpiochip_remove(&mcp->chip);
836 kfree(mcp);
837
838 return 0;
839 }
840
841 static const struct i2c_device_id mcp230xx_id[] = {
842 { "mcp23008", MCP_TYPE_008 },
843 { "mcp23017", MCP_TYPE_017 },
844 { },
845 };
846 MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
847
848 static struct i2c_driver mcp230xx_driver = {
849 .driver = {
850 .name = "mcp230xx",
851 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
852 },
853 .probe = mcp230xx_probe,
854 .remove = mcp230xx_remove,
855 .id_table = mcp230xx_id,
856 };
857
mcp23s08_i2c_init(void)858 static int __init mcp23s08_i2c_init(void)
859 {
860 return i2c_add_driver(&mcp230xx_driver);
861 }
862
mcp23s08_i2c_exit(void)863 static void mcp23s08_i2c_exit(void)
864 {
865 i2c_del_driver(&mcp230xx_driver);
866 }
867
868 #else
869
mcp23s08_i2c_init(void)870 static int __init mcp23s08_i2c_init(void) { return 0; }
mcp23s08_i2c_exit(void)871 static void mcp23s08_i2c_exit(void) { }
872
873 #endif /* CONFIG_I2C */
874
875 /*----------------------------------------------------------------------*/
876
877 #ifdef CONFIG_SPI_MASTER
878
mcp23s08_probe(struct spi_device * spi)879 static int mcp23s08_probe(struct spi_device *spi)
880 {
881 struct mcp23s08_platform_data *pdata, local_pdata;
882 unsigned addr;
883 int chips = 0;
884 struct mcp23s08_driver_data *data;
885 int status, type;
886 unsigned ngpio = 0;
887 const struct of_device_id *match;
888 u32 spi_present_mask = 0;
889
890 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
891 if (match) {
892 type = (int)(uintptr_t)match->data;
893 status = of_property_read_u32(spi->dev.of_node,
894 "microchip,spi-present-mask", &spi_present_mask);
895 if (status) {
896 status = of_property_read_u32(spi->dev.of_node,
897 "mcp,spi-present-mask", &spi_present_mask);
898 if (status) {
899 dev_err(&spi->dev,
900 "DT has no spi-present-mask\n");
901 return -ENODEV;
902 }
903 }
904 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
905 dev_err(&spi->dev, "invalid spi-present-mask\n");
906 return -ENODEV;
907 }
908
909 pdata = &local_pdata;
910 pdata->base = -1;
911 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
912 pdata->chip[addr].pullups = 0;
913 if (spi_present_mask & (1 << addr))
914 chips++;
915 }
916 pdata->irq_controller = of_property_read_bool(
917 spi->dev.of_node,
918 "interrupt-controller");
919 pdata->mirror = of_property_read_bool(spi->dev.of_node,
920 "microchip,irq-mirror");
921 } else {
922 type = spi_get_device_id(spi)->driver_data;
923 pdata = dev_get_platdata(&spi->dev);
924 if (!pdata) {
925 pdata = devm_kzalloc(&spi->dev,
926 sizeof(struct mcp23s08_platform_data),
927 GFP_KERNEL);
928 pdata->base = -1;
929 }
930
931 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
932 if (!pdata->chip[addr].is_present)
933 continue;
934 chips++;
935 if ((type == MCP_TYPE_S08) && (addr > 3)) {
936 dev_err(&spi->dev,
937 "mcp23s08 only supports address 0..3\n");
938 return -EINVAL;
939 }
940 spi_present_mask |= 1 << addr;
941 }
942 }
943
944 if (!chips)
945 return -ENODEV;
946
947 data = devm_kzalloc(&spi->dev,
948 sizeof(*data) + chips * sizeof(struct mcp23s08),
949 GFP_KERNEL);
950 if (!data)
951 return -ENOMEM;
952
953 spi_set_drvdata(spi, data);
954
955 spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
956
957 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
958 if (!(spi_present_mask & (1 << addr)))
959 continue;
960 chips--;
961 data->mcp[addr] = &data->chip[chips];
962 data->mcp[addr]->irq = spi->irq;
963 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
964 0x40 | (addr << 1), type, pdata,
965 addr);
966 if (status < 0)
967 goto fail;
968
969 if (pdata->base != -1)
970 pdata->base += (type == MCP_TYPE_S17) ? 16 : 8;
971 ngpio += (type == MCP_TYPE_S17) ? 16 : 8;
972 }
973 data->ngpio = ngpio;
974
975 /* NOTE: these chips have a relatively sane IRQ framework, with
976 * per-signal masking and level/edge triggering. It's not yet
977 * handled here...
978 */
979
980 return 0;
981
982 fail:
983 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
984
985 if (!data->mcp[addr])
986 continue;
987 gpiochip_remove(&data->mcp[addr]->chip);
988 }
989 return status;
990 }
991
mcp23s08_remove(struct spi_device * spi)992 static int mcp23s08_remove(struct spi_device *spi)
993 {
994 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
995 unsigned addr;
996
997 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
998
999 if (!data->mcp[addr])
1000 continue;
1001
1002 if (spi->irq && data->mcp[addr]->irq_controller)
1003 mcp23s08_irq_teardown(data->mcp[addr]);
1004 gpiochip_remove(&data->mcp[addr]->chip);
1005 }
1006
1007 return 0;
1008 }
1009
1010 static const struct spi_device_id mcp23s08_ids[] = {
1011 { "mcp23s08", MCP_TYPE_S08 },
1012 { "mcp23s17", MCP_TYPE_S17 },
1013 { },
1014 };
1015 MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
1016
1017 static struct spi_driver mcp23s08_driver = {
1018 .probe = mcp23s08_probe,
1019 .remove = mcp23s08_remove,
1020 .id_table = mcp23s08_ids,
1021 .driver = {
1022 .name = "mcp23s08",
1023 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
1024 },
1025 };
1026
mcp23s08_spi_init(void)1027 static int __init mcp23s08_spi_init(void)
1028 {
1029 return spi_register_driver(&mcp23s08_driver);
1030 }
1031
mcp23s08_spi_exit(void)1032 static void mcp23s08_spi_exit(void)
1033 {
1034 spi_unregister_driver(&mcp23s08_driver);
1035 }
1036
1037 #else
1038
mcp23s08_spi_init(void)1039 static int __init mcp23s08_spi_init(void) { return 0; }
mcp23s08_spi_exit(void)1040 static void mcp23s08_spi_exit(void) { }
1041
1042 #endif /* CONFIG_SPI_MASTER */
1043
1044 /*----------------------------------------------------------------------*/
1045
mcp23s08_init(void)1046 static int __init mcp23s08_init(void)
1047 {
1048 int ret;
1049
1050 ret = mcp23s08_spi_init();
1051 if (ret)
1052 goto spi_fail;
1053
1054 ret = mcp23s08_i2c_init();
1055 if (ret)
1056 goto i2c_fail;
1057
1058 return 0;
1059
1060 i2c_fail:
1061 mcp23s08_spi_exit();
1062 spi_fail:
1063 return ret;
1064 }
1065 /* register after spi/i2c postcore initcall and before
1066 * subsys initcalls that may rely on these GPIOs
1067 */
1068 subsys_initcall(mcp23s08_init);
1069
mcp23s08_exit(void)1070 static void __exit mcp23s08_exit(void)
1071 {
1072 mcp23s08_spi_exit();
1073 mcp23s08_i2c_exit();
1074 }
1075 module_exit(mcp23s08_exit);
1076
1077 MODULE_LICENSE("GPL");
1078