1 /*
2 * V4L2 Driver for i.MX3x camera host
3 *
4 * Copyright (C) 2008
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/videodev2.h>
15 #include <linux/platform_device.h>
16 #include <linux/clk.h>
17 #include <linux/vmalloc.h>
18 #include <linux/interrupt.h>
19 #include <linux/sched.h>
20 #include <linux/dma/ipu-dma.h>
21
22 #include <media/v4l2-common.h>
23 #include <media/v4l2-dev.h>
24 #include <media/videobuf2-dma-contig.h>
25 #include <media/soc_camera.h>
26 #include <media/soc_mediabus.h>
27
28 #include <linux/platform_data/camera-mx3.h>
29 #include <linux/platform_data/dma-imx.h>
30
31 #define MX3_CAM_DRV_NAME "mx3-camera"
32
33 /* CMOS Sensor Interface Registers */
34 #define CSI_REG_START 0x60
35
36 #define CSI_SENS_CONF (0x60 - CSI_REG_START)
37 #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
38 #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
39 #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
40 #define CSI_TST_CTRL (0x70 - CSI_REG_START)
41 #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
42 #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
43 #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
44 #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
45 #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
46
47 #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
48 #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
49 #define CSI_SENS_CONF_DATA_POL_SHIFT 2
50 #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
51 #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
52 #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
53 #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
54 #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
55 #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
56 #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
57
58 #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
59 #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
60 #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
61
62 #define MAX_VIDEO_MEM 16
63
64 struct mx3_camera_buffer {
65 /* common v4l buffer stuff -- must be first */
66 struct vb2_v4l2_buffer vb;
67 struct list_head queue;
68
69 /* One descriptot per scatterlist (per frame) */
70 struct dma_async_tx_descriptor *txd;
71
72 /* We have to "build" a scatterlist ourselves - one element per frame */
73 struct scatterlist sg;
74 };
75
76 /**
77 * struct mx3_camera_dev - i.MX3x camera (CSI) object
78 * @dev: camera device, to which the coherent buffer is attached
79 * @icd: currently attached camera sensor
80 * @clk: pointer to clock
81 * @base: remapped register base address
82 * @pdata: platform data
83 * @platform_flags: platform flags
84 * @mclk: master clock frequency in Hz
85 * @capture: list of capture videobuffers
86 * @lock: protects video buffer lists
87 * @active: active video buffer
88 * @idmac_channel: array of pointers to IPU DMAC DMA channels
89 * @soc_host: embedded soc_host object
90 */
91 struct mx3_camera_dev {
92 /*
93 * i.MX3x is only supposed to handle one camera on its Camera Sensor
94 * Interface. If anyone ever builds hardware to enable more than one
95 * camera _simultaneously_, they will have to modify this driver too
96 */
97 struct clk *clk;
98
99 void __iomem *base;
100
101 struct mx3_camera_pdata *pdata;
102
103 unsigned long platform_flags;
104 unsigned long mclk;
105 u16 width_flags; /* max 15 bits */
106
107 struct list_head capture;
108 spinlock_t lock; /* Protects video buffer lists */
109 struct mx3_camera_buffer *active;
110 size_t buf_total;
111 struct vb2_alloc_ctx *alloc_ctx;
112 enum v4l2_field field;
113 int sequence;
114
115 /* IDMAC / dmaengine interface */
116 struct idmac_channel *idmac_channel[1]; /* We need one channel */
117
118 struct soc_camera_host soc_host;
119 };
120
121 struct dma_chan_request {
122 struct mx3_camera_dev *mx3_cam;
123 enum ipu_channel id;
124 };
125
csi_reg_read(struct mx3_camera_dev * mx3,off_t reg)126 static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
127 {
128 return __raw_readl(mx3->base + reg);
129 }
130
csi_reg_write(struct mx3_camera_dev * mx3,u32 value,off_t reg)131 static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
132 {
133 __raw_writel(value, mx3->base + reg);
134 }
135
to_mx3_vb(struct vb2_v4l2_buffer * vb)136 static struct mx3_camera_buffer *to_mx3_vb(struct vb2_v4l2_buffer *vb)
137 {
138 return container_of(vb, struct mx3_camera_buffer, vb);
139 }
140
141 /* Called from the IPU IDMAC ISR */
mx3_cam_dma_done(void * arg)142 static void mx3_cam_dma_done(void *arg)
143 {
144 struct idmac_tx_desc *desc = to_tx_desc(arg);
145 struct dma_chan *chan = desc->txd.chan;
146 struct idmac_channel *ichannel = to_idmac_chan(chan);
147 struct mx3_camera_dev *mx3_cam = ichannel->client;
148
149 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
150 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
151
152 spin_lock(&mx3_cam->lock);
153 if (mx3_cam->active) {
154 struct vb2_v4l2_buffer *vb = &mx3_cam->active->vb;
155 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
156
157 list_del_init(&buf->queue);
158 v4l2_get_timestamp(&vb->timestamp);
159 vb->field = mx3_cam->field;
160 vb->sequence = mx3_cam->sequence++;
161 vb2_buffer_done(&vb->vb2_buf, VB2_BUF_STATE_DONE);
162 }
163
164 if (list_empty(&mx3_cam->capture)) {
165 mx3_cam->active = NULL;
166 spin_unlock(&mx3_cam->lock);
167
168 /*
169 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
170 * not get updated
171 */
172 return;
173 }
174
175 mx3_cam->active = list_entry(mx3_cam->capture.next,
176 struct mx3_camera_buffer, queue);
177 spin_unlock(&mx3_cam->lock);
178 }
179
180 /*
181 * Videobuf operations
182 */
183
184 /*
185 * Calculate the __buffer__ (not data) size and number of buffers.
186 */
mx3_videobuf_setup(struct vb2_queue * vq,const void * parg,unsigned int * count,unsigned int * num_planes,unsigned int sizes[],void * alloc_ctxs[])187 static int mx3_videobuf_setup(struct vb2_queue *vq,
188 const void *parg,
189 unsigned int *count, unsigned int *num_planes,
190 unsigned int sizes[], void *alloc_ctxs[])
191 {
192 const struct v4l2_format *fmt = parg;
193 struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
194 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
195 struct mx3_camera_dev *mx3_cam = ici->priv;
196
197 if (!mx3_cam->idmac_channel[0])
198 return -EINVAL;
199
200 if (fmt) {
201 const struct soc_camera_format_xlate *xlate = soc_camera_xlate_by_fourcc(icd,
202 fmt->fmt.pix.pixelformat);
203 unsigned int bytes_per_line;
204 int ret;
205
206 if (!xlate)
207 return -EINVAL;
208
209 ret = soc_mbus_bytes_per_line(fmt->fmt.pix.width,
210 xlate->host_fmt);
211 if (ret < 0)
212 return ret;
213
214 bytes_per_line = max_t(u32, fmt->fmt.pix.bytesperline, ret);
215
216 ret = soc_mbus_image_size(xlate->host_fmt, bytes_per_line,
217 fmt->fmt.pix.height);
218 if (ret < 0)
219 return ret;
220
221 sizes[0] = max_t(u32, fmt->fmt.pix.sizeimage, ret);
222 } else {
223 /* Called from VIDIOC_REQBUFS or in compatibility mode */
224 sizes[0] = icd->sizeimage;
225 }
226
227 alloc_ctxs[0] = mx3_cam->alloc_ctx;
228
229 if (!vq->num_buffers)
230 mx3_cam->sequence = 0;
231
232 if (!*count)
233 *count = 2;
234
235 /* If *num_planes != 0, we have already verified *count. */
236 if (!*num_planes &&
237 sizes[0] * *count + mx3_cam->buf_total > MAX_VIDEO_MEM * 1024 * 1024)
238 *count = (MAX_VIDEO_MEM * 1024 * 1024 - mx3_cam->buf_total) /
239 sizes[0];
240
241 *num_planes = 1;
242
243 return 0;
244 }
245
fourcc_to_ipu_pix(__u32 fourcc)246 static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
247 {
248 /* Add more formats as need arises and test possibilities appear... */
249 switch (fourcc) {
250 case V4L2_PIX_FMT_RGB24:
251 return IPU_PIX_FMT_RGB24;
252 case V4L2_PIX_FMT_UYVY:
253 case V4L2_PIX_FMT_RGB565:
254 default:
255 return IPU_PIX_FMT_GENERIC;
256 }
257 }
258
mx3_videobuf_queue(struct vb2_buffer * vb)259 static void mx3_videobuf_queue(struct vb2_buffer *vb)
260 {
261 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
262 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
263 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
264 struct mx3_camera_dev *mx3_cam = ici->priv;
265 struct mx3_camera_buffer *buf = to_mx3_vb(vbuf);
266 struct scatterlist *sg = &buf->sg;
267 struct dma_async_tx_descriptor *txd;
268 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
269 struct idmac_video_param *video = &ichan->params.video;
270 const struct soc_mbus_pixelfmt *host_fmt = icd->current_fmt->host_fmt;
271 dma_cookie_t cookie;
272 size_t new_size;
273
274 new_size = icd->sizeimage;
275
276 if (vb2_plane_size(vb, 0) < new_size) {
277 dev_err(icd->parent, "Buffer #%d too small (%lu < %zu)\n",
278 vbuf->vb2_buf.index, vb2_plane_size(vb, 0), new_size);
279 goto error;
280 }
281
282 if (!buf->txd) {
283 sg_dma_address(sg) = vb2_dma_contig_plane_dma_addr(vb, 0);
284 sg_dma_len(sg) = new_size;
285
286 txd = dmaengine_prep_slave_sg(
287 &ichan->dma_chan, sg, 1, DMA_DEV_TO_MEM,
288 DMA_PREP_INTERRUPT);
289 if (!txd)
290 goto error;
291
292 txd->callback_param = txd;
293 txd->callback = mx3_cam_dma_done;
294
295 buf->txd = txd;
296 } else {
297 txd = buf->txd;
298 }
299
300 vb2_set_plane_payload(vb, 0, new_size);
301
302 /* This is the configuration of one sg-element */
303 video->out_pixel_fmt = fourcc_to_ipu_pix(host_fmt->fourcc);
304
305 if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
306 /*
307 * If the IPU DMA channel is configured to transfer generic
308 * 8-bit data, we have to set up the geometry parameters
309 * correctly, according to the current pixel format. The DMA
310 * horizontal parameters in this case are expressed in bytes,
311 * not in pixels.
312 */
313 video->out_width = icd->bytesperline;
314 video->out_height = icd->user_height;
315 video->out_stride = icd->bytesperline;
316 } else {
317 /*
318 * For IPU known formats the pixel unit will be managed
319 * successfully by the IPU code
320 */
321 video->out_width = icd->user_width;
322 video->out_height = icd->user_height;
323 video->out_stride = icd->user_width;
324 }
325
326 #ifdef DEBUG
327 /* helps to see what DMA actually has written */
328 if (vb2_plane_vaddr(vb, 0))
329 memset(vb2_plane_vaddr(vb, 0), 0xaa, vb2_get_plane_payload(vb, 0));
330 #endif
331
332 spin_lock_irq(&mx3_cam->lock);
333 list_add_tail(&buf->queue, &mx3_cam->capture);
334
335 if (!mx3_cam->active)
336 mx3_cam->active = buf;
337
338 spin_unlock_irq(&mx3_cam->lock);
339
340 cookie = txd->tx_submit(txd);
341 dev_dbg(icd->parent, "Submitted cookie %d DMA 0x%08x\n",
342 cookie, sg_dma_address(&buf->sg));
343
344 if (cookie >= 0)
345 return;
346
347 spin_lock_irq(&mx3_cam->lock);
348
349 /* Submit error */
350 list_del_init(&buf->queue);
351
352 if (mx3_cam->active == buf)
353 mx3_cam->active = NULL;
354
355 spin_unlock_irq(&mx3_cam->lock);
356 error:
357 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
358 }
359
mx3_videobuf_release(struct vb2_buffer * vb)360 static void mx3_videobuf_release(struct vb2_buffer *vb)
361 {
362 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
363 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
364 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
365 struct mx3_camera_dev *mx3_cam = ici->priv;
366 struct mx3_camera_buffer *buf = to_mx3_vb(vbuf);
367 struct dma_async_tx_descriptor *txd = buf->txd;
368 unsigned long flags;
369
370 dev_dbg(icd->parent,
371 "Release%s DMA 0x%08x, queue %sempty\n",
372 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
373 list_empty(&buf->queue) ? "" : "not ");
374
375 spin_lock_irqsave(&mx3_cam->lock, flags);
376
377 if (mx3_cam->active == buf)
378 mx3_cam->active = NULL;
379
380 /* Doesn't hurt also if the list is empty */
381 list_del_init(&buf->queue);
382
383 if (txd) {
384 buf->txd = NULL;
385 if (mx3_cam->idmac_channel[0])
386 async_tx_ack(txd);
387 }
388
389 spin_unlock_irqrestore(&mx3_cam->lock, flags);
390
391 mx3_cam->buf_total -= vb2_plane_size(vb, 0);
392 }
393
mx3_videobuf_init(struct vb2_buffer * vb)394 static int mx3_videobuf_init(struct vb2_buffer *vb)
395 {
396 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
397 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
398 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
399 struct mx3_camera_dev *mx3_cam = ici->priv;
400 struct mx3_camera_buffer *buf = to_mx3_vb(vbuf);
401
402 if (!buf->txd) {
403 /* This is for locking debugging only */
404 INIT_LIST_HEAD(&buf->queue);
405 sg_init_table(&buf->sg, 1);
406
407 mx3_cam->buf_total += vb2_plane_size(vb, 0);
408 }
409
410 return 0;
411 }
412
mx3_stop_streaming(struct vb2_queue * q)413 static void mx3_stop_streaming(struct vb2_queue *q)
414 {
415 struct soc_camera_device *icd = soc_camera_from_vb2q(q);
416 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
417 struct mx3_camera_dev *mx3_cam = ici->priv;
418 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
419 struct mx3_camera_buffer *buf, *tmp;
420 unsigned long flags;
421
422 if (ichan)
423 dmaengine_pause(&ichan->dma_chan);
424
425 spin_lock_irqsave(&mx3_cam->lock, flags);
426
427 mx3_cam->active = NULL;
428
429 list_for_each_entry_safe(buf, tmp, &mx3_cam->capture, queue) {
430 list_del_init(&buf->queue);
431 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
432 }
433
434 spin_unlock_irqrestore(&mx3_cam->lock, flags);
435 }
436
437 static struct vb2_ops mx3_videobuf_ops = {
438 .queue_setup = mx3_videobuf_setup,
439 .buf_queue = mx3_videobuf_queue,
440 .buf_cleanup = mx3_videobuf_release,
441 .buf_init = mx3_videobuf_init,
442 .wait_prepare = vb2_ops_wait_prepare,
443 .wait_finish = vb2_ops_wait_finish,
444 .stop_streaming = mx3_stop_streaming,
445 };
446
mx3_camera_init_videobuf(struct vb2_queue * q,struct soc_camera_device * icd)447 static int mx3_camera_init_videobuf(struct vb2_queue *q,
448 struct soc_camera_device *icd)
449 {
450 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
451
452 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
453 q->io_modes = VB2_MMAP | VB2_USERPTR;
454 q->drv_priv = icd;
455 q->ops = &mx3_videobuf_ops;
456 q->mem_ops = &vb2_dma_contig_memops;
457 q->buf_struct_size = sizeof(struct mx3_camera_buffer);
458 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
459 q->lock = &ici->host_lock;
460
461 return vb2_queue_init(q);
462 }
463
464 /* First part of ipu_csi_init_interface() */
mx3_camera_activate(struct mx3_camera_dev * mx3_cam)465 static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam)
466 {
467 u32 conf;
468 long rate;
469
470 /* Set default size: ipu_csi_set_window_size() */
471 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
472 /* ...and position to 0:0: ipu_csi_set_window_pos() */
473 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
474 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
475
476 /* We use only gated clock synchronisation mode so far */
477 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
478
479 /* Set generic data, platform-biggest bus-width */
480 conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
481
482 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
483 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
484 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
485 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
486 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
487 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
488 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
489 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
490
491 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
492 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
493 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
494 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
495 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
496 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
497 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
498 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
499 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
500 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
501 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
502 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
503
504 /* ipu_csi_init_interface() */
505 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
506
507 clk_prepare_enable(mx3_cam->clk);
508 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
509 dev_dbg(mx3_cam->soc_host.v4l2_dev.dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
510 if (rate)
511 clk_set_rate(mx3_cam->clk, rate);
512 }
513
mx3_camera_add_device(struct soc_camera_device * icd)514 static int mx3_camera_add_device(struct soc_camera_device *icd)
515 {
516 dev_info(icd->parent, "MX3 Camera driver attached to camera %d\n",
517 icd->devnum);
518
519 return 0;
520 }
521
mx3_camera_remove_device(struct soc_camera_device * icd)522 static void mx3_camera_remove_device(struct soc_camera_device *icd)
523 {
524 dev_info(icd->parent, "MX3 Camera driver detached from camera %d\n",
525 icd->devnum);
526 }
527
528 /* Called with .host_lock held */
mx3_camera_clock_start(struct soc_camera_host * ici)529 static int mx3_camera_clock_start(struct soc_camera_host *ici)
530 {
531 struct mx3_camera_dev *mx3_cam = ici->priv;
532
533 mx3_camera_activate(mx3_cam);
534
535 mx3_cam->buf_total = 0;
536
537 return 0;
538 }
539
540 /* Called with .host_lock held */
mx3_camera_clock_stop(struct soc_camera_host * ici)541 static void mx3_camera_clock_stop(struct soc_camera_host *ici)
542 {
543 struct mx3_camera_dev *mx3_cam = ici->priv;
544 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
545
546 if (*ichan) {
547 dma_release_channel(&(*ichan)->dma_chan);
548 *ichan = NULL;
549 }
550
551 clk_disable_unprepare(mx3_cam->clk);
552 }
553
test_platform_param(struct mx3_camera_dev * mx3_cam,unsigned char buswidth,unsigned long * flags)554 static int test_platform_param(struct mx3_camera_dev *mx3_cam,
555 unsigned char buswidth, unsigned long *flags)
556 {
557 /*
558 * If requested data width is supported by the platform, use it or any
559 * possible lower value - i.MX31 is smart enough to shift bits
560 */
561 if (buswidth > fls(mx3_cam->width_flags))
562 return -EINVAL;
563
564 /*
565 * Platform specified synchronization and pixel clock polarities are
566 * only a recommendation and are only used during probing. MX3x
567 * camera interface only works in master mode, i.e., uses HSYNC and
568 * VSYNC signals from the sensor
569 */
570 *flags = V4L2_MBUS_MASTER |
571 V4L2_MBUS_HSYNC_ACTIVE_HIGH |
572 V4L2_MBUS_HSYNC_ACTIVE_LOW |
573 V4L2_MBUS_VSYNC_ACTIVE_HIGH |
574 V4L2_MBUS_VSYNC_ACTIVE_LOW |
575 V4L2_MBUS_PCLK_SAMPLE_RISING |
576 V4L2_MBUS_PCLK_SAMPLE_FALLING |
577 V4L2_MBUS_DATA_ACTIVE_HIGH |
578 V4L2_MBUS_DATA_ACTIVE_LOW;
579
580 return 0;
581 }
582
mx3_camera_try_bus_param(struct soc_camera_device * icd,const unsigned int depth)583 static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
584 const unsigned int depth)
585 {
586 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
587 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
588 struct mx3_camera_dev *mx3_cam = ici->priv;
589 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
590 unsigned long bus_flags, common_flags;
591 int ret = test_platform_param(mx3_cam, depth, &bus_flags);
592
593 dev_dbg(icd->parent, "request bus width %d bit: %d\n", depth, ret);
594
595 if (ret < 0)
596 return ret;
597
598 ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
599 if (!ret) {
600 common_flags = soc_mbus_config_compatible(&cfg,
601 bus_flags);
602 if (!common_flags) {
603 dev_warn(icd->parent,
604 "Flags incompatible: camera 0x%x, host 0x%lx\n",
605 cfg.flags, bus_flags);
606 return -EINVAL;
607 }
608 } else if (ret != -ENOIOCTLCMD) {
609 return ret;
610 }
611
612 return 0;
613 }
614
chan_filter(struct dma_chan * chan,void * arg)615 static bool chan_filter(struct dma_chan *chan, void *arg)
616 {
617 struct dma_chan_request *rq = arg;
618 struct mx3_camera_pdata *pdata;
619
620 if (!imx_dma_is_ipu(chan))
621 return false;
622
623 if (!rq)
624 return false;
625
626 pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
627
628 return rq->id == chan->chan_id &&
629 pdata->dma_dev == chan->device->dev;
630 }
631
632 static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
633 {
634 .fourcc = V4L2_PIX_FMT_SBGGR8,
635 .name = "Bayer BGGR (sRGB) 8 bit",
636 .bits_per_sample = 8,
637 .packing = SOC_MBUS_PACKING_NONE,
638 .order = SOC_MBUS_ORDER_LE,
639 .layout = SOC_MBUS_LAYOUT_PACKED,
640 }, {
641 .fourcc = V4L2_PIX_FMT_GREY,
642 .name = "Monochrome 8 bit",
643 .bits_per_sample = 8,
644 .packing = SOC_MBUS_PACKING_NONE,
645 .order = SOC_MBUS_ORDER_LE,
646 .layout = SOC_MBUS_LAYOUT_PACKED,
647 },
648 };
649
650 /* This will be corrected as we get more formats */
mx3_camera_packing_supported(const struct soc_mbus_pixelfmt * fmt)651 static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
652 {
653 return fmt->packing == SOC_MBUS_PACKING_NONE ||
654 (fmt->bits_per_sample == 8 &&
655 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
656 (fmt->bits_per_sample > 8 &&
657 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
658 }
659
mx3_camera_get_formats(struct soc_camera_device * icd,unsigned int idx,struct soc_camera_format_xlate * xlate)660 static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int idx,
661 struct soc_camera_format_xlate *xlate)
662 {
663 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
664 struct device *dev = icd->parent;
665 int formats = 0, ret;
666 struct v4l2_subdev_mbus_code_enum code = {
667 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
668 .index = idx,
669 };
670 const struct soc_mbus_pixelfmt *fmt;
671
672 ret = v4l2_subdev_call(sd, pad, enum_mbus_code, NULL, &code);
673 if (ret < 0)
674 /* No more formats */
675 return 0;
676
677 fmt = soc_mbus_get_fmtdesc(code.code);
678 if (!fmt) {
679 dev_warn(icd->parent,
680 "Unsupported format code #%u: 0x%x\n", idx, code.code);
681 return 0;
682 }
683
684 /* This also checks support for the requested bits-per-sample */
685 ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
686 if (ret < 0)
687 return 0;
688
689 switch (code.code) {
690 case MEDIA_BUS_FMT_SBGGR10_1X10:
691 formats++;
692 if (xlate) {
693 xlate->host_fmt = &mx3_camera_formats[0];
694 xlate->code = code.code;
695 xlate++;
696 dev_dbg(dev, "Providing format %s using code 0x%x\n",
697 mx3_camera_formats[0].name, code.code);
698 }
699 break;
700 case MEDIA_BUS_FMT_Y10_1X10:
701 formats++;
702 if (xlate) {
703 xlate->host_fmt = &mx3_camera_formats[1];
704 xlate->code = code.code;
705 xlate++;
706 dev_dbg(dev, "Providing format %s using code 0x%x\n",
707 mx3_camera_formats[1].name, code.code);
708 }
709 break;
710 default:
711 if (!mx3_camera_packing_supported(fmt))
712 return 0;
713 }
714
715 /* Generic pass-through */
716 formats++;
717 if (xlate) {
718 xlate->host_fmt = fmt;
719 xlate->code = code.code;
720 dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
721 (fmt->fourcc >> (0*8)) & 0xFF,
722 (fmt->fourcc >> (1*8)) & 0xFF,
723 (fmt->fourcc >> (2*8)) & 0xFF,
724 (fmt->fourcc >> (3*8)) & 0xFF);
725 xlate++;
726 }
727
728 return formats;
729 }
730
configure_geometry(struct mx3_camera_dev * mx3_cam,unsigned int width,unsigned int height,const struct soc_mbus_pixelfmt * fmt)731 static void configure_geometry(struct mx3_camera_dev *mx3_cam,
732 unsigned int width, unsigned int height,
733 const struct soc_mbus_pixelfmt *fmt)
734 {
735 u32 ctrl, width_field, height_field;
736
737 if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
738 /*
739 * As the CSI will be configured to output BAYER, here
740 * the width parameter count the number of samples to
741 * capture to complete the whole image width.
742 */
743 unsigned int num, den;
744 int ret = soc_mbus_samples_per_pixel(fmt, &num, &den);
745 BUG_ON(ret < 0);
746 width = width * num / den;
747 }
748
749 /* Setup frame size - this cannot be changed on-the-fly... */
750 width_field = width - 1;
751 height_field = height - 1;
752 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
753
754 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
755 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
756
757 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
758
759 /* ...and position */
760 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
761 /* Sensor does the cropping */
762 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
763 }
764
acquire_dma_channel(struct mx3_camera_dev * mx3_cam)765 static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
766 {
767 dma_cap_mask_t mask;
768 struct dma_chan *chan;
769 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
770 /* We have to use IDMAC_IC_7 for Bayer / generic data */
771 struct dma_chan_request rq = {.mx3_cam = mx3_cam,
772 .id = IDMAC_IC_7};
773
774 dma_cap_zero(mask);
775 dma_cap_set(DMA_SLAVE, mask);
776 dma_cap_set(DMA_PRIVATE, mask);
777 chan = dma_request_channel(mask, chan_filter, &rq);
778 if (!chan)
779 return -EBUSY;
780
781 *ichan = to_idmac_chan(chan);
782 (*ichan)->client = mx3_cam;
783
784 return 0;
785 }
786
787 /*
788 * FIXME: learn to use stride != width, then we can keep stride properly aligned
789 * and support arbitrary (even) widths.
790 */
stride_align(__u32 * width)791 static inline void stride_align(__u32 *width)
792 {
793 if (ALIGN(*width, 8) < 4096)
794 *width = ALIGN(*width, 8);
795 else
796 *width = *width & ~7;
797 }
798
799 /*
800 * As long as we don't implement host-side cropping and scaling, we can use
801 * default g_crop and cropcap from soc_camera.c
802 */
mx3_camera_set_crop(struct soc_camera_device * icd,const struct v4l2_crop * a)803 static int mx3_camera_set_crop(struct soc_camera_device *icd,
804 const struct v4l2_crop *a)
805 {
806 struct v4l2_crop a_writable = *a;
807 struct v4l2_rect *rect = &a_writable.c;
808 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
809 struct mx3_camera_dev *mx3_cam = ici->priv;
810 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
811 struct v4l2_subdev_format fmt = {
812 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
813 };
814 struct v4l2_mbus_framefmt *mf = &fmt.format;
815 int ret;
816
817 soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
818 soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
819
820 ret = v4l2_subdev_call(sd, video, s_crop, a);
821 if (ret < 0)
822 return ret;
823
824 /* The capture device might have changed its output sizes */
825 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt);
826 if (ret < 0)
827 return ret;
828
829 if (mf->code != icd->current_fmt->code)
830 return -EINVAL;
831
832 if (mf->width & 7) {
833 /* Ouch! We can only handle 8-byte aligned width... */
834 stride_align(&mf->width);
835 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &fmt);
836 if (ret < 0)
837 return ret;
838 }
839
840 if (mf->width != icd->user_width || mf->height != icd->user_height)
841 configure_geometry(mx3_cam, mf->width, mf->height,
842 icd->current_fmt->host_fmt);
843
844 dev_dbg(icd->parent, "Sensor cropped %dx%d\n",
845 mf->width, mf->height);
846
847 icd->user_width = mf->width;
848 icd->user_height = mf->height;
849
850 return ret;
851 }
852
mx3_camera_set_fmt(struct soc_camera_device * icd,struct v4l2_format * f)853 static int mx3_camera_set_fmt(struct soc_camera_device *icd,
854 struct v4l2_format *f)
855 {
856 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
857 struct mx3_camera_dev *mx3_cam = ici->priv;
858 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
859 const struct soc_camera_format_xlate *xlate;
860 struct v4l2_pix_format *pix = &f->fmt.pix;
861 struct v4l2_subdev_format format = {
862 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
863 };
864 struct v4l2_mbus_framefmt *mf = &format.format;
865 int ret;
866
867 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
868 if (!xlate) {
869 dev_warn(icd->parent, "Format %x not found\n",
870 pix->pixelformat);
871 return -EINVAL;
872 }
873
874 stride_align(&pix->width);
875 dev_dbg(icd->parent, "Set format %dx%d\n", pix->width, pix->height);
876
877 /*
878 * Might have to perform a complete interface initialisation like in
879 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
880 * mxc_v4l2_s_fmt()
881 */
882
883 configure_geometry(mx3_cam, pix->width, pix->height, xlate->host_fmt);
884
885 mf->width = pix->width;
886 mf->height = pix->height;
887 mf->field = pix->field;
888 mf->colorspace = pix->colorspace;
889 mf->code = xlate->code;
890
891 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &format);
892 if (ret < 0)
893 return ret;
894
895 if (mf->code != xlate->code)
896 return -EINVAL;
897
898 if (!mx3_cam->idmac_channel[0]) {
899 ret = acquire_dma_channel(mx3_cam);
900 if (ret < 0)
901 return ret;
902 }
903
904 pix->width = mf->width;
905 pix->height = mf->height;
906 pix->field = mf->field;
907 mx3_cam->field = mf->field;
908 pix->colorspace = mf->colorspace;
909 icd->current_fmt = xlate;
910
911 dev_dbg(icd->parent, "Sensor set %dx%d\n", pix->width, pix->height);
912
913 return ret;
914 }
915
mx3_camera_try_fmt(struct soc_camera_device * icd,struct v4l2_format * f)916 static int mx3_camera_try_fmt(struct soc_camera_device *icd,
917 struct v4l2_format *f)
918 {
919 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
920 const struct soc_camera_format_xlate *xlate;
921 struct v4l2_pix_format *pix = &f->fmt.pix;
922 struct v4l2_subdev_pad_config pad_cfg;
923 struct v4l2_subdev_format format = {
924 .which = V4L2_SUBDEV_FORMAT_TRY,
925 };
926 struct v4l2_mbus_framefmt *mf = &format.format;
927 __u32 pixfmt = pix->pixelformat;
928 int ret;
929
930 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
931 if (pixfmt && !xlate) {
932 dev_warn(icd->parent, "Format %x not found\n", pixfmt);
933 return -EINVAL;
934 }
935
936 /* limit to MX3 hardware capabilities */
937 if (pix->height > 4096)
938 pix->height = 4096;
939 if (pix->width > 4096)
940 pix->width = 4096;
941
942 /* limit to sensor capabilities */
943 mf->width = pix->width;
944 mf->height = pix->height;
945 mf->field = pix->field;
946 mf->colorspace = pix->colorspace;
947 mf->code = xlate->code;
948
949 ret = v4l2_subdev_call(sd, pad, set_fmt, &pad_cfg, &format);
950 if (ret < 0)
951 return ret;
952
953 pix->width = mf->width;
954 pix->height = mf->height;
955 pix->colorspace = mf->colorspace;
956
957 switch (mf->field) {
958 case V4L2_FIELD_ANY:
959 pix->field = V4L2_FIELD_NONE;
960 break;
961 case V4L2_FIELD_NONE:
962 break;
963 default:
964 dev_err(icd->parent, "Field type %d unsupported.\n",
965 mf->field);
966 ret = -EINVAL;
967 }
968
969 return ret;
970 }
971
mx3_camera_reqbufs(struct soc_camera_device * icd,struct v4l2_requestbuffers * p)972 static int mx3_camera_reqbufs(struct soc_camera_device *icd,
973 struct v4l2_requestbuffers *p)
974 {
975 return 0;
976 }
977
mx3_camera_poll(struct file * file,poll_table * pt)978 static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
979 {
980 struct soc_camera_device *icd = file->private_data;
981
982 return vb2_poll(&icd->vb2_vidq, file, pt);
983 }
984
mx3_camera_querycap(struct soc_camera_host * ici,struct v4l2_capability * cap)985 static int mx3_camera_querycap(struct soc_camera_host *ici,
986 struct v4l2_capability *cap)
987 {
988 /* cap->name is set by the firendly caller:-> */
989 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
990 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
991 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
992
993 return 0;
994 }
995
mx3_camera_set_bus_param(struct soc_camera_device * icd)996 static int mx3_camera_set_bus_param(struct soc_camera_device *icd)
997 {
998 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
999 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
1000 struct mx3_camera_dev *mx3_cam = ici->priv;
1001 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
1002 u32 pixfmt = icd->current_fmt->host_fmt->fourcc;
1003 unsigned long bus_flags, common_flags;
1004 u32 dw, sens_conf;
1005 const struct soc_mbus_pixelfmt *fmt;
1006 int buswidth;
1007 int ret;
1008 const struct soc_camera_format_xlate *xlate;
1009 struct device *dev = icd->parent;
1010
1011 fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
1012 if (!fmt)
1013 return -EINVAL;
1014
1015 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
1016 if (!xlate) {
1017 dev_warn(dev, "Format %x not found\n", pixfmt);
1018 return -EINVAL;
1019 }
1020
1021 buswidth = fmt->bits_per_sample;
1022 ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
1023
1024 dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
1025
1026 if (ret < 0)
1027 return ret;
1028
1029 ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
1030 if (!ret) {
1031 common_flags = soc_mbus_config_compatible(&cfg,
1032 bus_flags);
1033 if (!common_flags) {
1034 dev_warn(icd->parent,
1035 "Flags incompatible: camera 0x%x, host 0x%lx\n",
1036 cfg.flags, bus_flags);
1037 return -EINVAL;
1038 }
1039 } else if (ret != -ENOIOCTLCMD) {
1040 return ret;
1041 } else {
1042 common_flags = bus_flags;
1043 }
1044
1045 dev_dbg(dev, "Flags cam: 0x%x host: 0x%lx common: 0x%lx\n",
1046 cfg.flags, bus_flags, common_flags);
1047
1048 /* Make choices, based on platform preferences */
1049 if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
1050 (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
1051 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
1052 common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
1053 else
1054 common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
1055 }
1056
1057 if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
1058 (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
1059 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
1060 common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
1061 else
1062 common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
1063 }
1064
1065 if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
1066 (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
1067 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
1068 common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
1069 else
1070 common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
1071 }
1072
1073 if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
1074 (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
1075 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
1076 common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
1077 else
1078 common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
1079 }
1080
1081 cfg.flags = common_flags;
1082 ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
1083 if (ret < 0 && ret != -ENOIOCTLCMD) {
1084 dev_dbg(dev, "camera s_mbus_config(0x%lx) returned %d\n",
1085 common_flags, ret);
1086 return ret;
1087 }
1088
1089 /*
1090 * So far only gated clock mode is supported. Add a line
1091 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1092 * below and select the required mode when supporting other
1093 * synchronisation protocols.
1094 */
1095 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1096 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1097 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1098 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1099 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1100 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1101 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1102
1103 /* TODO: Support RGB and YUV formats */
1104
1105 /* This has been set in mx3_camera_activate(), but we clear it above */
1106 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1107
1108 if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
1109 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1110 if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
1111 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1112 if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1113 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1114 if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
1115 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1116
1117 /* Just do what we're asked to do */
1118 switch (xlate->host_fmt->bits_per_sample) {
1119 case 4:
1120 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1121 break;
1122 case 8:
1123 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1124 break;
1125 case 10:
1126 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1127 break;
1128 default:
1129 /*
1130 * Actually it can only be 15 now, default is just to silence
1131 * compiler warnings
1132 */
1133 case 15:
1134 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1135 }
1136
1137 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1138
1139 dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
1140
1141 return 0;
1142 }
1143
1144 static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1145 .owner = THIS_MODULE,
1146 .add = mx3_camera_add_device,
1147 .remove = mx3_camera_remove_device,
1148 .clock_start = mx3_camera_clock_start,
1149 .clock_stop = mx3_camera_clock_stop,
1150 .set_crop = mx3_camera_set_crop,
1151 .set_fmt = mx3_camera_set_fmt,
1152 .try_fmt = mx3_camera_try_fmt,
1153 .get_formats = mx3_camera_get_formats,
1154 .init_videobuf2 = mx3_camera_init_videobuf,
1155 .reqbufs = mx3_camera_reqbufs,
1156 .poll = mx3_camera_poll,
1157 .querycap = mx3_camera_querycap,
1158 .set_bus_param = mx3_camera_set_bus_param,
1159 };
1160
mx3_camera_probe(struct platform_device * pdev)1161 static int mx3_camera_probe(struct platform_device *pdev)
1162 {
1163 struct mx3_camera_pdata *pdata = pdev->dev.platform_data;
1164 struct mx3_camera_dev *mx3_cam;
1165 struct resource *res;
1166 void __iomem *base;
1167 int err = 0;
1168 struct soc_camera_host *soc_host;
1169
1170 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1171 base = devm_ioremap_resource(&pdev->dev, res);
1172 if (IS_ERR(base))
1173 return PTR_ERR(base);
1174
1175 if (!pdata)
1176 return -EINVAL;
1177
1178 mx3_cam = devm_kzalloc(&pdev->dev, sizeof(*mx3_cam), GFP_KERNEL);
1179 if (!mx3_cam) {
1180 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1181 return -ENOMEM;
1182 }
1183
1184 mx3_cam->clk = devm_clk_get(&pdev->dev, NULL);
1185 if (IS_ERR(mx3_cam->clk))
1186 return PTR_ERR(mx3_cam->clk);
1187
1188 mx3_cam->pdata = pdata;
1189 mx3_cam->platform_flags = pdata->flags;
1190 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_MASK)) {
1191 /*
1192 * Platform hasn't set available data widths. This is bad.
1193 * Warn and use a default.
1194 */
1195 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1196 "data widths, using default 8 bit\n");
1197 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1198 }
1199 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
1200 mx3_cam->width_flags = 1 << 3;
1201 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
1202 mx3_cam->width_flags |= 1 << 7;
1203 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
1204 mx3_cam->width_flags |= 1 << 9;
1205 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
1206 mx3_cam->width_flags |= 1 << 14;
1207
1208 mx3_cam->mclk = pdata->mclk_10khz * 10000;
1209 if (!mx3_cam->mclk) {
1210 dev_warn(&pdev->dev,
1211 "mclk_10khz == 0! Please, fix your platform data. "
1212 "Using default 20MHz\n");
1213 mx3_cam->mclk = 20000000;
1214 }
1215
1216 /* list of video-buffers */
1217 INIT_LIST_HEAD(&mx3_cam->capture);
1218 spin_lock_init(&mx3_cam->lock);
1219
1220 mx3_cam->base = base;
1221
1222 soc_host = &mx3_cam->soc_host;
1223 soc_host->drv_name = MX3_CAM_DRV_NAME;
1224 soc_host->ops = &mx3_soc_camera_host_ops;
1225 soc_host->priv = mx3_cam;
1226 soc_host->v4l2_dev.dev = &pdev->dev;
1227 soc_host->nr = pdev->id;
1228
1229 mx3_cam->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1230 if (IS_ERR(mx3_cam->alloc_ctx))
1231 return PTR_ERR(mx3_cam->alloc_ctx);
1232
1233 if (pdata->asd_sizes) {
1234 soc_host->asd = pdata->asd;
1235 soc_host->asd_sizes = pdata->asd_sizes;
1236 }
1237
1238 err = soc_camera_host_register(soc_host);
1239 if (err)
1240 goto ecamhostreg;
1241
1242 /* IDMAC interface */
1243 dmaengine_get();
1244
1245 return 0;
1246
1247 ecamhostreg:
1248 vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1249 return err;
1250 }
1251
mx3_camera_remove(struct platform_device * pdev)1252 static int mx3_camera_remove(struct platform_device *pdev)
1253 {
1254 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1255 struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1256 struct mx3_camera_dev, soc_host);
1257
1258 soc_camera_host_unregister(soc_host);
1259
1260 /*
1261 * The channel has either not been allocated,
1262 * or should have been released
1263 */
1264 if (WARN_ON(mx3_cam->idmac_channel[0]))
1265 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1266
1267 vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1268
1269 dmaengine_put();
1270
1271 return 0;
1272 }
1273
1274 static struct platform_driver mx3_camera_driver = {
1275 .driver = {
1276 .name = MX3_CAM_DRV_NAME,
1277 },
1278 .probe = mx3_camera_probe,
1279 .remove = mx3_camera_remove,
1280 };
1281
1282 module_platform_driver(mx3_camera_driver);
1283
1284 MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1285 MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1286 MODULE_LICENSE("GPL v2");
1287 MODULE_VERSION("0.2.3");
1288 MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);
1289