1 /*
2  *  Serial Port driver for Open Firmware platform devices
3  *
4  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
5  *
6  *  This program is free software; you can redistribute it and/or
7  *  modify it under the terms of the GNU General Public License
8  *  as published by the Free Software Foundation; either version
9  *  2 of the License, or (at your option) any later version.
10  *
11  */
12 #include <linux/console.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/serial_core.h>
17 #include <linux/serial_reg.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/nwpserial.h>
22 #include <linux/clk.h>
23 
24 #ifdef CONFIG_SERIAL_8250_MODULE
25 #define CONFIG_SERIAL_8250 CONFIG_SERIAL_8250_MODULE
26 #endif
27 
28 #include "8250/8250.h"
29 
30 struct of_serial_info {
31 	struct clk *clk;
32 	int type;
33 	int line;
34 };
35 
36 #ifdef CONFIG_ARCH_TEGRA
tegra_serial_handle_break(struct uart_port * p)37 void tegra_serial_handle_break(struct uart_port *p)
38 {
39 	unsigned int status, tmout = 10000;
40 
41 	do {
42 		status = p->serial_in(p, UART_LSR);
43 		if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
44 			status = p->serial_in(p, UART_RX);
45 		else
46 			break;
47 		if (--tmout == 0)
48 			break;
49 		udelay(1);
50 	} while (1);
51 }
52 #else
tegra_serial_handle_break(struct uart_port * port)53 static inline void tegra_serial_handle_break(struct uart_port *port)
54 {
55 }
56 #endif
57 
58 /*
59  * Fill a struct uart_port for a given device node
60  */
of_platform_serial_setup(struct platform_device * ofdev,int type,struct uart_port * port,struct of_serial_info * info)61 static int of_platform_serial_setup(struct platform_device *ofdev,
62 			int type, struct uart_port *port,
63 			struct of_serial_info *info)
64 {
65 	struct resource resource;
66 	struct device_node *np = ofdev->dev.of_node;
67 	u32 clk, spd, prop;
68 	int ret;
69 
70 	memset(port, 0, sizeof *port);
71 	if (of_property_read_u32(np, "clock-frequency", &clk)) {
72 
73 		/* Get clk rate through clk driver if present */
74 		info->clk = devm_clk_get(&ofdev->dev, NULL);
75 		if (IS_ERR(info->clk)) {
76 			dev_warn(&ofdev->dev,
77 				"clk or clock-frequency not defined\n");
78 			return PTR_ERR(info->clk);
79 		}
80 
81 		ret = clk_prepare_enable(info->clk);
82 		if (ret < 0)
83 			return ret;
84 
85 		clk = clk_get_rate(info->clk);
86 	}
87 	/* If current-speed was set, then try not to change it. */
88 	if (of_property_read_u32(np, "current-speed", &spd) == 0)
89 		port->custom_divisor = clk / (16 * spd);
90 
91 	ret = of_address_to_resource(np, 0, &resource);
92 	if (ret) {
93 		dev_warn(&ofdev->dev, "invalid address\n");
94 		goto out;
95 	}
96 
97 	spin_lock_init(&port->lock);
98 	port->mapbase = resource.start;
99 	port->mapsize = resource_size(&resource);
100 
101 	/* Check for shifted address mapping */
102 	if (of_property_read_u32(np, "reg-offset", &prop) == 0)
103 		port->mapbase += prop;
104 
105 	/* Check for registers offset within the devices address range */
106 	if (of_property_read_u32(np, "reg-shift", &prop) == 0)
107 		port->regshift = prop;
108 
109 	/* Check for fifo size */
110 	if (of_property_read_u32(np, "fifo-size", &prop) == 0)
111 		port->fifosize = prop;
112 
113 	/* Check for a fixed line number */
114 	ret = of_alias_get_id(np, "serial");
115 	if (ret >= 0)
116 		port->line = ret;
117 
118 	port->irq = irq_of_parse_and_map(np, 0);
119 	port->iotype = UPIO_MEM;
120 	if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
121 		switch (prop) {
122 		case 1:
123 			port->iotype = UPIO_MEM;
124 			break;
125 		case 4:
126 			port->iotype = of_device_is_big_endian(np) ?
127 				       UPIO_MEM32BE : UPIO_MEM32;
128 			break;
129 		default:
130 			dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
131 				 prop);
132 			ret = -EINVAL;
133 			goto out;
134 		}
135 	}
136 
137 	port->type = type;
138 	port->uartclk = clk;
139 	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
140 		| UPF_FIXED_PORT | UPF_FIXED_TYPE;
141 
142 	if (of_find_property(np, "no-loopback-test", NULL))
143 		port->flags |= UPF_SKIP_TEST;
144 
145 	port->dev = &ofdev->dev;
146 
147 	switch (type) {
148 	case PORT_TEGRA:
149 		port->handle_break = tegra_serial_handle_break;
150 		break;
151 
152 	case PORT_RT2880:
153 		port->iotype = UPIO_AU;
154 		break;
155 	}
156 
157 	if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
158 	    (of_device_is_compatible(np, "fsl,ns16550") ||
159 	     of_device_is_compatible(np, "fsl,16550-FIFO64")))
160 		port->handle_irq = fsl8250_handle_irq;
161 
162 	return 0;
163 out:
164 	if (info->clk)
165 		clk_disable_unprepare(info->clk);
166 	return ret;
167 }
168 
169 /*
170  * Try to register a serial port
171  */
172 static const struct of_device_id of_platform_serial_table[];
of_platform_serial_probe(struct platform_device * ofdev)173 static int of_platform_serial_probe(struct platform_device *ofdev)
174 {
175 	const struct of_device_id *match;
176 	struct of_serial_info *info;
177 	struct uart_port port;
178 	int port_type;
179 	int ret;
180 
181 	match = of_match_device(of_platform_serial_table, &ofdev->dev);
182 	if (!match)
183 		return -EINVAL;
184 
185 	if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
186 		return -EBUSY;
187 
188 	info = kzalloc(sizeof(*info), GFP_KERNEL);
189 	if (info == NULL)
190 		return -ENOMEM;
191 
192 	port_type = (unsigned long)match->data;
193 	ret = of_platform_serial_setup(ofdev, port_type, &port, info);
194 	if (ret)
195 		goto out;
196 
197 	switch (port_type) {
198 #ifdef CONFIG_SERIAL_8250
199 	case PORT_8250 ... PORT_MAX_8250:
200 	{
201 		struct uart_8250_port port8250;
202 		memset(&port8250, 0, sizeof(port8250));
203 		port8250.port = port;
204 
205 		if (port.fifosize)
206 			port8250.capabilities = UART_CAP_FIFO;
207 
208 		if (of_property_read_bool(ofdev->dev.of_node,
209 					  "auto-flow-control"))
210 			port8250.capabilities |= UART_CAP_AFE;
211 
212 		ret = serial8250_register_8250_port(&port8250);
213 		break;
214 	}
215 #endif
216 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
217 	case PORT_NWPSERIAL:
218 		ret = nwpserial_register_port(&port);
219 		break;
220 #endif
221 	default:
222 		/* need to add code for these */
223 	case PORT_UNKNOWN:
224 		dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
225 		ret = -ENODEV;
226 		break;
227 	}
228 	if (ret < 0)
229 		goto out;
230 
231 	info->type = port_type;
232 	info->line = ret;
233 	platform_set_drvdata(ofdev, info);
234 	return 0;
235 out:
236 	kfree(info);
237 	irq_dispose_mapping(port.irq);
238 	return ret;
239 }
240 
241 /*
242  * Release a line
243  */
of_platform_serial_remove(struct platform_device * ofdev)244 static int of_platform_serial_remove(struct platform_device *ofdev)
245 {
246 	struct of_serial_info *info = platform_get_drvdata(ofdev);
247 	switch (info->type) {
248 #ifdef CONFIG_SERIAL_8250
249 	case PORT_8250 ... PORT_MAX_8250:
250 		serial8250_unregister_port(info->line);
251 		break;
252 #endif
253 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
254 	case PORT_NWPSERIAL:
255 		nwpserial_unregister_port(info->line);
256 		break;
257 #endif
258 	default:
259 		/* need to add code for these */
260 		break;
261 	}
262 
263 	if (info->clk)
264 		clk_disable_unprepare(info->clk);
265 	kfree(info);
266 	return 0;
267 }
268 
269 #ifdef CONFIG_PM_SLEEP
270 #ifdef CONFIG_SERIAL_8250
of_serial_suspend_8250(struct of_serial_info * info)271 static void of_serial_suspend_8250(struct of_serial_info *info)
272 {
273 	struct uart_8250_port *port8250 = serial8250_get_port(info->line);
274 	struct uart_port *port = &port8250->port;
275 
276 	serial8250_suspend_port(info->line);
277 	if (info->clk && (!uart_console(port) || console_suspend_enabled))
278 		clk_disable_unprepare(info->clk);
279 }
280 
of_serial_resume_8250(struct of_serial_info * info)281 static void of_serial_resume_8250(struct of_serial_info *info)
282 {
283 	struct uart_8250_port *port8250 = serial8250_get_port(info->line);
284 	struct uart_port *port = &port8250->port;
285 
286 	if (info->clk && (!uart_console(port) || console_suspend_enabled))
287 		clk_prepare_enable(info->clk);
288 
289 	serial8250_resume_port(info->line);
290 }
291 #else
of_serial_suspend_8250(struct of_serial_info * info)292 static inline void of_serial_suspend_8250(struct of_serial_info *info)
293 {
294 }
295 
of_serial_resume_8250(struct of_serial_info * info)296 static inline void of_serial_resume_8250(struct of_serial_info *info)
297 {
298 }
299 #endif
300 
of_serial_suspend(struct device * dev)301 static int of_serial_suspend(struct device *dev)
302 {
303 	struct of_serial_info *info = dev_get_drvdata(dev);
304 
305 	switch (info->type) {
306 	case PORT_8250 ... PORT_MAX_8250:
307 		of_serial_suspend_8250(info);
308 		break;
309 	default:
310 		break;
311 	}
312 
313 	return 0;
314 }
315 
of_serial_resume(struct device * dev)316 static int of_serial_resume(struct device *dev)
317 {
318 	struct of_serial_info *info = dev_get_drvdata(dev);
319 
320 	switch (info->type) {
321 	case PORT_8250 ... PORT_MAX_8250:
322 		of_serial_resume_8250(info);
323 		break;
324 	default:
325 		break;
326 	}
327 
328 	return 0;
329 }
330 #endif
331 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
332 
333 /*
334  * A few common types, add more as needed.
335  */
336 static const struct of_device_id of_platform_serial_table[] = {
337 	{ .compatible = "ns8250",   .data = (void *)PORT_8250, },
338 	{ .compatible = "ns16450",  .data = (void *)PORT_16450, },
339 	{ .compatible = "ns16550a", .data = (void *)PORT_16550A, },
340 	{ .compatible = "ns16550",  .data = (void *)PORT_16550, },
341 	{ .compatible = "ns16750",  .data = (void *)PORT_16750, },
342 	{ .compatible = "ns16850",  .data = (void *)PORT_16850, },
343 	{ .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
344 	{ .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
345 	{ .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
346 	{ .compatible = "altr,16550-FIFO32",
347 		.data = (void *)PORT_ALTR_16550_F32, },
348 	{ .compatible = "altr,16550-FIFO64",
349 		.data = (void *)PORT_ALTR_16550_F64, },
350 	{ .compatible = "altr,16550-FIFO128",
351 		.data = (void *)PORT_ALTR_16550_F128, },
352 	{ .compatible = "mrvl,mmp-uart",
353 		.data = (void *)PORT_XSCALE, },
354 	{ .compatible = "mrvl,pxa-uart",
355 		.data = (void *)PORT_XSCALE, },
356 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
357 	{ .compatible = "ibm,qpace-nwp-serial",
358 		.data = (void *)PORT_NWPSERIAL, },
359 #endif
360 	{ /* end of list */ },
361 };
362 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
363 
364 static struct platform_driver of_platform_serial_driver = {
365 	.driver = {
366 		.name = "of_serial",
367 		.of_match_table = of_platform_serial_table,
368 	},
369 	.probe = of_platform_serial_probe,
370 	.remove = of_platform_serial_remove,
371 };
372 
373 module_platform_driver(of_platform_serial_driver);
374 
375 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
376 MODULE_LICENSE("GPL");
377 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
378