| /linux-4.1.27/drivers/net/wireless/iwlegacy/ |
| H A D | 4965-mac.c | 82 il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status) il4965_check_abort_status() argument
86 if (!test_bit(S_EXIT_PENDING, &il->status)) il4965_check_abort_status()
87 queue_work(il->workqueue, &il->tx_flush); il4965_check_abort_status()
100 il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) il4965_rx_queue_reset() argument
112 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, il4965_rx_queue_reset()
113 PAGE_SIZE << il->hw_params.rx_page_order, il4965_rx_queue_reset()
115 __il_free_pages(il, rxq->pool[i].page); il4965_rx_queue_reset()
133 il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq) il4965_rx_init() argument
139 if (il->cfg->mod_params->amsdu_size_8K) il4965_rx_init()
145 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0); il4965_rx_init()
148 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); il4965_rx_init()
151 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, (u32) (rxq->bd_dma >> 8)); il4965_rx_init()
154 il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, rxq->rb_stts_dma >> 4); il4965_rx_init()
162 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, il4965_rx_init()
171 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF); il4965_rx_init()
177 il4965_set_pwr_vmain(struct il_priv *il) il4965_set_pwr_vmain() argument
183 if (pci_pme_capable(il->pci_dev, PCI_D3cold)) il4965_set_pwr_vmain()
184 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, il4965_set_pwr_vmain()
189 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, il4965_set_pwr_vmain()
195 il4965_hw_nic_init(struct il_priv *il) il4965_hw_nic_init() argument
198 struct il_rx_queue *rxq = &il->rxq; il4965_hw_nic_init()
201 spin_lock_irqsave(&il->lock, flags); il4965_hw_nic_init()
202 il_apm_init(il); il4965_hw_nic_init()
204 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_CALIB_TIMEOUT_DEF); il4965_hw_nic_init()
205 spin_unlock_irqrestore(&il->lock, flags); il4965_hw_nic_init()
207 il4965_set_pwr_vmain(il); il4965_hw_nic_init()
208 il4965_nic_config(il); il4965_hw_nic_init()
212 ret = il_rx_queue_alloc(il); il4965_hw_nic_init()
218 il4965_rx_queue_reset(il, rxq); il4965_hw_nic_init()
220 il4965_rx_replenish(il); il4965_hw_nic_init()
222 il4965_rx_init(il, rxq); il4965_hw_nic_init()
224 spin_lock_irqsave(&il->lock, flags); il4965_hw_nic_init()
227 il_rx_queue_update_write_ptr(il, rxq); il4965_hw_nic_init()
229 spin_unlock_irqrestore(&il->lock, flags); il4965_hw_nic_init()
232 if (!il->txq) { il4965_hw_nic_init()
233 ret = il4965_txq_ctx_alloc(il); il4965_hw_nic_init()
237 il4965_txq_ctx_reset(il); il4965_hw_nic_init()
239 set_bit(S_INIT, &il->status); il4965_hw_nic_init()
248 il4965_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) il4965_dma_addr2rbd_ptr() argument
265 il4965_rx_queue_restock(struct il_priv *il) il4965_rx_queue_restock() argument
267 struct il_rx_queue *rxq = &il->rxq; il4965_rx_queue_restock()
285 il4965_dma_addr2rbd_ptr(il, rxb->page_dma); il4965_rx_queue_restock()
294 queue_work(il->workqueue, &il->rx_replenish); il4965_rx_queue_restock()
302 il_rx_queue_update_write_ptr(il, rxq); il4965_rx_queue_restock()
315 il4965_rx_allocate(struct il_priv *il, gfp_t priority) il4965_rx_allocate() argument
317 struct il_rx_queue *rxq = &il->rxq; il4965_rx_allocate()
336 if (il->hw_params.rx_page_order > 0) il4965_rx_allocate()
340 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); il4965_rx_allocate()
344 il->hw_params.rx_page_order); il4965_rx_allocate()
361 pci_map_page(il->pci_dev, page, 0, il4965_rx_allocate()
362 PAGE_SIZE << il->hw_params.rx_page_order, il4965_rx_allocate()
364 if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) { il4965_rx_allocate()
365 __free_pages(page, il->hw_params.rx_page_order); il4965_rx_allocate()
373 pci_unmap_page(il->pci_dev, page_dma, il4965_rx_allocate()
374 PAGE_SIZE << il->hw_params.rx_page_order, il4965_rx_allocate()
376 __free_pages(page, il->hw_params.rx_page_order); il4965_rx_allocate()
390 il->alloc_rxb_page++; il4965_rx_allocate()
397 il4965_rx_replenish(struct il_priv *il) il4965_rx_replenish() argument
401 il4965_rx_allocate(il, GFP_KERNEL); il4965_rx_replenish()
403 spin_lock_irqsave(&il->lock, flags); il4965_rx_replenish()
404 il4965_rx_queue_restock(il); il4965_rx_replenish()
405 spin_unlock_irqrestore(&il->lock, flags); il4965_rx_replenish()
409 il4965_rx_replenish_now(struct il_priv *il) il4965_rx_replenish_now() argument
411 il4965_rx_allocate(il, GFP_ATOMIC); il4965_rx_replenish_now()
413 il4965_rx_queue_restock(il); il4965_rx_replenish_now()
422 il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) il4965_rx_queue_free() argument
427 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, il4965_rx_queue_free()
428 PAGE_SIZE << il->hw_params.rx_page_order, il4965_rx_queue_free()
430 __il_free_pages(il, rxq->pool[i].page); il4965_rx_queue_free()
435 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, il4965_rx_queue_free()
437 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), il4965_rx_queue_free()
444 il4965_rxq_stop(struct il_priv *il) il4965_rxq_stop() argument
448 _il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0); il4965_rxq_stop()
449 ret = _il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG, il4965_rxq_stop()
482 il4965_calc_rssi(struct il_priv *il, struct il_rx_phy_res *rx_resp) il4965_calc_rssi() argument
517 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in) il4965_translate_rx_status() argument
579 il4965_pass_packet_to_mac80211(struct il_priv *il, struct ieee80211_hdr *hdr, il4965_pass_packet_to_mac80211() argument
587 if (unlikely(!il->is_open)) { il4965_pass_packet_to_mac80211()
592 if (unlikely(test_bit(IL_STOP_REASON_PASSIVE, &il->stop_reason))) { il4965_pass_packet_to_mac80211()
593 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE); il4965_pass_packet_to_mac80211()
598 if (!il->cfg->mod_params->sw_crypto && il4965_pass_packet_to_mac80211()
599 il_set_decrypted_flag(il, hdr, ampdu_status, stats)) il4965_pass_packet_to_mac80211()
612 len, PAGE_SIZE << il->hw_params.rx_page_order); il4965_pass_packet_to_mac80211()
613 il->alloc_rxb_page--; il4965_pass_packet_to_mac80211()
617 il_update_stats(il, false, fc, len); il4965_pass_packet_to_mac80211()
620 ieee80211_rx(il->hw, skb); il4965_pass_packet_to_mac80211()
626 il4965_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_rx() argument
642 * command and cached in il->last_phy_res il4965_hdl_rx()
659 if (!il->_4965.last_phy_res_valid) { il4965_hdl_rx()
663 phy_res = &il->_4965.last_phy_res; il4965_hdl_rx()
669 il4965_translate_rx_status(il, le32_to_cpu(rx_pkt_status)); il4965_hdl_rx()
704 il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp); il4965_hdl_rx()
707 rx_status.signal = il4965_calc_rssi(il, phy_res); il4965_hdl_rx()
748 rx_status.ampdu_reference = il->_4965.ampdu_ref; il4965_hdl_rx()
751 il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, rxb, il4965_hdl_rx()
758 il4965_hdl_rx_phy(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_rx_phy() argument
761 il->_4965.last_phy_res_valid = true; il4965_hdl_rx_phy()
762 il->_4965.ampdu_ref++; il4965_hdl_rx_phy()
763 memcpy(&il->_4965.last_phy_res, pkt->u.raw, il4965_hdl_rx_phy()
768 il4965_get_channels_for_scan(struct il_priv *il, struct ieee80211_vif *vif, il4965_get_channels_for_scan() argument
780 sband = il_get_hw_mode(il, band); il4965_get_channels_for_scan()
784 active_dwell = il_get_active_dwell_time(il, band, n_probes); il4965_get_channels_for_scan()
785 passive_dwell = il_get_passive_dwell_time(il, band, vif); il4965_get_channels_for_scan()
790 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) { il4965_get_channels_for_scan()
791 chan = il->scan_request->channels[i]; il4965_get_channels_for_scan()
799 ch_info = il_get_channel_info(il, band, channel); il4965_get_channels_for_scan()
847 il4965_toggle_tx_ant(struct il_priv *il, u8 *ant, u8 valid) il4965_toggle_tx_ant() argument
862 il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) il4965_request_scan() argument
875 u8 rx_ant = il->hw_params.valid_rx_ant; il4965_request_scan()
880 u8 scan_tx_antennas = il->hw_params.valid_tx_ant; il4965_request_scan()
883 lockdep_assert_held(&il->mutex); il4965_request_scan()
885 if (!il->scan_cmd) { il4965_request_scan()
886 il->scan_cmd = il4965_request_scan()
889 if (!il->scan_cmd) { il4965_request_scan()
894 scan = il->scan_cmd; il4965_request_scan()
900 if (il_is_any_associated(il)) { il4965_request_scan()
922 if (il->scan_request->n_ssids) { il4965_request_scan()
925 for (i = 0; i < il->scan_request->n_ssids; i++) { il4965_request_scan()
927 if (!il->scan_request->ssids[i].ssid_len) il4965_request_scan()
931 il->scan_request->ssids[i].ssid_len; il4965_request_scan()
933 il->scan_request->ssids[i].ssid, il4965_request_scan()
934 il->scan_request->ssids[i].ssid_len); il4965_request_scan()
943 scan->tx_cmd.sta_id = il->hw_params.bcast_id; il4965_request_scan()
946 switch (il->scan_band) { il4965_request_scan()
950 le32_to_cpu(il->active.flags & RXON_FLG_CHANNEL_MODE_MSK) >> il4965_request_scan()
987 band = il->scan_band; il4965_request_scan()
989 if (il->cfg->scan_rx_antennas[band]) il4965_request_scan()
990 rx_ant = il->cfg->scan_rx_antennas[band]; il4965_request_scan()
992 il4965_toggle_tx_ant(il, &il->scan_tx_ant[band], scan_tx_antennas); il4965_request_scan()
993 rate_flags |= BIT(il->scan_tx_ant[band]) << RATE_MCS_ANT_POS; il4965_request_scan()
997 if (test_bit(S_POWER_PMI, &il->status)) { il4965_request_scan()
1000 rx_ant & ((u8) (il->chain_noise_data.active_chains)); il4965_request_scan()
1005 il->chain_noise_data.active_chains); il4965_request_scan()
1011 rx_chain |= il->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS; il4965_request_scan()
1018 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, il4965_request_scan()
1019 vif->addr, il->scan_request->ie, il4965_request_scan()
1020 il->scan_request->ie_len, il4965_request_scan()
1028 il4965_get_channels_for_scan(il, vif, band, is_active, n_probes, il4965_request_scan()
1041 set_bit(S_SCAN_HW, &il->status); il4965_request_scan()
1043 ret = il_send_cmd_sync(il, &cmd); il4965_request_scan()
1045 clear_bit(S_SCAN_HW, &il->status); il4965_request_scan()
1051 il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif, il4965_manage_ibss_station() argument
1057 return il4965_add_bssid_station(il, vif->bss_conf.bssid, il4965_manage_ibss_station()
1059 return il_remove_station(il, vif_priv->ibss_bssid_sta_id, il4965_manage_ibss_station()
1064 il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid, int freed) il4965_free_tfds_in_queue() argument
1066 lockdep_assert_held(&il->sta_lock); il4965_free_tfds_in_queue()
1068 if (il->stations[sta_id].tid[tid].tfds_in_queue >= freed) il4965_free_tfds_in_queue()
1069 il->stations[sta_id].tid[tid].tfds_in_queue -= freed; il4965_free_tfds_in_queue()
1072 il->stations[sta_id].tid[tid].tfds_in_queue, freed); il4965_free_tfds_in_queue()
1073 il->stations[sta_id].tid[tid].tfds_in_queue = 0; il4965_free_tfds_in_queue()
1080 il4965_is_single_rx_stream(struct il_priv *il) il4965_is_single_rx_stream() argument
1082 return il->current_ht_config.smps == IEEE80211_SMPS_STATIC || il4965_is_single_rx_stream()
1083 il->current_ht_config.single_chain_sufficient; il4965_is_single_rx_stream()
1102 il4965_get_active_rx_chain_count(struct il_priv *il) il4965_get_active_rx_chain_count() argument
1105 if (il4965_is_single_rx_stream(il)) il4965_get_active_rx_chain_count()
1116 il4965_get_idle_rx_chain_count(struct il_priv *il, int active_cnt) il4965_get_idle_rx_chain_count() argument
1119 switch (il->current_ht_config.smps) { il4965_get_idle_rx_chain_count()
1126 WARN(1, "invalid SMPS mode %d", il->current_ht_config.smps); il4965_get_idle_rx_chain_count()
1150 il4965_set_rxon_chain(struct il_priv *il) il4965_set_rxon_chain() argument
1152 bool is_single = il4965_is_single_rx_stream(il); il4965_set_rxon_chain()
1153 bool is_cam = !test_bit(S_POWER_PMI, &il->status); il4965_set_rxon_chain()
1162 if (il->chain_noise_data.active_chains) il4965_set_rxon_chain()
1163 active_chains = il->chain_noise_data.active_chains; il4965_set_rxon_chain()
1165 active_chains = il->hw_params.valid_rx_ant; il4965_set_rxon_chain()
1170 active_rx_cnt = il4965_get_active_rx_chain_count(il); il4965_set_rxon_chain()
1171 idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt); il4965_set_rxon_chain()
1186 il->staging.rx_chain = cpu_to_le16(rx_chain); il4965_set_rxon_chain()
1189 il->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK; il4965_set_rxon_chain()
1191 il->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK; il4965_set_rxon_chain()
1193 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", il->staging.rx_chain, il4965_set_rxon_chain()
1219 il4965_dump_fh(struct il_priv *il, char **buf, bool display) il4965_dump_fh() argument
1250 il_rd(il, fh_tbl[i])); il4965_dump_fh()
1258 il_rd(il, fh_tbl[i])); il4965_dump_fh()
1264 il4965_hdl_missed_beacon(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_missed_beacon() argument
1271 il->missed_beacon_threshold) { il4965_hdl_missed_beacon()
1277 if (!test_bit(S_SCANNING, &il->status)) il4965_hdl_missed_beacon()
1278 il4965_init_sensitivity(il); il4965_hdl_missed_beacon()
1286 il4965_rx_calc_noise(struct il_priv *il) il4965_rx_calc_noise() argument
1294 rx_info = &(il->_4965.stats.rx.general); il4965_rx_calc_noise()
1332 il4965_accumulative_stats(struct il_priv *il, __le32 * stats) il4965_accumulative_stats() argument
1341 prev_stats = (__le32 *) &il->_4965.stats; il4965_accumulative_stats()
1342 accum_stats = (u32 *) &il->_4965.accum_stats; il4965_accumulative_stats()
1344 general = &il->_4965.stats.general.common; il4965_accumulative_stats()
1345 accum_general = &il->_4965.accum_stats.general.common; il4965_accumulative_stats()
1346 tx = &il->_4965.stats.tx; il4965_accumulative_stats()
1347 accum_tx = &il->_4965.accum_stats.tx; il4965_accumulative_stats()
1348 delta = (u32 *) &il->_4965.delta_stats; il4965_accumulative_stats()
1349 max_delta = (u32 *) &il->_4965.max_delta; il4965_accumulative_stats()
1371 il4965_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_stats() argument
1382 ((il->_4965.stats.general.common.temperature != il4965_hdl_stats()
1384 ((il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK) != il4965_hdl_stats()
1387 il4965_accumulative_stats(il, (__le32 *) &pkt->u.stats); il4965_hdl_stats()
1391 memcpy(&il->_4965.stats, &pkt->u.stats, sizeof(il->_4965.stats)); il4965_hdl_stats()
1393 set_bit(S_STATS, &il->status); il4965_hdl_stats()
1399 mod_timer(&il->stats_periodic, il4965_hdl_stats()
1402 if (unlikely(!test_bit(S_SCANNING, &il->status)) && il4965_hdl_stats()
1404 il4965_rx_calc_noise(il); il4965_hdl_stats()
1405 queue_work(il->workqueue, &il->run_time_calib_work); il4965_hdl_stats()
1409 il4965_temperature_calib(il); il4965_hdl_stats()
1413 il4965_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_c_stats() argument
1419 memset(&il->_4965.accum_stats, 0, il4965_hdl_c_stats()
1421 memset(&il->_4965.delta_stats, 0, il4965_hdl_c_stats()
1423 memset(&il->_4965.max_delta, 0, sizeof(struct il_notif_stats)); il4965_hdl_c_stats()
1427 il4965_hdl_stats(il, rxb); il4965_hdl_c_stats()
1499 il4965_tx_cmd_build_basic(struct il_priv *il, struct sk_buff *skb, il4965_tx_cmd_build_basic() argument
1535 il_tx_cmd_protection(il, info, fc, &tx_flags); il4965_tx_cmd_build_basic()
1553 il4965_tx_cmd_build_rate(struct il_priv *il, il4965_tx_cmd_build_rate() argument
1591 rate_idx = rate_lowest_index(&il->bands[info->band], sta); il4965_tx_cmd_build_rate()
1605 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant); il4965_tx_cmd_build_rate()
1606 rate_flags |= BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS; il4965_tx_cmd_build_rate()
1613 il4965_tx_cmd_build_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, il4965_tx_cmd_build_hwcrypto() argument
1658 il4965_tx_skb(struct il_priv *il, il4965_tx_skb() argument
1685 spin_lock_irqsave(&il->lock, flags); il4965_tx_skb()
1686 if (il_is_rfkill(il)) { il4965_tx_skb()
1706 sta_id = il->hw_params.bcast_id; il4965_tx_skb()
1709 sta_id = il_sta_id_or_broadcast(il, sta); il4965_tx_skb()
1733 il4965_sta_modify_sleep_tx_count(il, sta_id, 1); il4965_tx_skb()
1742 /* irqs already disabled/saved above when locking il->lock */ il4965_tx_skb()
1743 spin_lock(&il->sta_lock); il4965_tx_skb()
1749 spin_unlock(&il->sta_lock); il4965_tx_skb()
1752 seq_number = il->stations[sta_id].tid[tid].seq_number; il4965_tx_skb()
1760 il->stations[sta_id].tid[tid].agg.state == IL_AGG_ON) { il4965_tx_skb()
1761 txq_id = il->stations[sta_id].tid[tid].agg.txq_id; il4965_tx_skb()
1766 txq = &il->txq[txq_id]; il4965_tx_skb()
1770 spin_unlock(&il->sta_lock); il4965_tx_skb()
1775 il->stations[sta_id].tid[tid].tfds_in_queue++; il4965_tx_skb()
1777 il->stations[sta_id].tid[tid].seq_number = seq_number; il4965_tx_skb()
1780 spin_unlock(&il->sta_lock); il4965_tx_skb()
1809 il4965_tx_cmd_build_hwcrypto(il, info, tx_cmd, skb, sta_id); il4965_tx_skb()
1812 il4965_tx_cmd_build_basic(il, skb, tx_cmd, info, hdr, sta_id); il4965_tx_skb()
1814 il4965_tx_cmd_build_rate(il, tx_cmd, info, sta, fc); il4965_tx_skb()
1835 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen, il4965_tx_skb()
1837 if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys))) il4965_tx_skb()
1845 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen, il4965_tx_skb()
1847 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) il4965_tx_skb()
1853 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0); il4965_tx_skb()
1857 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, il4965_tx_skb()
1872 pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, firstlen, il4965_tx_skb()
1877 il_update_stats(il, true, fc, skb->len); il4965_tx_skb()
1881 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd, sizeof(*tx_cmd)); il4965_tx_skb()
1882 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, hdr_len); il4965_tx_skb()
1886 il->ops->txq_update_byte_cnt_tbl(il, txq, le16_to_cpu(tx_cmd->len)); il4965_tx_skb()
1888 pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, firstlen, il4965_tx_skb()
1893 il_txq_update_write_ptr(il, txq); il4965_tx_skb()
1894 spin_unlock_irqrestore(&il->lock, flags); il4965_tx_skb()
1913 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) { il4965_tx_skb()
1915 spin_lock_irqsave(&il->lock, flags); il4965_tx_skb()
1917 il_txq_update_write_ptr(il, txq); il4965_tx_skb()
1918 spin_unlock_irqrestore(&il->lock, flags); il4965_tx_skb()
1920 il_stop_queue(il, txq); il4965_tx_skb()
1927 spin_unlock_irqrestore(&il->lock, flags); il4965_tx_skb()
1932 il4965_alloc_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr, size_t size) il4965_alloc_dma_ptr() argument
1934 ptr->addr = dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma, il4965_alloc_dma_ptr()
1943 il4965_free_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr) il4965_free_dma_ptr() argument
1948 dma_free_coherent(&il->pci_dev->dev, ptr->size, ptr->addr, ptr->dma); il4965_free_dma_ptr()
1958 il4965_hw_txq_ctx_free(struct il_priv *il) il4965_hw_txq_ctx_free() argument
1963 if (il->txq) { il4965_hw_txq_ctx_free()
1964 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) il4965_hw_txq_ctx_free()
1965 if (txq_id == il->cmd_queue) il4965_hw_txq_ctx_free()
1966 il_cmd_queue_free(il); il4965_hw_txq_ctx_free()
1968 il_tx_queue_free(il, txq_id); il4965_hw_txq_ctx_free()
1970 il4965_free_dma_ptr(il, &il->kw); il4965_hw_txq_ctx_free()
1972 il4965_free_dma_ptr(il, &il->scd_bc_tbls); il4965_hw_txq_ctx_free()
1975 il_free_txq_mem(il); il4965_hw_txq_ctx_free()
1982 * @param il
1986 il4965_txq_ctx_alloc(struct il_priv *il) il4965_txq_ctx_alloc() argument
1992 il4965_hw_txq_ctx_free(il); il4965_txq_ctx_alloc()
1995 il4965_alloc_dma_ptr(il, &il->scd_bc_tbls, il4965_txq_ctx_alloc()
1996 il->hw_params.scd_bc_tbls_size); il4965_txq_ctx_alloc()
2002 ret = il4965_alloc_dma_ptr(il, &il->kw, IL_KW_SIZE); il4965_txq_ctx_alloc()
2009 ret = il_alloc_txq_mem(il); il4965_txq_ctx_alloc()
2013 spin_lock_irqsave(&il->lock, flags); il4965_txq_ctx_alloc()
2016 il4965_txq_set_sched(il, 0); il4965_txq_ctx_alloc()
2019 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4); il4965_txq_ctx_alloc()
2021 spin_unlock_irqrestore(&il->lock, flags); il4965_txq_ctx_alloc()
2024 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { il4965_txq_ctx_alloc()
2025 ret = il_tx_queue_init(il, txq_id); il4965_txq_ctx_alloc()
2035 il4965_hw_txq_ctx_free(il); il4965_txq_ctx_alloc()
2036 il4965_free_dma_ptr(il, &il->kw); il4965_txq_ctx_alloc()
2038 il4965_free_dma_ptr(il, &il->scd_bc_tbls); il4965_txq_ctx_alloc()
2044 il4965_txq_ctx_reset(struct il_priv *il) il4965_txq_ctx_reset() argument
2049 spin_lock_irqsave(&il->lock, flags); il4965_txq_ctx_reset()
2052 il4965_txq_set_sched(il, 0); il4965_txq_ctx_reset()
2054 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4); il4965_txq_ctx_reset()
2056 spin_unlock_irqrestore(&il->lock, flags); il4965_txq_ctx_reset()
2059 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) il4965_txq_ctx_reset()
2060 il_tx_queue_reset(il, txq_id); il4965_txq_ctx_reset()
2064 il4965_txq_ctx_unmap(struct il_priv *il) il4965_txq_ctx_unmap() argument
2068 if (!il->txq) il4965_txq_ctx_unmap()
2072 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) il4965_txq_ctx_unmap()
2073 if (txq_id == il->cmd_queue) il4965_txq_ctx_unmap()
2074 il_cmd_queue_unmap(il); il4965_txq_ctx_unmap()
2076 il_tx_queue_unmap(il, txq_id); il4965_txq_ctx_unmap()
2083 il4965_txq_ctx_stop(struct il_priv *il) il4965_txq_ctx_stop() argument
2087 _il_wr_prph(il, IL49_SCD_TXFACT, 0); il4965_txq_ctx_stop()
2090 for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) { il4965_txq_ctx_stop()
2091 _il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0); il4965_txq_ctx_stop()
2093 _il_poll_bit(il, FH49_TSSR_TX_STATUS_REG, il4965_txq_ctx_stop()
2099 ch, _il_rd(il, FH49_TSSR_TX_STATUS_REG)); il4965_txq_ctx_stop()
2110 il4965_txq_ctx_activate_free(struct il_priv *il) il4965_txq_ctx_activate_free() argument
2114 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) il4965_txq_ctx_activate_free()
2115 if (!test_and_set_bit(txq_id, &il->txq_ctx_active_msk)) il4965_txq_ctx_activate_free()
2124 il4965_tx_queue_stop_scheduler(struct il_priv *il, u16 txq_id) il4965_tx_queue_stop_scheduler() argument
2128 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id), il4965_tx_queue_stop_scheduler()
2137 il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, u16 txq_id) il4965_tx_queue_set_q2ratid() argument
2146 il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); il4965_tx_queue_set_q2ratid()
2148 tbl_dw = il_read_targ_mem(il, tbl_dw_addr); il4965_tx_queue_set_q2ratid()
2155 il_write_targ_mem(il, tbl_dw_addr, tbl_dw); il4965_tx_queue_set_q2ratid()
2167 il4965_txq_agg_enable(struct il_priv *il, int txq_id, int tx_fifo, int sta_id, il4965_txq_agg_enable() argument
2176 il->cfg->num_of_ampdu_queues <= txq_id)) { il4965_txq_agg_enable()
2180 il->cfg->num_of_ampdu_queues - 1); il4965_txq_agg_enable()
2187 ret = il4965_sta_tx_modify_enable_tid(il, sta_id, tid); il4965_txq_agg_enable()
2191 spin_lock_irqsave(&il->lock, flags); il4965_txq_agg_enable()
2194 il4965_tx_queue_stop_scheduler(il, txq_id); il4965_txq_agg_enable()
2197 il4965_tx_queue_set_q2ratid(il, ra_tid, txq_id); il4965_txq_agg_enable()
2200 il_set_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); il4965_txq_agg_enable()
2204 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); il4965_txq_agg_enable()
2205 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); il4965_txq_agg_enable()
2206 il4965_set_wr_ptrs(il, txq_id, ssn_idx); il4965_txq_agg_enable()
2209 il_write_targ_mem(il, il4965_txq_agg_enable()
2210 il->scd_base_addr + il4965_txq_agg_enable()
2215 il_write_targ_mem(il, il4965_txq_agg_enable()
2216 il->scd_base_addr + il4965_txq_agg_enable()
2222 il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); il4965_txq_agg_enable()
2225 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 1); il4965_txq_agg_enable()
2227 spin_unlock_irqrestore(&il->lock, flags); il4965_txq_agg_enable()
2233 il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, il4965_tx_agg_start() argument
2258 if (il->stations[sta_id].tid[tid].agg.state != IL_AGG_OFF) { il4965_tx_agg_start()
2263 txq_id = il4965_txq_ctx_activate_free(il); il4965_tx_agg_start()
2269 spin_lock_irqsave(&il->sta_lock, flags); il4965_tx_agg_start()
2270 tid_data = &il->stations[sta_id].tid[tid]; il4965_tx_agg_start()
2273 il_set_swq_id(&il->txq[txq_id], il4965_get_ac_from_tid(tid), txq_id); il4965_tx_agg_start()
2274 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_tx_agg_start()
2276 ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, sta_id, tid, *ssn); il4965_tx_agg_start()
2280 spin_lock_irqsave(&il->sta_lock, flags); il4965_tx_agg_start()
2281 tid_data = &il->stations[sta_id].tid[tid]; il4965_tx_agg_start()
2291 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_tx_agg_start()
2297 * il->lock must be held by the caller
2300 il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, u16 ssn_idx, u8 tx_fifo) il4965_txq_agg_disable() argument
2304 il->cfg->num_of_ampdu_queues <= txq_id)) { il4965_txq_agg_disable()
2308 il->cfg->num_of_ampdu_queues - 1); il4965_txq_agg_disable()
2312 il4965_tx_queue_stop_scheduler(il, txq_id); il4965_txq_agg_disable()
2314 il_clear_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); il4965_txq_agg_disable()
2316 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); il4965_txq_agg_disable()
2317 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); il4965_txq_agg_disable()
2319 il4965_set_wr_ptrs(il, txq_id, ssn_idx); il4965_txq_agg_disable()
2321 il_clear_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); il4965_txq_agg_disable()
2322 il_txq_ctx_deactivate(il, txq_id); il4965_txq_agg_disable()
2323 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0); il4965_txq_agg_disable()
2329 il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, il4965_tx_agg_stop() argument
2349 spin_lock_irqsave(&il->sta_lock, flags); il4965_tx_agg_stop()
2351 tid_data = &il->stations[sta_id].tid[tid]; il4965_tx_agg_stop()
2355 switch (il->stations[sta_id].tid[tid].agg.state) { il4965_tx_agg_stop()
2371 write_ptr = il->txq[txq_id].q.write_ptr; il4965_tx_agg_stop()
2372 read_ptr = il->txq[txq_id].q.read_ptr; il4965_tx_agg_stop()
2377 il->stations[sta_id].tid[tid].agg.state = il4965_tx_agg_stop()
2379 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_tx_agg_stop()
2385 il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF; il4965_tx_agg_stop()
2388 spin_unlock(&il->sta_lock); il4965_tx_agg_stop()
2389 spin_lock(&il->lock); il4965_tx_agg_stop()
2398 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo_id); il4965_tx_agg_stop()
2399 spin_unlock_irqrestore(&il->lock, flags); il4965_tx_agg_stop()
2407 il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id) il4965_txq_check_empty() argument
2409 struct il_queue *q = &il->txq[txq_id].q; il4965_txq_check_empty()
2410 u8 *addr = il->stations[sta_id].sta.sta.addr; il4965_txq_check_empty()
2411 struct il_tid_data *tid_data = &il->stations[sta_id].tid[tid]; il4965_txq_check_empty()
2413 lockdep_assert_held(&il->sta_lock); il4965_txq_check_empty()
2415 switch (il->stations[sta_id].tid[tid].agg.state) { il4965_txq_check_empty()
2424 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo); il4965_txq_check_empty()
2426 ieee80211_stop_tx_ba_cb_irqsafe(il->vif, addr, tid); il4965_txq_check_empty()
2434 ieee80211_start_tx_ba_cb_irqsafe(il->vif, addr, tid); il4965_txq_check_empty()
2443 il4965_non_agg_tx_status(struct il_priv *il, const u8 *addr1) il4965_non_agg_tx_status() argument
2449 sta = ieee80211_find_sta(il->vif, addr1); il4965_non_agg_tx_status()
2455 ieee80211_sta_block_awake(il->hw, sta, false); il4965_non_agg_tx_status()
2461 il4965_tx_status(struct il_priv *il, struct sk_buff *skb, bool is_agg) il4965_tx_status() argument
2466 il4965_non_agg_tx_status(il, hdr->addr1); il4965_tx_status()
2468 ieee80211_tx_status_irqsafe(il->hw, skb); il4965_tx_status()
2472 il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) il4965_tx_queue_reclaim() argument
2474 struct il_tx_queue *txq = &il->txq[txq_id]; il4965_tx_queue_reclaim()
2499 il4965_tx_status(il, skb, txq_id >= IL4965_FIRST_AMPDU_QUEUE); il4965_tx_queue_reclaim()
2502 il->ops->txq_free_tfd(il, txq); il4965_tx_queue_reclaim()
2514 il4965_tx_status_reply_compressed_ba(struct il_priv *il, struct il_ht_agg *agg, il4965_tx_status_reply_compressed_ba() argument
2565 info = IEEE80211_SKB_CB(il->txq[scd_flow].skbs[agg->start_idx]); il4965_tx_status_reply_compressed_ba()
2571 il4965_hwrate_to_tx_control(il, agg->rate_n_flags, info); il4965_tx_status_reply_compressed_ba()
2584 il4965_find_station(struct il_priv *il, const u8 *addr) il4965_find_station() argument
2591 if (il->iw_mode == NL80211_IFTYPE_ADHOC) il4965_find_station()
2595 return il->hw_params.bcast_id; il4965_find_station()
2597 spin_lock_irqsave(&il->sta_lock, flags); il4965_find_station()
2598 for (i = start; i < il->hw_params.max_stations; i++) il4965_find_station()
2599 if (il->stations[i].used && il4965_find_station()
2600 ether_addr_equal(il->stations[i].sta.sta.addr, addr)) { il4965_find_station()
2605 D_ASSOC("can not find STA %pM total %d\n", addr, il->num_stations); il4965_find_station()
2614 (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) || il4965_find_station()
2615 ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) && il4965_find_station()
2616 (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) { il4965_find_station()
2621 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_find_station()
2626 il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr) il4965_get_ra_sta_id() argument
2628 if (il->iw_mode == NL80211_IFTYPE_STATION) il4965_get_ra_sta_id()
2633 return il4965_find_station(il, da); il4965_get_ra_sta_id()
2664 il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg, il4965_tx_status_reply_tx() argument
2692 info = IEEE80211_SKB_CB(il->txq[txq_id].skbs[idx]); il4965_tx_status_reply_tx()
2696 il4965_hwrate_to_tx_control(il, rate_n_flags, info); il4965_tx_status_reply_tx()
2725 skb = il->txq[txq_id].skbs[idx]; il4965_tx_status_reply_tx()
2776 il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_tx() argument
2782 struct il_tx_queue *txq = &il->txq[txq_id]; il4965_hdl_tx()
2813 sta_id = il4965_get_ra_sta_id(il, hdr); il4965_hdl_tx()
2827 il->iw_mode == NL80211_IFTYPE_STATION) { il4965_hdl_tx()
2828 il_stop_queues_by_reason(il, IL_STOP_REASON_PASSIVE); il4965_hdl_tx()
2832 spin_lock_irqsave(&il->sta_lock, flags); il4965_hdl_tx()
2838 agg = &il->stations[sta_id].tid[tid].agg; il4965_hdl_tx()
2840 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx); il4965_hdl_tx()
2851 freed = il4965_tx_queue_reclaim(il, txq_id, idx); il4965_hdl_tx()
2853 il4965_free_tfds_in_queue(il, sta_id, tid, il4965_hdl_tx()
2856 if (il->mac80211_registered && il4965_hdl_tx()
2859 il_wake_queue(il, txq); il4965_hdl_tx()
2864 il4965_hwrate_to_tx_control(il, il4965_hdl_tx()
2874 freed = il4965_tx_queue_reclaim(il, txq_id, idx); il4965_hdl_tx()
2876 il4965_free_tfds_in_queue(il, sta_id, tid, freed); il4965_hdl_tx()
2880 if (il->mac80211_registered && il4965_hdl_tx()
2882 il_wake_queue(il, txq); il4965_hdl_tx()
2885 il4965_txq_check_empty(il, sta_id, tid, txq_id); il4965_hdl_tx()
2887 il4965_check_abort_status(il, tx_resp->frame_count, status); il4965_hdl_tx()
2889 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_hdl_tx()
2896 il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags, il4965_hwrate_to_tx_control() argument
2923 il4965_hdl_compressed_ba(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_compressed_ba() argument
2941 if (scd_flow >= il->hw_params.max_txq_num) { il4965_hdl_compressed_ba()
2946 txq = &il->txq[scd_flow]; il4965_hdl_compressed_ba()
2949 agg = &il->stations[sta_id].tid[tid].agg; il4965_hdl_compressed_ba()
2965 spin_lock_irqsave(&il->sta_lock, flags); il4965_hdl_compressed_ba()
2978 il4965_tx_status_reply_compressed_ba(il, agg, ba_resp); il4965_hdl_compressed_ba()
2985 int freed = il4965_tx_queue_reclaim(il, scd_flow, idx); il4965_hdl_compressed_ba()
2986 il4965_free_tfds_in_queue(il, sta_id, tid, freed); il4965_hdl_compressed_ba()
2989 il->mac80211_registered && il4965_hdl_compressed_ba()
2991 il_wake_queue(il, txq); il4965_hdl_compressed_ba()
2993 il4965_txq_check_empty(il, sta_id, tid, scd_flow); il4965_hdl_compressed_ba()
2996 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_hdl_compressed_ba()
3040 il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id) il4965_sta_alloc_lq() argument
3054 if (il->band == IEEE80211_BAND_5GHZ) il4965_sta_alloc_lq()
3063 il4965_first_antenna(il->hw_params. il4965_sta_alloc_lq()
3070 il4965_first_antenna(il->hw_params.valid_tx_ant); il4965_sta_alloc_lq()
3073 il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params. il4965_sta_alloc_lq()
3077 } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) { il4965_sta_alloc_lq()
3079 il->hw_params.valid_tx_ant; il4965_sta_alloc_lq()
3097 il4965_add_bssid_station(struct il_priv *il, const u8 *addr, u8 *sta_id_r) il4965_add_bssid_station() argument
3107 ret = il_add_station_common(il, addr, 0, NULL, &sta_id); il4965_add_bssid_station()
3116 spin_lock_irqsave(&il->sta_lock, flags); il4965_add_bssid_station()
3117 il->stations[sta_id].used |= IL_STA_LOCAL; il4965_add_bssid_station()
3118 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_add_bssid_station()
3121 link_cmd = il4965_sta_alloc_lq(il, sta_id); il4965_add_bssid_station()
3128 ret = il_send_lq_cmd(il, link_cmd, CMD_SYNC, true); il4965_add_bssid_station()
3132 spin_lock_irqsave(&il->sta_lock, flags); il4965_add_bssid_station()
3133 il->stations[sta_id].lq = link_cmd; il4965_add_bssid_station()
3134 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_add_bssid_station()
3140 il4965_static_wepkey_cmd(struct il_priv *il, bool send_if_empty) il4965_static_wepkey_cmd() argument
3160 u8 key_size = il->_4965.wep_keys[i].key_size; il4965_static_wepkey_cmd()
3170 memcpy(&wep_cmd->key[i].key[3], il->_4965.wep_keys[i].key, key_size); il4965_static_wepkey_cmd()
3180 return il_send_cmd(il, &cmd); il4965_static_wepkey_cmd()
3186 il4965_restore_default_wep_keys(struct il_priv *il) il4965_restore_default_wep_keys() argument
3188 lockdep_assert_held(&il->mutex); il4965_restore_default_wep_keys()
3190 return il4965_static_wepkey_cmd(il, false); il4965_restore_default_wep_keys()
3194 il4965_remove_default_wep_key(struct il_priv *il, il4965_remove_default_wep_key() argument
3200 lockdep_assert_held(&il->mutex); il4965_remove_default_wep_key()
3204 memset(&il->_4965.wep_keys[idx], 0, sizeof(struct il_wep_key)); il4965_remove_default_wep_key()
3205 if (il_is_rfkill(il)) { il4965_remove_default_wep_key()
3210 ret = il4965_static_wepkey_cmd(il, 1); il4965_remove_default_wep_key()
3217 il4965_set_default_wep_key(struct il_priv *il, il4965_set_default_wep_key() argument
3224 lockdep_assert_held(&il->mutex); il4965_set_default_wep_key()
3233 il->stations[IL_AP_ID].keyinfo.cipher = keyconf->cipher; il4965_set_default_wep_key()
3235 il->_4965.wep_keys[idx].key_size = len; il4965_set_default_wep_key()
3236 memcpy(&il->_4965.wep_keys[idx].key, &keyconf->key, len); il4965_set_default_wep_key()
3238 ret = il4965_static_wepkey_cmd(il, false); il4965_set_default_wep_key()
3245 il4965_set_wep_dynamic_key_info(struct il_priv *il, il4965_set_wep_dynamic_key_info() argument
3252 lockdep_assert_held(&il->mutex); il4965_set_wep_dynamic_key_info()
3263 if (sta_id == il->hw_params.bcast_id) il4965_set_wep_dynamic_key_info()
3266 spin_lock_irqsave(&il->sta_lock, flags); il4965_set_wep_dynamic_key_info()
3268 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; il4965_set_wep_dynamic_key_info()
3269 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; il4965_set_wep_dynamic_key_info()
3270 il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx; il4965_set_wep_dynamic_key_info()
3272 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); il4965_set_wep_dynamic_key_info()
3274 memcpy(&il->stations[sta_id].sta.key.key[3], keyconf->key, il4965_set_wep_dynamic_key_info()
3277 if ((il->stations[sta_id].sta.key. il4965_set_wep_dynamic_key_info()
3279 il->stations[sta_id].sta.key.key_offset = il4965_set_wep_dynamic_key_info()
3280 il_get_free_ucode_key_idx(il); il4965_set_wep_dynamic_key_info()
3284 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, il4965_set_wep_dynamic_key_info()
3287 il->stations[sta_id].sta.key.key_flags = key_flags; il4965_set_wep_dynamic_key_info()
3288 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; il4965_set_wep_dynamic_key_info()
3289 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il4965_set_wep_dynamic_key_info()
3291 memcpy(&sta_cmd, &il->stations[sta_id].sta, il4965_set_wep_dynamic_key_info()
3293 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_set_wep_dynamic_key_info()
3295 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); il4965_set_wep_dynamic_key_info()
3299 il4965_set_ccmp_dynamic_key_info(struct il_priv *il, il4965_set_ccmp_dynamic_key_info() argument
3306 lockdep_assert_held(&il->mutex); il4965_set_ccmp_dynamic_key_info()
3312 if (sta_id == il->hw_params.bcast_id) il4965_set_ccmp_dynamic_key_info()
3317 spin_lock_irqsave(&il->sta_lock, flags); il4965_set_ccmp_dynamic_key_info()
3318 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; il4965_set_ccmp_dynamic_key_info()
3319 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; il4965_set_ccmp_dynamic_key_info()
3321 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); il4965_set_ccmp_dynamic_key_info()
3323 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); il4965_set_ccmp_dynamic_key_info()
3325 if ((il->stations[sta_id].sta.key. il4965_set_ccmp_dynamic_key_info()
3327 il->stations[sta_id].sta.key.key_offset = il4965_set_ccmp_dynamic_key_info()
3328 il_get_free_ucode_key_idx(il); il4965_set_ccmp_dynamic_key_info()
3332 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, il4965_set_ccmp_dynamic_key_info()
3335 il->stations[sta_id].sta.key.key_flags = key_flags; il4965_set_ccmp_dynamic_key_info()
3336 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; il4965_set_ccmp_dynamic_key_info()
3337 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il4965_set_ccmp_dynamic_key_info()
3339 memcpy(&sta_cmd, &il->stations[sta_id].sta, il4965_set_ccmp_dynamic_key_info()
3341 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_set_ccmp_dynamic_key_info()
3343 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); il4965_set_ccmp_dynamic_key_info()
3347 il4965_set_tkip_dynamic_key_info(struct il_priv *il, il4965_set_tkip_dynamic_key_info() argument
3358 if (sta_id == il->hw_params.bcast_id) il4965_set_tkip_dynamic_key_info()
3364 spin_lock_irqsave(&il->sta_lock, flags); il4965_set_tkip_dynamic_key_info()
3366 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; il4965_set_tkip_dynamic_key_info()
3367 il->stations[sta_id].keyinfo.keylen = 16; il4965_set_tkip_dynamic_key_info()
3369 if ((il->stations[sta_id].sta.key. il4965_set_tkip_dynamic_key_info()
3371 il->stations[sta_id].sta.key.key_offset = il4965_set_tkip_dynamic_key_info()
3372 il_get_free_ucode_key_idx(il); il4965_set_tkip_dynamic_key_info()
3376 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, il4965_set_tkip_dynamic_key_info()
3379 il->stations[sta_id].sta.key.key_flags = key_flags; il4965_set_tkip_dynamic_key_info()
3382 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16); il4965_set_tkip_dynamic_key_info()
3384 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, 16); il4965_set_tkip_dynamic_key_info()
3386 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_set_tkip_dynamic_key_info()
3392 il4965_update_tkip_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, il4965_update_tkip_key() argument
3399 if (il_scan_cancel(il)) { il4965_update_tkip_key()
3405 sta_id = il_sta_id_or_broadcast(il, sta); il4965_update_tkip_key()
3409 spin_lock_irqsave(&il->sta_lock, flags); il4965_update_tkip_key()
3411 il->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; il4965_update_tkip_key()
3414 il->stations[sta_id].sta.key.tkip_rx_ttak[i] = il4965_update_tkip_key()
3417 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; il4965_update_tkip_key()
3418 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il4965_update_tkip_key()
3420 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); il4965_update_tkip_key()
3422 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_update_tkip_key()
3426 il4965_remove_dynamic_key(struct il_priv *il, il4965_remove_dynamic_key() argument
3434 lockdep_assert_held(&il->mutex); il4965_remove_dynamic_key()
3436 il->_4965.key_mapping_keys--; il4965_remove_dynamic_key()
3438 spin_lock_irqsave(&il->sta_lock, flags); il4965_remove_dynamic_key()
3439 key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags); il4965_remove_dynamic_key()
3450 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_remove_dynamic_key()
3454 if (il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_INVALID) { il4965_remove_dynamic_key()
3457 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_remove_dynamic_key()
3462 (il->stations[sta_id].sta.key.key_offset, &il->ucode_key_table)) il4965_remove_dynamic_key()
3464 il->stations[sta_id].sta.key.key_offset); il4965_remove_dynamic_key()
3465 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); il4965_remove_dynamic_key()
3466 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); il4965_remove_dynamic_key()
3467 il->stations[sta_id].sta.key.key_flags = il4965_remove_dynamic_key()
3469 il->stations[sta_id].sta.key.key_offset = keyconf->hw_key_idx; il4965_remove_dynamic_key()
3470 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; il4965_remove_dynamic_key()
3471 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il4965_remove_dynamic_key()
3473 if (il_is_rfkill(il)) { il4965_remove_dynamic_key()
3476 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_remove_dynamic_key()
3479 memcpy(&sta_cmd, &il->stations[sta_id].sta, il4965_remove_dynamic_key()
3481 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_remove_dynamic_key()
3483 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); il4965_remove_dynamic_key()
3487 il4965_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, il4965_set_dynamic_key() argument
3492 lockdep_assert_held(&il->mutex); il4965_set_dynamic_key()
3494 il->_4965.key_mapping_keys++; il4965_set_dynamic_key()
3500 il4965_set_ccmp_dynamic_key_info(il, keyconf, sta_id); il4965_set_dynamic_key()
3504 il4965_set_tkip_dynamic_key_info(il, keyconf, sta_id); il4965_set_dynamic_key()
3508 ret = il4965_set_wep_dynamic_key_info(il, keyconf, sta_id); il4965_set_dynamic_key()
3530 il4965_alloc_bcast_station(struct il_priv *il) il4965_alloc_bcast_station() argument
3536 spin_lock_irqsave(&il->sta_lock, flags); il4965_alloc_bcast_station()
3537 sta_id = il_prep_station(il, il_bcast_addr, false, NULL); il4965_alloc_bcast_station()
3540 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_alloc_bcast_station()
3545 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE; il4965_alloc_bcast_station()
3546 il->stations[sta_id].used |= IL_STA_BCAST; il4965_alloc_bcast_station()
3547 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_alloc_bcast_station()
3549 link_cmd = il4965_sta_alloc_lq(il, sta_id); il4965_alloc_bcast_station()
3556 spin_lock_irqsave(&il->sta_lock, flags); il4965_alloc_bcast_station()
3557 il->stations[sta_id].lq = link_cmd; il4965_alloc_bcast_station()
3558 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_alloc_bcast_station()
3570 il4965_update_bcast_station(struct il_priv *il) il4965_update_bcast_station() argument
3574 u8 sta_id = il->hw_params.bcast_id; il4965_update_bcast_station()
3576 link_cmd = il4965_sta_alloc_lq(il, sta_id); il4965_update_bcast_station()
3582 spin_lock_irqsave(&il->sta_lock, flags); il4965_update_bcast_station()
3583 if (il->stations[sta_id].lq) il4965_update_bcast_station()
3584 kfree(il->stations[sta_id].lq); il4965_update_bcast_station()
3587 il->stations[sta_id].lq = link_cmd; il4965_update_bcast_station()
3588 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_update_bcast_station()
3594 il4965_update_bcast_stations(struct il_priv *il) il4965_update_bcast_stations() argument
3596 return il4965_update_bcast_station(il); il4965_update_bcast_stations()
3603 il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid) il4965_sta_tx_modify_enable_tid() argument
3608 lockdep_assert_held(&il->mutex); il4965_sta_tx_modify_enable_tid()
3611 spin_lock_irqsave(&il->sta_lock, flags); il4965_sta_tx_modify_enable_tid()
3612 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX; il4965_sta_tx_modify_enable_tid()
3613 il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid)); il4965_sta_tx_modify_enable_tid()
3614 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il4965_sta_tx_modify_enable_tid()
3615 memcpy(&sta_cmd, &il->stations[sta_id].sta, il4965_sta_tx_modify_enable_tid()
3617 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_sta_tx_modify_enable_tid()
3619 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); il4965_sta_tx_modify_enable_tid()
3623 il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, int tid, il4965_sta_rx_agg_start() argument
3630 lockdep_assert_held(&il->mutex); il4965_sta_rx_agg_start()
3636 spin_lock_irqsave(&il->sta_lock, flags); il4965_sta_rx_agg_start()
3637 il->stations[sta_id].sta.station_flags_msk = 0; il4965_sta_rx_agg_start()
3638 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK; il4965_sta_rx_agg_start()
3639 il->stations[sta_id].sta.add_immediate_ba_tid = (u8) tid; il4965_sta_rx_agg_start()
3640 il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn); il4965_sta_rx_agg_start()
3641 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il4965_sta_rx_agg_start()
3642 memcpy(&sta_cmd, &il->stations[sta_id].sta, il4965_sta_rx_agg_start()
3644 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_sta_rx_agg_start()
3646 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); il4965_sta_rx_agg_start()
3650 il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, int tid) il4965_sta_rx_agg_stop() argument
3656 lockdep_assert_held(&il->mutex); il4965_sta_rx_agg_stop()
3664 spin_lock_irqsave(&il->sta_lock, flags); il4965_sta_rx_agg_stop()
3665 il->stations[sta_id].sta.station_flags_msk = 0; il4965_sta_rx_agg_stop()
3666 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK; il4965_sta_rx_agg_stop()
3667 il->stations[sta_id].sta.remove_immediate_ba_tid = (u8) tid; il4965_sta_rx_agg_stop()
3668 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il4965_sta_rx_agg_stop()
3669 memcpy(&sta_cmd, &il->stations[sta_id].sta, il4965_sta_rx_agg_stop()
3671 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_sta_rx_agg_stop()
3673 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); il4965_sta_rx_agg_stop()
3677 il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt) il4965_sta_modify_sleep_tx_count() argument
3681 spin_lock_irqsave(&il->sta_lock, flags); il4965_sta_modify_sleep_tx_count()
3682 il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK; il4965_sta_modify_sleep_tx_count()
3683 il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK; il4965_sta_modify_sleep_tx_count()
3684 il->stations[sta_id].sta.sta.modify_mask = il4965_sta_modify_sleep_tx_count()
3686 il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt); il4965_sta_modify_sleep_tx_count()
3687 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il4965_sta_modify_sleep_tx_count()
3688 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); il4965_sta_modify_sleep_tx_count()
3689 spin_unlock_irqrestore(&il->sta_lock, flags); il4965_sta_modify_sleep_tx_count()
3694 il4965_update_chain_flags(struct il_priv *il) il4965_update_chain_flags() argument
3696 if (il->ops->set_rxon_chain) { il4965_update_chain_flags()
3697 il->ops->set_rxon_chain(il); il4965_update_chain_flags()
3698 if (il->active.rx_chain != il->staging.rx_chain) il4965_update_chain_flags()
3699 il_commit_rxon(il); il4965_update_chain_flags()
3704 il4965_clear_free_frames(struct il_priv *il) il4965_clear_free_frames() argument
3708 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); il4965_clear_free_frames()
3710 while (!list_empty(&il->free_frames)) { il4965_clear_free_frames()
3711 element = il->free_frames.next; il4965_clear_free_frames()
3714 il->frames_count--; il4965_clear_free_frames()
3717 if (il->frames_count) { il4965_clear_free_frames()
3719 il->frames_count); il4965_clear_free_frames()
3720 il->frames_count = 0; il4965_clear_free_frames()
3725 il4965_get_free_frame(struct il_priv *il) il4965_get_free_frame() argument
3729 if (list_empty(&il->free_frames)) { il4965_get_free_frame()
3736 il->frames_count++; il4965_get_free_frame()
3740 element = il->free_frames.next; il4965_get_free_frame()
3746 il4965_free_frame(struct il_priv *il, struct il_frame *frame) il4965_free_frame() argument
3749 list_add(&frame->list, &il->free_frames); il4965_free_frame()
3753 il4965_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, il4965_fill_beacon_frame() argument
3756 lockdep_assert_held(&il->mutex); il4965_fill_beacon_frame()
3758 if (!il->beacon_skb) il4965_fill_beacon_frame()
3761 if (il->beacon_skb->len > left) il4965_fill_beacon_frame()
3764 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len); il4965_fill_beacon_frame()
3766 return il->beacon_skb->len; il4965_fill_beacon_frame()
3771 il4965_set_beacon_tim(struct il_priv *il, il4965_set_beacon_tim() argument
3798 il4965_hw_get_beacon_cmd(struct il_priv *il, struct il_frame *frame) il4965_hw_get_beacon_cmd() argument
3809 lockdep_assert_held(&il->mutex); il4965_hw_get_beacon_cmd()
3811 if (!il->beacon_enabled) { il4965_hw_get_beacon_cmd()
3822 il4965_fill_beacon_frame(il, tx_beacon_cmd->frame, il4965_hw_get_beacon_cmd()
3831 tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id; il4965_hw_get_beacon_cmd()
3838 il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *) tx_beacon_cmd->frame, il4965_hw_get_beacon_cmd()
3842 rate = il_get_lowest_plcp(il); il4965_hw_get_beacon_cmd()
3843 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant); il4965_hw_get_beacon_cmd()
3844 rate_flags = BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS; il4965_hw_get_beacon_cmd()
3853 il4965_send_beacon_cmd(struct il_priv *il) il4965_send_beacon_cmd() argument
3859 frame = il4965_get_free_frame(il); il4965_send_beacon_cmd()
3866 frame_size = il4965_hw_get_beacon_cmd(il, frame); il4965_send_beacon_cmd()
3869 il4965_free_frame(il, frame); il4965_send_beacon_cmd()
3873 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); il4965_send_beacon_cmd()
3875 il4965_free_frame(il, frame); il4965_send_beacon_cmd()
3925 * @il - driver ilate data
3932 il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) il4965_hw_txq_free_tfd() argument
3936 struct pci_dev *dev = il->pci_dev; il4965_hw_txq_free_tfd()
3977 il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq, il4965_hw_txq_attach_buf_to_tfd() argument
4017 il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq) il4965_hw_tx_queue_init() argument
4022 il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), txq->q.dma_addr >> 8); il4965_hw_tx_queue_init()
4033 il4965_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_alive() argument
4046 memcpy(&il->card_alive_init, &pkt->u.alive_frame, il4965_hdl_alive()
4048 pwork = &il->init_alive_start; il4965_hdl_alive()
4051 memcpy(&il->card_alive, &pkt->u.alive_frame, il4965_hdl_alive()
4053 pwork = &il->alive_start; il4965_hdl_alive()
4059 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); il4965_hdl_alive()
4077 struct il_priv *il = (struct il_priv *)data; il4965_bg_stats_periodic() local
4079 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_bg_stats_periodic()
4083 if (!il_is_ready_rf(il)) il4965_bg_stats_periodic()
4086 il_send_stats_request(il, CMD_ASYNC, false); il4965_bg_stats_periodic()
4090 il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_beacon() argument
4104 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); il4965_hdl_beacon()
4108 il4965_perform_ct_kill_task(struct il_priv *il) il4965_perform_ct_kill_task() argument
4114 if (il->mac80211_registered) il4965_perform_ct_kill_task()
4115 ieee80211_stop_queues(il->hw); il4965_perform_ct_kill_task()
4117 _il_wr(il, CSR_UCODE_DRV_GP1_SET, il4965_perform_ct_kill_task()
4119 _il_rd(il, CSR_UCODE_DRV_GP1); il4965_perform_ct_kill_task()
4121 spin_lock_irqsave(&il->reg_lock, flags); il4965_perform_ct_kill_task()
4122 if (likely(_il_grab_nic_access(il))) il4965_perform_ct_kill_task()
4123 _il_release_nic_access(il); il4965_perform_ct_kill_task()
4124 spin_unlock_irqrestore(&il->reg_lock, flags); il4965_perform_ct_kill_task()
4130 il4965_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) il4965_hdl_card_state() argument
4134 unsigned long status = il->status; il4965_hdl_card_state()
4143 _il_wr(il, CSR_UCODE_DRV_GP1_SET, il4965_hdl_card_state()
4146 il_wr(il, HBUS_TARG_MBX_C, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); il4965_hdl_card_state()
4149 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, il4965_hdl_card_state()
4151 il_wr(il, HBUS_TARG_MBX_C, il4965_hdl_card_state()
4157 il4965_perform_ct_kill_task(il); il4965_hdl_card_state()
4160 set_bit(S_RFKILL, &il->status); il4965_hdl_card_state()
4162 clear_bit(S_RFKILL, &il->status); il4965_hdl_card_state()
4165 il_scan_cancel(il); il4965_hdl_card_state()
4168 test_bit(S_RFKILL, &il->status))) il4965_hdl_card_state()
4169 wiphy_rfkill_set_hw_state(il->hw->wiphy, il4965_hdl_card_state()
4170 test_bit(S_RFKILL, &il->status)); il4965_hdl_card_state()
4172 wake_up(&il->wait_command_queue); il4965_hdl_card_state()
4185 il4965_setup_handlers(struct il_priv *il) il4965_setup_handlers() argument
4187 il->handlers[N_ALIVE] = il4965_hdl_alive; il4965_setup_handlers()
4188 il->handlers[N_ERROR] = il_hdl_error; il4965_setup_handlers()
4189 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; il4965_setup_handlers()
4190 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; il4965_setup_handlers()
4191 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; il4965_setup_handlers()
4192 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; il4965_setup_handlers()
4193 il->handlers[N_BEACON] = il4965_hdl_beacon; il4965_setup_handlers()
4200 il->handlers[C_STATS] = il4965_hdl_c_stats; il4965_setup_handlers()
4201 il->handlers[N_STATS] = il4965_hdl_stats; il4965_setup_handlers()
4203 il_setup_rx_scan_handlers(il); il4965_setup_handlers()
4206 il->handlers[N_CARD_STATE] = il4965_hdl_card_state; il4965_setup_handlers()
4208 il->handlers[N_MISSED_BEACONS] = il4965_hdl_missed_beacon; il4965_setup_handlers()
4210 il->handlers[N_RX_PHY] = il4965_hdl_rx_phy; il4965_setup_handlers()
4211 il->handlers[N_RX_MPDU] = il4965_hdl_rx; il4965_setup_handlers()
4212 il->handlers[N_RX] = il4965_hdl_rx; il4965_setup_handlers()
4214 il->handlers[N_COMPRESSED_BA] = il4965_hdl_compressed_ba; il4965_setup_handlers()
4216 il->handlers[C_TX] = il4965_hdl_tx; il4965_setup_handlers()
4222 * Uses the il->handlers callback function array to invoke
4227 il4965_rx_handle(struct il_priv *il) il4965_rx_handle() argument
4231 struct il_rx_queue *rxq = &il->rxq; il4965_rx_handle()
4268 pci_unmap_page(il->pci_dev, rxb->page_dma, il4965_rx_handle()
4269 PAGE_SIZE << il->hw_params.rx_page_order, il4965_rx_handle()
4276 reclaim = il_need_reclaim(il, pkt); il4965_rx_handle()
4281 if (il->handlers[pkt->hdr.cmd]) { il4965_rx_handle()
4284 il->isr_stats.handlers[pkt->hdr.cmd]++; il4965_rx_handle()
4285 il->handlers[pkt->hdr.cmd] (il, rxb); il4965_rx_handle()
4304 il_tx_cmd_complete(il, rxb); il4965_rx_handle()
4315 pci_map_page(il->pci_dev, rxb->page, 0, il4965_rx_handle()
4316 PAGE_SIZE << il->hw_params. il4965_rx_handle()
4319 if (unlikely(pci_dma_mapping_error(il->pci_dev, il4965_rx_handle()
4321 __il_free_pages(il, rxb->page); il4965_rx_handle()
4340 il4965_rx_replenish_now(il); il4965_rx_handle()
4349 il4965_rx_replenish_now(il); il4965_rx_handle()
4351 il4965_rx_queue_restock(il); il4965_rx_handle()
4356 il4965_synchronize_irq(struct il_priv *il) il4965_synchronize_irq() argument
4359 synchronize_irq(il->pci_dev->irq); il4965_synchronize_irq()
4360 tasklet_kill(&il->irq_tasklet); il4965_synchronize_irq()
4364 il4965_irq_tasklet(struct il_priv *il) il4965_irq_tasklet() argument
4374 spin_lock_irqsave(&il->lock, flags); il4965_irq_tasklet()
4379 inta = _il_rd(il, CSR_INT); il4965_irq_tasklet()
4380 _il_wr(il, CSR_INT, inta); il4965_irq_tasklet()
4385 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); il4965_irq_tasklet()
4386 _il_wr(il, CSR_FH_INT_STATUS, inta_fh); il4965_irq_tasklet()
4389 if (il_get_debug_level(il) & IL_DL_ISR) { il4965_irq_tasklet()
4391 inta_mask = _il_rd(il, CSR_INT_MASK); il4965_irq_tasklet()
4397 spin_unlock_irqrestore(&il->lock, flags); il4965_irq_tasklet()
4413 il_disable_interrupts(il); il4965_irq_tasklet()
4415 il->isr_stats.hw++; il4965_irq_tasklet()
4416 il_irq_handle_error(il); il4965_irq_tasklet()
4423 if (il_get_debug_level(il) & (IL_DL_ISR)) { il4965_irq_tasklet()
4428 il->isr_stats.sch++; il4965_irq_tasklet()
4434 il->isr_stats.alive++; il4965_irq_tasklet()
4445 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) il4965_irq_tasklet()
4451 il->isr_stats.rfkill++; il4965_irq_tasklet()
4459 set_bit(S_RFKILL, &il->status); il4965_irq_tasklet()
4461 clear_bit(S_RFKILL, &il->status); il4965_irq_tasklet()
4462 il_force_reset(il, true); il4965_irq_tasklet()
4464 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rf_kill); il4965_irq_tasklet()
4472 il->isr_stats.ctkill++; il4965_irq_tasklet()
4480 il->isr_stats.sw++; il4965_irq_tasklet()
4481 il_irq_handle_error(il); il4965_irq_tasklet()
4492 il_rx_queue_update_write_ptr(il, &il->rxq); il4965_irq_tasklet()
4493 for (i = 0; i < il->hw_params.max_txq_num; i++) il4965_irq_tasklet()
4494 il_txq_update_write_ptr(il, &il->txq[i]); il4965_irq_tasklet()
4495 il->isr_stats.wakeup++; il4965_irq_tasklet()
4503 il4965_rx_handle(il); il4965_irq_tasklet()
4504 il->isr_stats.rx++; il4965_irq_tasklet()
4511 il->isr_stats.tx++; il4965_irq_tasklet()
4514 il->ucode_write_complete = 1; il4965_irq_tasklet()
4515 wake_up(&il->wait_command_queue); il4965_irq_tasklet()
4520 il->isr_stats.unhandled++; il4965_irq_tasklet()
4523 if (inta & ~(il->inta_mask)) { il4965_irq_tasklet()
4525 inta & ~il->inta_mask); il4965_irq_tasklet()
4531 if (test_bit(S_INT_ENABLED, &il->status)) il4965_irq_tasklet()
4532 il_enable_interrupts(il); il4965_irq_tasklet()
4535 il_enable_rfkill_int(il); il4965_irq_tasklet()
4538 if (il_get_debug_level(il) & (IL_DL_ISR)) { il4965_irq_tasklet()
4539 inta = _il_rd(il, CSR_INT); il4965_irq_tasklet()
4540 inta_mask = _il_rd(il, CSR_INT_MASK); il4965_irq_tasklet()
4541 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); il4965_irq_tasklet()
4571 struct il_priv *il = dev_get_drvdata(d); il4965_show_debug_level() local
4572 return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); il4965_show_debug_level()
4579 struct il_priv *il = dev_get_drvdata(d); il4965_store_debug_level() local
4587 il->debug_level = val; il4965_store_debug_level()
4601 struct il_priv *il = dev_get_drvdata(d); il4965_show_temperature() local
4603 if (!il_is_alive(il)) il4965_show_temperature()
4606 return sprintf(buf, "%d\n", il->temperature); il4965_show_temperature()
4614 struct il_priv *il = dev_get_drvdata(d); il4965_show_tx_power() local
4616 if (!il_is_ready_rf(il)) il4965_show_tx_power()
4619 return sprintf(buf, "%d\n", il->tx_power_user_lmt); il4965_show_tx_power()
4626 struct il_priv *il = dev_get_drvdata(d); il4965_store_tx_power() local
4634 ret = il_set_tx_power(il, val, false); il4965_store_tx_power()
4667 il4965_dealloc_ucode_pci(struct il_priv *il) il4965_dealloc_ucode_pci() argument
4669 il_free_fw_desc(il->pci_dev, &il->ucode_code); il4965_dealloc_ucode_pci()
4670 il_free_fw_desc(il->pci_dev, &il->ucode_data); il4965_dealloc_ucode_pci()
4671 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup); il4965_dealloc_ucode_pci()
4672 il_free_fw_desc(il->pci_dev, &il->ucode_init); il4965_dealloc_ucode_pci()
4673 il_free_fw_desc(il->pci_dev, &il->ucode_init_data); il4965_dealloc_ucode_pci()
4674 il_free_fw_desc(il->pci_dev, &il->ucode_boot); il4965_dealloc_ucode_pci()
4678 il4965_nic_start(struct il_priv *il) il4965_nic_start() argument
4681 _il_wr(il, CSR_RESET, 0); il4965_nic_start()
4686 static int il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length);
4689 il4965_request_firmware(struct il_priv *il, bool first) il4965_request_firmware() argument
4691 const char *name_pre = il->cfg->fw_name_pre; il4965_request_firmware()
4695 il->fw_idx = il->cfg->ucode_api_max; il4965_request_firmware()
4696 sprintf(tag, "%d", il->fw_idx); il4965_request_firmware()
4698 il->fw_idx--; il4965_request_firmware()
4699 sprintf(tag, "%d", il->fw_idx); il4965_request_firmware()
4702 if (il->fw_idx < il->cfg->ucode_api_min) { il4965_request_firmware()
4707 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); il4965_request_firmware()
4709 D_INFO("attempting to load firmware '%s'\n", il->firmware_name); il4965_request_firmware()
4711 return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name, il4965_request_firmware()
4712 &il->pci_dev->dev, GFP_KERNEL, il, il4965_request_firmware()
4722 il4965_load_firmware(struct il_priv *il, const struct firmware *ucode_raw, il4965_load_firmware() argument
4729 il->ucode_ver = le32_to_cpu(ucode->ver); il4965_load_firmware()
4730 api_ver = IL_UCODE_API(il->ucode_ver); il4965_load_firmware()
4784 struct il_priv *il = context; il4965_ucode_callback() local
4788 const unsigned int api_max = il->cfg->ucode_api_max; il4965_ucode_callback()
4789 const unsigned int api_min = il->cfg->ucode_api_min; il4965_ucode_callback()
4799 if (il->fw_idx <= il->cfg->ucode_api_max) il4965_ucode_callback()
4801 il->firmware_name); il4965_ucode_callback()
4805 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il->firmware_name, il4965_ucode_callback()
4817 err = il4965_load_firmware(il, ucode_raw, &pieces); il4965_ucode_callback()
4822 api_ver = IL_UCODE_API(il->ucode_ver); il4965_ucode_callback()
4843 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), il4965_ucode_callback()
4844 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); il4965_ucode_callback()
4846 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), il4965_ucode_callback()
4847 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), il4965_ucode_callback()
4848 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), il4965_ucode_callback()
4849 IL_UCODE_SERIAL(il->ucode_ver)); il4965_ucode_callback()
4857 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); il4965_ucode_callback()
4865 if (pieces.inst_size > il->hw_params.max_inst_size) { il4965_ucode_callback()
4871 if (pieces.data_size > il->hw_params.max_data_size) { il4965_ucode_callback()
4877 if (pieces.init_size > il->hw_params.max_inst_size) { il4965_ucode_callback()
4883 if (pieces.init_data_size > il->hw_params.max_data_size) { il4965_ucode_callback()
4889 if (pieces.boot_size > il->hw_params.max_bsm_size) { il4965_ucode_callback()
4900 il->ucode_code.len = pieces.inst_size; il4965_ucode_callback()
4901 il_alloc_fw_desc(il->pci_dev, &il->ucode_code); il4965_ucode_callback()
4903 il->ucode_data.len = pieces.data_size; il4965_ucode_callback()
4904 il_alloc_fw_desc(il->pci_dev, &il->ucode_data); il4965_ucode_callback()
4906 il->ucode_data_backup.len = pieces.data_size; il4965_ucode_callback()
4907 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup); il4965_ucode_callback()
4909 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr || il4965_ucode_callback()
4910 !il->ucode_data_backup.v_addr) il4965_ucode_callback()
4915 il->ucode_init.len = pieces.init_size; il4965_ucode_callback()
4916 il_alloc_fw_desc(il->pci_dev, &il->ucode_init); il4965_ucode_callback()
4918 il->ucode_init_data.len = pieces.init_data_size; il4965_ucode_callback()
4919 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data); il4965_ucode_callback()
4921 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr) il4965_ucode_callback()
4927 il->ucode_boot.len = pieces.boot_size; il4965_ucode_callback()
4928 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot); il4965_ucode_callback()
4930 if (!il->ucode_boot.v_addr) il4965_ucode_callback()
4936 il->sta_key_max_num = STA_KEY_MAX_NUM; il4965_ucode_callback()
4943 memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size); il4965_ucode_callback()
4946 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); il4965_ucode_callback()
4954 memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size); il4965_ucode_callback()
4955 memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size); il4965_ucode_callback()
4961 memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size); il4965_ucode_callback()
4968 memcpy(il->ucode_init_data.v_addr, pieces.init_data, il4965_ucode_callback()
4975 memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size); il4965_ucode_callback()
4981 il->_4965.phy_calib_chain_noise_reset_cmd = il4965_ucode_callback()
4983 il->_4965.phy_calib_chain_noise_gain_cmd = il4965_ucode_callback()
4991 err = il4965_mac_setup_register(il, max_probe_length); il4965_ucode_callback()
4995 err = il_dbgfs_register(il, DRV_NAME); il4965_ucode_callback()
5000 err = sysfs_create_group(&il->pci_dev->dev.kobj, &il_attribute_group); il4965_ucode_callback()
5008 complete(&il->_4965.firmware_loading_complete); il4965_ucode_callback()
5013 if (il4965_request_firmware(il, false)) il4965_ucode_callback()
5020 il4965_dealloc_ucode_pci(il); il4965_ucode_callback()
5022 complete(&il->_4965.firmware_loading_complete); il4965_ucode_callback()
5023 device_release_driver(&il->pci_dev->dev); il4965_ucode_callback()
5101 il4965_dump_nic_error_log(struct il_priv *il) il4965_dump_nic_error_log() argument
5108 if (il->ucode_type == UCODE_INIT) il4965_dump_nic_error_log()
5109 base = le32_to_cpu(il->card_alive_init.error_event_table_ptr); il4965_dump_nic_error_log()
5111 base = le32_to_cpu(il->card_alive.error_event_table_ptr); il4965_dump_nic_error_log()
5113 if (!il->ops->is_valid_rtc_data_addr(base)) { il4965_dump_nic_error_log()
5115 base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT"); il4965_dump_nic_error_log()
5119 count = il_read_targ_mem(il, base); il4965_dump_nic_error_log()
5123 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); il4965_dump_nic_error_log()
5126 desc = il_read_targ_mem(il, base + 1 * sizeof(u32)); il4965_dump_nic_error_log()
5127 il->isr_stats.err_code = desc; il4965_dump_nic_error_log()
5128 pc = il_read_targ_mem(il, base + 2 * sizeof(u32)); il4965_dump_nic_error_log()
5129 blink1 = il_read_targ_mem(il, base + 3 * sizeof(u32)); il4965_dump_nic_error_log()
5130 blink2 = il_read_targ_mem(il, base + 4 * sizeof(u32)); il4965_dump_nic_error_log()
5131 ilink1 = il_read_targ_mem(il, base + 5 * sizeof(u32)); il4965_dump_nic_error_log()
5132 ilink2 = il_read_targ_mem(il, base + 6 * sizeof(u32)); il4965_dump_nic_error_log()
5133 data1 = il_read_targ_mem(il, base + 7 * sizeof(u32)); il4965_dump_nic_error_log()
5134 data2 = il_read_targ_mem(il, base + 8 * sizeof(u32)); il4965_dump_nic_error_log()
5135 line = il_read_targ_mem(il, base + 9 * sizeof(u32)); il4965_dump_nic_error_log()
5136 time = il_read_targ_mem(il, base + 11 * sizeof(u32)); il4965_dump_nic_error_log()
5137 hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32)); il4965_dump_nic_error_log()
5149 il4965_rf_kill_ct_config(struct il_priv *il) il4965_rf_kill_ct_config() argument
5155 spin_lock_irqsave(&il->lock, flags); il4965_rf_kill_ct_config()
5156 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, il4965_rf_kill_ct_config()
5158 spin_unlock_irqrestore(&il->lock, flags); il4965_rf_kill_ct_config()
5161 cpu_to_le32(il->hw_params.ct_kill_threshold); il4965_rf_kill_ct_config()
5163 ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, sizeof(cmd), &cmd); il4965_rf_kill_ct_config()
5169 il->hw_params.ct_kill_threshold); il4965_rf_kill_ct_config()
5185 il4965_alive_notify(struct il_priv *il) il4965_alive_notify() argument
5192 spin_lock_irqsave(&il->lock, flags); il4965_alive_notify()
5195 il->scd_base_addr = il_rd_prph(il, IL49_SCD_SRAM_BASE_ADDR); il4965_alive_notify()
5196 a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET; il4965_alive_notify()
5197 for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4) il4965_alive_notify()
5198 il_write_targ_mem(il, a, 0); il4965_alive_notify()
5199 for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4) il4965_alive_notify()
5200 il_write_targ_mem(il, a, 0); il4965_alive_notify()
5203 il->scd_base_addr + il4965_alive_notify()
5204 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num); il4965_alive_notify()
5206 il_write_targ_mem(il, a, 0); il4965_alive_notify()
5209 il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, il->scd_bc_tbls.dma >> 10); il4965_alive_notify()
5213 il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(chan), il4965_alive_notify()
5218 reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG); il4965_alive_notify()
5219 il_wr(il, FH49_TX_CHICKEN_BITS_REG, il4965_alive_notify()
5223 il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0); il4965_alive_notify()
5226 for (i = 0; i < il->hw_params.max_txq_num; i++) { il4965_alive_notify()
5229 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(i), 0); il4965_alive_notify()
5230 il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8)); il4965_alive_notify()
5233 il_write_targ_mem(il, il4965_alive_notify()
5234 il->scd_base_addr + il4965_alive_notify()
5241 il_write_targ_mem(il, il4965_alive_notify()
5242 il->scd_base_addr + il4965_alive_notify()
5250 il_wr_prph(il, IL49_SCD_INTERRUPT_MASK, il4965_alive_notify()
5251 (1 << il->hw_params.max_txq_num) - 1); il4965_alive_notify()
5254 il4965_txq_set_sched(il, IL_MASK(0, 6)); il4965_alive_notify()
5256 il4965_set_wr_ptrs(il, IL_DEFAULT_CMD_QUEUE_NUM, 0); il4965_alive_notify()
5259 memset(&il->queue_stopped[0], 0, sizeof(il->queue_stopped)); il4965_alive_notify()
5261 atomic_set(&il->queue_stop_count[i], 0); il4965_alive_notify()
5264 il->txq_ctx_active_msk = 0; il4965_alive_notify()
5271 il_txq_ctx_activate(il, i); il4965_alive_notify()
5276 il4965_tx_queue_set_status(il, &il->txq[i], ac, 0); il4965_alive_notify()
5279 spin_unlock_irqrestore(&il->lock, flags); il4965_alive_notify()
5290 il4965_alive_start(struct il_priv *il) il4965_alive_start() argument
5296 if (il->card_alive.is_valid != UCODE_VALID_OK) { il4965_alive_start()
5306 if (il4965_verify_ucode(il)) { il4965_alive_start()
5313 ret = il4965_alive_notify(il); il4965_alive_start()
5320 set_bit(S_ALIVE, &il->status); il4965_alive_start()
5323 il_setup_watchdog(il); il4965_alive_start()
5325 if (il_is_rfkill(il)) il4965_alive_start()
5328 ieee80211_wake_queues(il->hw); il4965_alive_start()
5330 il->active_rate = RATES_MASK; il4965_alive_start()
5332 il_power_update_mode(il, true); il4965_alive_start()
5335 if (il_is_associated(il)) { il4965_alive_start()
5337 (struct il_rxon_cmd *)&il->active; il4965_alive_start()
5339 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; il4965_alive_start()
5343 il_connection_init_rx_config(il); il4965_alive_start()
5345 if (il->ops->set_rxon_chain) il4965_alive_start()
5346 il->ops->set_rxon_chain(il); il4965_alive_start()
5350 il_send_bt_config(il); il4965_alive_start()
5352 il4965_reset_run_time_calib(il); il4965_alive_start()
5354 set_bit(S_READY, &il->status); il4965_alive_start()
5357 il_commit_rxon(il); il4965_alive_start()
5360 il4965_rf_kill_ct_config(il); il4965_alive_start()
5363 wake_up(&il->wait_command_queue); il4965_alive_start()
5368 queue_work(il->workqueue, &il->restart); il4965_alive_start()
5371 static void il4965_cancel_deferred_work(struct il_priv *il);
5374 __il4965_down(struct il_priv *il) __il4965_down() argument
5381 il_scan_cancel_timeout(il, 200); __il4965_down()
5383 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status); __il4965_down()
5387 del_timer_sync(&il->watchdog); __il4965_down()
5389 il_clear_ucode_stations(il); __il4965_down()
5392 spin_lock_irq(&il->sta_lock); __il4965_down()
5400 memset(il->_4965.wep_keys, 0, sizeof(il->_4965.wep_keys)); __il4965_down()
5401 il->_4965.key_mapping_keys = 0; __il4965_down()
5402 spin_unlock_irq(&il->sta_lock); __il4965_down()
5404 il_dealloc_bcast_stations(il); __il4965_down()
5405 il_clear_driver_stations(il); __il4965_down()
5408 wake_up_all(&il->wait_command_queue); __il4965_down()
5413 clear_bit(S_EXIT_PENDING, &il->status); __il4965_down()
5416 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); __il4965_down()
5419 spin_lock_irqsave(&il->lock, flags); __il4965_down()
5420 il_disable_interrupts(il); __il4965_down()
5421 spin_unlock_irqrestore(&il->lock, flags); __il4965_down()
5422 il4965_synchronize_irq(il); __il4965_down()
5424 if (il->mac80211_registered) __il4965_down()
5425 ieee80211_stop_queues(il->hw); __il4965_down()
5429 if (!il_is_init(il)) { __il4965_down()
5430 il->status = __il4965_down()
5431 test_bit(S_RFKILL, &il->status) << S_RFKILL | __il4965_down()
5432 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | __il4965_down()
5433 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; __il4965_down()
5439 il->status &= __il4965_down()
5440 test_bit(S_RFKILL, &il->status) << S_RFKILL | __il4965_down()
5441 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | __il4965_down()
5442 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR | __il4965_down()
5443 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; __il4965_down()
5450 spin_lock_irq(&il->reg_lock); __il4965_down()
5453 il4965_txq_ctx_stop(il); __il4965_down()
5454 il4965_rxq_stop(il); __il4965_down()
5456 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); __il4965_down()
5459 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); __il4965_down()
5461 _il_apm_stop(il); __il4965_down()
5463 spin_unlock_irq(&il->reg_lock); __il4965_down()
5465 il4965_txq_ctx_unmap(il); __il4965_down()
5467 memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); __il4965_down()
5469 dev_kfree_skb(il->beacon_skb); __il4965_down()
5470 il->beacon_skb = NULL; __il4965_down()
5473 il4965_clear_free_frames(il); __il4965_down()
5477 il4965_down(struct il_priv *il) il4965_down() argument
5479 mutex_lock(&il->mutex); il4965_down()
5480 __il4965_down(il); il4965_down()
5481 mutex_unlock(&il->mutex); il4965_down()
5483 il4965_cancel_deferred_work(il); il4965_down()
5488 il4965_set_hw_ready(struct il_priv *il) il4965_set_hw_ready() argument
5492 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il4965_set_hw_ready()
5496 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, il4965_set_hw_ready()
5501 il->hw_ready = true; il4965_set_hw_ready()
5503 D_INFO("hardware %s ready\n", (il->hw_ready) ? "" : "not"); il4965_set_hw_ready()
5507 il4965_prepare_card_hw(struct il_priv *il) il4965_prepare_card_hw() argument
5511 il->hw_ready = false; il4965_prepare_card_hw()
5513 il4965_set_hw_ready(il); il4965_prepare_card_hw()
5514 if (il->hw_ready) il4965_prepare_card_hw()
5518 il_set_bit(il, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_PREPARE); il4965_prepare_card_hw()
5521 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, il4965_prepare_card_hw()
5527 il4965_set_hw_ready(il); il4965_prepare_card_hw()
5533 __il4965_up(struct il_priv *il) __il4965_up() argument
5538 if (test_bit(S_EXIT_PENDING, &il->status)) { __il4965_up()
5543 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) { __il4965_up()
5548 ret = il4965_alloc_bcast_station(il); __il4965_up()
5550 il_dealloc_bcast_stations(il); __il4965_up()
5554 il4965_prepare_card_hw(il); __il4965_up()
5555 if (!il->hw_ready) { __il4965_up()
5561 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) __il4965_up()
5562 clear_bit(S_RFKILL, &il->status); __il4965_up()
5564 set_bit(S_RFKILL, &il->status); __il4965_up()
5565 wiphy_rfkill_set_hw_state(il->hw->wiphy, true); __il4965_up()
5567 il_enable_rfkill_int(il); __il4965_up()
5572 _il_wr(il, CSR_INT, 0xFFFFFFFF); __il4965_up()
5575 il->cmd_queue = IL_DEFAULT_CMD_QUEUE_NUM; __il4965_up()
5577 ret = il4965_hw_nic_init(il); __il4965_up()
5584 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); __il4965_up()
5585 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); __il4965_up()
5588 _il_wr(il, CSR_INT, 0xFFFFFFFF); __il4965_up()
5589 il_enable_interrupts(il); __il4965_up()
5592 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); __il4965_up()
5593 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); __il4965_up()
5598 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr, __il4965_up()
5599 il->ucode_data.len); __il4965_up()
5606 ret = il->ops->load_ucode(il); __il4965_up()
5614 il4965_nic_start(il); __il4965_up()
5621 set_bit(S_EXIT_PENDING, &il->status); __il4965_up()
5622 __il4965_down(il); __il4965_up()
5623 clear_bit(S_EXIT_PENDING, &il->status); __il4965_up()
5640 struct il_priv *il = il4965_bg_init_alive_start() local
5643 mutex_lock(&il->mutex); il4965_bg_init_alive_start()
5644 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_bg_init_alive_start()
5647 il->ops->init_alive_start(il); il4965_bg_init_alive_start()
5649 mutex_unlock(&il->mutex); il4965_bg_init_alive_start()
5655 struct il_priv *il = il4965_bg_alive_start() local
5658 mutex_lock(&il->mutex); il4965_bg_alive_start()
5659 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_bg_alive_start()
5662 il4965_alive_start(il); il4965_bg_alive_start()
5664 mutex_unlock(&il->mutex); il4965_bg_alive_start()
5670 struct il_priv *il = container_of(work, struct il_priv, il4965_bg_run_time_calib_work() local
5673 mutex_lock(&il->mutex); il4965_bg_run_time_calib_work()
5675 if (test_bit(S_EXIT_PENDING, &il->status) || il4965_bg_run_time_calib_work()
5676 test_bit(S_SCANNING, &il->status)) { il4965_bg_run_time_calib_work()
5677 mutex_unlock(&il->mutex); il4965_bg_run_time_calib_work()
5681 if (il->start_calib) { il4965_bg_run_time_calib_work()
5682 il4965_chain_noise_calibration(il, (void *)&il->_4965.stats); il4965_bg_run_time_calib_work()
5683 il4965_sensitivity_calibration(il, (void *)&il->_4965.stats); il4965_bg_run_time_calib_work()
5686 mutex_unlock(&il->mutex); il4965_bg_run_time_calib_work()
5692 struct il_priv *il = container_of(data, struct il_priv, restart); il4965_bg_restart() local
5694 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_bg_restart()
5697 if (test_and_clear_bit(S_FW_ERROR, &il->status)) { il4965_bg_restart()
5698 mutex_lock(&il->mutex); il4965_bg_restart()
5699 il->is_open = 0; il4965_bg_restart()
5701 __il4965_down(il); il4965_bg_restart()
5703 mutex_unlock(&il->mutex); il4965_bg_restart()
5704 il4965_cancel_deferred_work(il); il4965_bg_restart()
5705 ieee80211_restart_hw(il->hw); il4965_bg_restart()
5707 il4965_down(il); il4965_bg_restart()
5709 mutex_lock(&il->mutex); il4965_bg_restart()
5710 if (test_bit(S_EXIT_PENDING, &il->status)) { il4965_bg_restart()
5711 mutex_unlock(&il->mutex); il4965_bg_restart()
5715 __il4965_up(il); il4965_bg_restart()
5716 mutex_unlock(&il->mutex); il4965_bg_restart()
5723 struct il_priv *il = container_of(data, struct il_priv, rx_replenish); il4965_bg_rx_replenish() local
5725 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_bg_rx_replenish()
5728 mutex_lock(&il->mutex); il4965_bg_rx_replenish()
5729 il4965_rx_replenish(il); il4965_bg_rx_replenish()
5730 mutex_unlock(&il->mutex); il4965_bg_rx_replenish()
5746 il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length) il4965_mac_setup_register() argument
5749 struct ieee80211_hw *hw = il->hw; il4965_mac_setup_register()
5759 if (il->cfg->sku & IL_SKU_N) il4965_mac_setup_register()
5788 if (il->bands[IEEE80211_BAND_2GHZ].n_channels) il4965_mac_setup_register()
5789 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = il4965_mac_setup_register()
5790 &il->bands[IEEE80211_BAND_2GHZ]; il4965_mac_setup_register()
5791 if (il->bands[IEEE80211_BAND_5GHZ].n_channels) il4965_mac_setup_register()
5792 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = il4965_mac_setup_register()
5793 &il->bands[IEEE80211_BAND_5GHZ]; il4965_mac_setup_register()
5795 il_leds_init(il); il4965_mac_setup_register()
5797 ret = ieee80211_register_hw(il->hw); il4965_mac_setup_register()
5802 il->mac80211_registered = 1; il4965_mac_setup_register()
5810 struct il_priv *il = hw->priv; il4965_mac_start() local
5816 mutex_lock(&il->mutex); il4965_mac_start()
5817 ret = __il4965_up(il); il4965_mac_start()
5818 mutex_unlock(&il->mutex); il4965_mac_start()
5823 if (il_is_rfkill(il)) il4965_mac_start()
5830 ret = wait_event_timeout(il->wait_command_queue, il4965_mac_start()
5831 test_bit(S_READY, &il->status), il4965_mac_start()
5834 if (!test_bit(S_READY, &il->status)) { il4965_mac_start()
5841 il4965_led_enable(il); il4965_mac_start()
5844 il->is_open = 1; il4965_mac_start()
5852 struct il_priv *il = hw->priv; il4965_mac_stop() local
5856 if (!il->is_open) il4965_mac_stop()
5859 il->is_open = 0; il4965_mac_stop()
5861 il4965_down(il); il4965_mac_stop()
5863 flush_workqueue(il->workqueue); il4965_mac_stop()
5867 _il_wr(il, CSR_INT, 0xFFFFFFFF); il4965_mac_stop()
5868 il_enable_rfkill_int(il); il4965_mac_stop()
5878 struct il_priv *il = hw->priv; il4965_mac_tx() local
5885 if (il4965_tx_skb(il, control->sta, skb)) il4965_mac_tx()
5896 struct il_priv *il = hw->priv; il4965_mac_update_tkip_key() local
5900 il4965_update_tkip_key(il, keyconf, sta, iv32, phase1key); il4965_mac_update_tkip_key()
5910 struct il_priv *il = hw->priv; il4965_mac_set_key() local
5917 if (il->cfg->mod_params->sw_crypto) { il4965_mac_set_key()
5932 sta_id = il_sta_id_or_broadcast(il, sta); il4965_mac_set_key()
5936 mutex_lock(&il->mutex); il4965_mac_set_key()
5937 il_scan_cancel_timeout(il, 100); il4965_mac_set_key()
5948 is_default_wep_key = !il->_4965.key_mapping_keys; il4965_mac_set_key()
5957 ret = il4965_set_default_wep_key(il, key); il4965_mac_set_key()
5959 ret = il4965_set_dynamic_key(il, key, sta_id); il4965_mac_set_key()
5965 ret = il4965_remove_default_wep_key(il, key); il4965_mac_set_key()
5967 ret = il4965_remove_dynamic_key(il, key, sta_id); il4965_mac_set_key()
5975 mutex_unlock(&il->mutex); il4965_mac_set_key()
5987 struct il_priv *il = hw->priv; il4965_mac_ampdu_action() local
5992 if (!(il->cfg->sku & IL_SKU_N)) il4965_mac_ampdu_action()
5995 mutex_lock(&il->mutex); il4965_mac_ampdu_action()
6000 ret = il4965_sta_rx_agg_start(il, sta, tid, *ssn); il4965_mac_ampdu_action()
6004 ret = il4965_sta_rx_agg_stop(il, sta, tid); il4965_mac_ampdu_action()
6005 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_mac_ampdu_action()
6010 ret = il4965_tx_agg_start(il, vif, sta, tid, ssn); il4965_mac_ampdu_action()
6016 ret = il4965_tx_agg_stop(il, vif, sta, tid); il4965_mac_ampdu_action()
6017 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_mac_ampdu_action()
6024 mutex_unlock(&il->mutex); il4965_mac_ampdu_action()
6033 struct il_priv *il = hw->priv; il4965_mac_sta_add() local
6040 mutex_lock(&il->mutex); il4965_mac_sta_add()
6047 il_add_station_common(il, sta->addr, is_ap, sta, &sta_id); il4965_mac_sta_add()
6051 mutex_unlock(&il->mutex); il4965_mac_sta_add()
6059 il4965_rs_rate_init(il, sta, sta_id); il4965_mac_sta_add()
6060 mutex_unlock(&il->mutex); il4965_mac_sta_add()
6069 struct il_priv *il = hw->priv; il4965_mac_channel_switch() local
6073 struct il_ht_config *ht_conf = &il->current_ht_config; il4965_mac_channel_switch()
6078 mutex_lock(&il->mutex); il4965_mac_channel_switch()
6080 if (il_is_rfkill(il)) il4965_mac_channel_switch()
6083 if (test_bit(S_EXIT_PENDING, &il->status) || il4965_mac_channel_switch()
6084 test_bit(S_SCANNING, &il->status) || il4965_mac_channel_switch()
6085 test_bit(S_CHANNEL_SWITCH_PENDING, &il->status)) il4965_mac_channel_switch()
6088 if (!il_is_associated(il)) il4965_mac_channel_switch()
6091 if (!il->ops->set_channel_switch) il4965_mac_channel_switch()
6095 if (le16_to_cpu(il->active.channel) == ch) il4965_mac_channel_switch()
6098 ch_info = il_get_channel_info(il, channel->band, ch); il4965_mac_channel_switch()
6104 spin_lock_irq(&il->lock); il4965_mac_channel_switch()
6106 il->current_ht_config.smps = conf->smps_mode; il4965_mac_channel_switch()
6112 il->ht.is_40mhz = false; il4965_mac_channel_switch()
6113 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE; il4965_mac_channel_switch()
6116 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW; il4965_mac_channel_switch()
6117 il->ht.is_40mhz = true; il4965_mac_channel_switch()
6120 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE; il4965_mac_channel_switch()
6121 il->ht.is_40mhz = true; il4965_mac_channel_switch()
6125 if ((le16_to_cpu(il->staging.channel) != ch)) il4965_mac_channel_switch()
6126 il->staging.flags = 0; il4965_mac_channel_switch()
6128 il_set_rxon_channel(il, channel); il4965_mac_channel_switch()
6129 il_set_rxon_ht(il, ht_conf); il4965_mac_channel_switch()
6130 il_set_flags_for_band(il, channel->band, il->vif); il4965_mac_channel_switch()
6132 spin_unlock_irq(&il->lock); il4965_mac_channel_switch()
6134 il_set_rate(il); il4965_mac_channel_switch()
6139 set_bit(S_CHANNEL_SWITCH_PENDING, &il->status); il4965_mac_channel_switch()
6140 il->switch_channel = cpu_to_le16(ch); il4965_mac_channel_switch()
6141 if (il->ops->set_channel_switch(il, ch_switch)) { il4965_mac_channel_switch()
6142 clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status); il4965_mac_channel_switch()
6143 il->switch_channel = 0; il4965_mac_channel_switch()
6144 ieee80211_chswitch_done(il->vif, false); il4965_mac_channel_switch()
6148 mutex_unlock(&il->mutex); il4965_mac_channel_switch()
6156 struct il_priv *il = hw->priv; il4965_configure_filter() local
6176 mutex_lock(&il->mutex); il4965_configure_filter()
6178 il->staging.filter_flags &= ~filter_nand; il4965_configure_filter()
6179 il->staging.filter_flags |= filter_or; il4965_configure_filter()
6186 mutex_unlock(&il->mutex); il4965_configure_filter()
6208 struct il_priv *il = container_of(work, struct il_priv, il4965_bg_txpower_work() local
6211 mutex_lock(&il->mutex); il4965_bg_txpower_work()
6217 if (test_bit(S_EXIT_PENDING, &il->status) || il4965_bg_txpower_work()
6218 test_bit(S_SCANNING, &il->status)) il4965_bg_txpower_work()
6224 il->ops->send_tx_power(il); il4965_bg_txpower_work()
6228 il->last_temperature = il->temperature; il4965_bg_txpower_work()
6230 mutex_unlock(&il->mutex); il4965_bg_txpower_work()
6234 il4965_setup_deferred_work(struct il_priv *il) il4965_setup_deferred_work() argument
6236 il->workqueue = create_singlethread_workqueue(DRV_NAME); il4965_setup_deferred_work()
6238 init_waitqueue_head(&il->wait_command_queue); il4965_setup_deferred_work()
6240 INIT_WORK(&il->restart, il4965_bg_restart); il4965_setup_deferred_work()
6241 INIT_WORK(&il->rx_replenish, il4965_bg_rx_replenish); il4965_setup_deferred_work()
6242 INIT_WORK(&il->run_time_calib_work, il4965_bg_run_time_calib_work); il4965_setup_deferred_work()
6243 INIT_DELAYED_WORK(&il->init_alive_start, il4965_bg_init_alive_start); il4965_setup_deferred_work()
6244 INIT_DELAYED_WORK(&il->alive_start, il4965_bg_alive_start); il4965_setup_deferred_work()
6246 il_setup_scan_deferred_work(il); il4965_setup_deferred_work()
6248 INIT_WORK(&il->txpower_work, il4965_bg_txpower_work); il4965_setup_deferred_work()
6250 setup_timer(&il->stats_periodic, il4965_bg_stats_periodic, il4965_setup_deferred_work()
6251 (unsigned long)il); il4965_setup_deferred_work()
6253 setup_timer(&il->watchdog, il_bg_watchdog, (unsigned long)il); il4965_setup_deferred_work()
6255 tasklet_init(&il->irq_tasklet, il4965_setup_deferred_work()
6257 (unsigned long)il); il4965_setup_deferred_work()
6261 il4965_cancel_deferred_work(struct il_priv *il) il4965_cancel_deferred_work() argument
6263 cancel_work_sync(&il->txpower_work); il4965_cancel_deferred_work()
6264 cancel_delayed_work_sync(&il->init_alive_start); il4965_cancel_deferred_work()
6265 cancel_delayed_work(&il->alive_start); il4965_cancel_deferred_work()
6266 cancel_work_sync(&il->run_time_calib_work); il4965_cancel_deferred_work()
6268 il_cancel_scan_deferred_work(il); il4965_cancel_deferred_work()
6270 del_timer_sync(&il->stats_periodic); il4965_cancel_deferred_work()
6274 il4965_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) il4965_init_hw_rates() argument
6295 * Acquire il->lock before calling this function !
6298 il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx) il4965_set_wr_ptrs() argument
6300 il_wr(il, HBUS_TARG_WRPTR, (idx & 0xff) | (txq_id << 8)); il4965_set_wr_ptrs()
6301 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx); il4965_set_wr_ptrs()
6305 il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq, il4965_tx_queue_set_status() argument
6311 int active = test_bit(txq_id, &il->txq_ctx_active_msk) ? 1 : 0; il4965_tx_queue_set_status()
6314 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id), il4965_tx_queue_set_status()
6351 il4965_init_drv(struct il_priv *il) il4965_init_drv() argument
6355 spin_lock_init(&il->sta_lock); il4965_init_drv()
6356 spin_lock_init(&il->hcmd_lock); il4965_init_drv()
6358 INIT_LIST_HEAD(&il->free_frames); il4965_init_drv()
6360 mutex_init(&il->mutex); il4965_init_drv()
6362 il->ieee_channels = NULL; il4965_init_drv()
6363 il->ieee_rates = NULL; il4965_init_drv()
6364 il->band = IEEE80211_BAND_2GHZ; il4965_init_drv()
6366 il->iw_mode = NL80211_IFTYPE_STATION; il4965_init_drv()
6367 il->current_ht_config.smps = IEEE80211_SMPS_STATIC; il4965_init_drv()
6368 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; il4965_init_drv()
6371 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD; il4965_init_drv()
6374 if (il->ops->set_rxon_chain) il4965_init_drv()
6375 il->ops->set_rxon_chain(il); il4965_init_drv()
6377 il_init_scan_params(il); il4965_init_drv()
6379 ret = il_init_channel_map(il); il4965_init_drv()
6385 ret = il_init_geos(il); il4965_init_drv()
6390 il4965_init_hw_rates(il, il->ieee_rates); il4965_init_drv()
6395 il_free_channel_map(il); il4965_init_drv()
6401 il4965_uninit_drv(struct il_priv *il) il4965_uninit_drv() argument
6403 il_free_geos(il); il4965_uninit_drv()
6404 il_free_channel_map(il); il4965_uninit_drv()
6405 kfree(il->scan_cmd); il4965_uninit_drv()
6409 il4965_hw_detect(struct il_priv *il) il4965_hw_detect() argument
6411 il->hw_rev = _il_rd(il, CSR_HW_REV); il4965_hw_detect()
6412 il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG); il4965_hw_detect()
6413 il->rev_id = il->pci_dev->revision; il4965_hw_detect()
6414 D_INFO("HW Revision ID = 0x%X\n", il->rev_id); il4965_hw_detect()
6445 il4965_set_hw_params(struct il_priv *il) il4965_set_hw_params() argument
6447 il->hw_params.bcast_id = IL4965_BROADCAST_ID; il4965_set_hw_params()
6448 il->hw_params.max_rxq_size = RX_QUEUE_SIZE; il4965_set_hw_params()
6449 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; il4965_set_hw_params()
6450 if (il->cfg->mod_params->amsdu_size_8K) il4965_set_hw_params()
6451 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_8K); il4965_set_hw_params()
6453 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_4K); il4965_set_hw_params()
6455 il->hw_params.max_beacon_itrvl = IL_MAX_UCODE_BEACON_INTERVAL; il4965_set_hw_params()
6457 if (il->cfg->mod_params->disable_11n) il4965_set_hw_params()
6458 il->cfg->sku &= ~IL_SKU_N; il4965_set_hw_params()
6460 if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES && il4965_set_hw_params()
6461 il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES) il4965_set_hw_params()
6462 il->cfg->num_of_queues = il4965_set_hw_params()
6463 il->cfg->mod_params->num_of_queues; il4965_set_hw_params()
6465 il->hw_params.max_txq_num = il->cfg->num_of_queues; il4965_set_hw_params()
6466 il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; il4965_set_hw_params()
6467 il->hw_params.scd_bc_tbls_size = il4965_set_hw_params()
6468 il->cfg->num_of_queues * il4965_set_hw_params()
6471 il->hw_params.tfd_size = sizeof(struct il_tfd); il4965_set_hw_params()
6472 il->hw_params.max_stations = IL4965_STATION_COUNT; il4965_set_hw_params()
6473 il->hw_params.max_data_size = IL49_RTC_DATA_SIZE; il4965_set_hw_params()
6474 il->hw_params.max_inst_size = IL49_RTC_INST_SIZE; il4965_set_hw_params()
6475 il->hw_params.max_bsm_size = BSM_SRAM_SIZE; il4965_set_hw_params()
6476 il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ); il4965_set_hw_params()
6478 il->hw_params.rx_wrt_ptr_reg = FH49_RSCSR_CHNL0_WPTR; il4965_set_hw_params()
6480 il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant); il4965_set_hw_params()
6481 il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant); il4965_set_hw_params()
6482 il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant; il4965_set_hw_params()
6483 il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant; il4965_set_hw_params()
6485 il->hw_params.ct_kill_threshold = il4965_set_hw_params()
6488 il->hw_params.sens = &il4965_sensitivity; il4965_set_hw_params()
6489 il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS; il4965_set_hw_params()
6496 struct il_priv *il; il4965_pci_probe() local
6511 il = hw->priv; il4965_pci_probe()
6512 il->hw = hw; il4965_pci_probe()
6516 il->cfg = cfg; il4965_pci_probe()
6517 il->ops = &il4965_ops; il4965_pci_probe()
6519 il->debugfs_ops = &il4965_debugfs_ops; il4965_pci_probe()
6521 il->pci_dev = pdev; il4965_pci_probe()
6522 il->inta_mask = CSR_INI_SET_MASK; il4965_pci_probe()
6557 pci_set_drvdata(pdev, il); il4965_pci_probe()
6562 il->hw_base = pci_ioremap_bar(pdev, 0); il4965_pci_probe()
6563 if (!il->hw_base) { il4965_pci_probe()
6570 D_INFO("pci_resource_base = %p\n", il->hw_base); il4965_pci_probe()
6575 spin_lock_init(&il->reg_lock); il4965_pci_probe()
6576 spin_lock_init(&il->lock); il4965_pci_probe()
6583 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); il4965_pci_probe()
6585 il4965_hw_detect(il); il4965_pci_probe()
6586 IL_INFO("Detected %s, REV=0x%X\n", il->cfg->name, il->hw_rev); il4965_pci_probe()
6592 il4965_prepare_card_hw(il); il4965_pci_probe()
6593 if (!il->hw_ready) { il4965_pci_probe()
6603 err = il_eeprom_init(il); il4965_pci_probe()
6608 err = il4965_eeprom_check_version(il); il4965_pci_probe()
6613 il4965_eeprom_get_mac(il, il->addresses[0].addr); il4965_pci_probe()
6614 D_INFO("MAC address: %pM\n", il->addresses[0].addr); il4965_pci_probe()
6615 il->hw->wiphy->addresses = il->addresses; il4965_pci_probe()
6616 il->hw->wiphy->n_addresses = 1; il4965_pci_probe()
6621 il4965_set_hw_params(il); il4965_pci_probe()
6624 * 6. Setup il il4965_pci_probe()
6627 err = il4965_init_drv(il); il4965_pci_probe()
6630 /* At this point both hw and il are initialized. */ il4965_pci_probe()
6635 spin_lock_irqsave(&il->lock, flags); il4965_pci_probe()
6636 il_disable_interrupts(il); il4965_pci_probe()
6637 spin_unlock_irqrestore(&il->lock, flags); il4965_pci_probe()
6639 pci_enable_msi(il->pci_dev); il4965_pci_probe()
6641 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); il4965_pci_probe()
6643 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); il4965_pci_probe()
6647 il4965_setup_deferred_work(il); il4965_pci_probe()
6648 il4965_setup_handlers(il); il4965_pci_probe()
6655 pci_read_config_word(il->pci_dev, PCI_COMMAND, &pci_cmd); il4965_pci_probe()
6658 pci_write_config_word(il->pci_dev, PCI_COMMAND, pci_cmd); il4965_pci_probe()
6661 il_enable_rfkill_int(il); il4965_pci_probe()
6664 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) il4965_pci_probe()
6665 clear_bit(S_RFKILL, &il->status); il4965_pci_probe()
6667 set_bit(S_RFKILL, &il->status); il4965_pci_probe()
6669 wiphy_rfkill_set_hw_state(il->hw->wiphy, il4965_pci_probe()
6670 test_bit(S_RFKILL, &il->status)); il4965_pci_probe()
6672 il_power_initialize(il); il4965_pci_probe()
6674 init_completion(&il->_4965.firmware_loading_complete); il4965_pci_probe()
6676 err = il4965_request_firmware(il, true); il4965_pci_probe()
6683 destroy_workqueue(il->workqueue); il4965_pci_probe()
6684 il->workqueue = NULL; il4965_pci_probe()
6685 free_irq(il->pci_dev->irq, il); il4965_pci_probe()
6687 pci_disable_msi(il->pci_dev); il4965_pci_probe()
6688 il4965_uninit_drv(il); il4965_pci_probe()
6690 il_eeprom_free(il); il4965_pci_probe()
6692 iounmap(il->hw_base); il4965_pci_probe()
6698 ieee80211_free_hw(il->hw); il4965_pci_probe()
6706 struct il_priv *il = pci_get_drvdata(pdev); il4965_pci_remove() local
6709 if (!il) il4965_pci_remove()
6712 wait_for_completion(&il->_4965.firmware_loading_complete); il4965_pci_remove()
6716 il_dbgfs_unregister(il); il4965_pci_remove()
6723 set_bit(S_EXIT_PENDING, &il->status); il4965_pci_remove()
6725 il_leds_exit(il); il4965_pci_remove()
6727 if (il->mac80211_registered) { il4965_pci_remove()
6728 ieee80211_unregister_hw(il->hw); il4965_pci_remove()
6729 il->mac80211_registered = 0; il4965_pci_remove()
6731 il4965_down(il); il4965_pci_remove()
6741 il_apm_stop(il); il4965_pci_remove()
6746 spin_lock_irqsave(&il->lock, flags); il4965_pci_remove()
6747 il_disable_interrupts(il); il4965_pci_remove()
6748 spin_unlock_irqrestore(&il->lock, flags); il4965_pci_remove()
6750 il4965_synchronize_irq(il); il4965_pci_remove()
6752 il4965_dealloc_ucode_pci(il); il4965_pci_remove()
6754 if (il->rxq.bd) il4965_pci_remove()
6755 il4965_rx_queue_free(il, &il->rxq); il4965_pci_remove()
6756 il4965_hw_txq_ctx_free(il); il4965_pci_remove()
6758 il_eeprom_free(il); il4965_pci_remove()
6761 flush_workqueue(il->workqueue); il4965_pci_remove()
6764 * il->workqueue... so we can't take down the workqueue il4965_pci_remove()
6766 destroy_workqueue(il->workqueue); il4965_pci_remove()
6767 il->workqueue = NULL; il4965_pci_remove()
6769 free_irq(il->pci_dev->irq, il); il4965_pci_remove()
6770 pci_disable_msi(il->pci_dev); il4965_pci_remove()
6771 iounmap(il->hw_base); il4965_pci_remove()
6775 il4965_uninit_drv(il); il4965_pci_remove()
6777 dev_kfree_skb(il->beacon_skb); il4965_pci_remove()
6779 ieee80211_free_hw(il->hw); il4965_pci_remove()
6784 * must be called under il->lock and mac access
6787 il4965_txq_set_sched(struct il_priv *il, u32 mask) il4965_txq_set_sched() argument
6789 il_wr_prph(il, IL49_SCD_TXFACT, mask); il4965_txq_set_sched()
|
| H A D | common.c | 45 _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout) _il_poll_bit() argument
51 if ((_il_rd(il, addr) & mask) == (bits & mask)) _il_poll_bit()
84 _il_grab_nic_access(struct il_priv *il) _il_grab_nic_access() argument
90 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); _il_grab_nic_access()
110 _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, _il_grab_nic_access()
114 val = _il_rd(il, CSR_GP_CNTRL); _il_grab_nic_access()
117 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); _il_grab_nic_access()
126 il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout) il_poll_bit() argument
132 if ((il_rd(il, addr) & mask) == mask) il_poll_bit()
143 il_rd_prph(struct il_priv *il, u32 reg) il_rd_prph() argument
148 spin_lock_irqsave(&il->reg_lock, reg_flags); il_rd_prph()
149 _il_grab_nic_access(il); il_rd_prph()
150 val = _il_rd_prph(il, reg); il_rd_prph()
151 _il_release_nic_access(il); il_rd_prph()
152 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_rd_prph()
158 il_wr_prph(struct il_priv *il, u32 addr, u32 val) il_wr_prph() argument
162 spin_lock_irqsave(&il->reg_lock, reg_flags); il_wr_prph()
163 if (likely(_il_grab_nic_access(il))) { il_wr_prph()
164 _il_wr_prph(il, addr, val); il_wr_prph()
165 _il_release_nic_access(il); il_wr_prph()
167 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_wr_prph()
172 il_read_targ_mem(struct il_priv *il, u32 addr) il_read_targ_mem() argument
177 spin_lock_irqsave(&il->reg_lock, reg_flags); il_read_targ_mem()
178 _il_grab_nic_access(il); il_read_targ_mem()
180 _il_wr(il, HBUS_TARG_MEM_RADDR, addr); il_read_targ_mem()
181 value = _il_rd(il, HBUS_TARG_MEM_RDAT); il_read_targ_mem()
183 _il_release_nic_access(il); il_read_targ_mem()
184 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_read_targ_mem()
190 il_write_targ_mem(struct il_priv *il, u32 addr, u32 val) il_write_targ_mem() argument
194 spin_lock_irqsave(&il->reg_lock, reg_flags); il_write_targ_mem()
195 if (likely(_il_grab_nic_access(il))) { il_write_targ_mem()
196 _il_wr(il, HBUS_TARG_MEM_WADDR, addr); il_write_targ_mem()
197 _il_wr(il, HBUS_TARG_MEM_WDAT, val); il_write_targ_mem()
198 _il_release_nic_access(il); il_write_targ_mem()
200 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_write_targ_mem()
259 il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd, il_generic_cmd_callback() argument
282 il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd) il_send_cmd_async() argument
295 if (test_bit(S_EXIT_PENDING, &il->status)) il_send_cmd_async()
298 ret = il_enqueue_hcmd(il, cmd); il_send_cmd_async()
308 il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd) il_send_cmd_sync() argument
313 lockdep_assert_held(&il->mutex); il_send_cmd_sync()
323 set_bit(S_HCMD_ACTIVE, &il->status); il_send_cmd_sync()
327 cmd_idx = il_enqueue_hcmd(il, cmd); il_send_cmd_sync()
335 ret = wait_event_timeout(il->wait_command_queue, il_send_cmd_sync()
336 !test_bit(S_HCMD_ACTIVE, &il->status), il_send_cmd_sync()
339 if (test_bit(S_HCMD_ACTIVE, &il->status)) { il_send_cmd_sync()
344 clear_bit(S_HCMD_ACTIVE, &il->status); il_send_cmd_sync()
352 if (test_bit(S_RFKILL, &il->status)) { il_send_cmd_sync()
358 if (test_bit(S_FW_ERROR, &il->status)) { il_send_cmd_sync()
382 il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB; il_send_cmd_sync()
386 il_free_pages(il, cmd->reply_page); il_send_cmd_sync()
395 il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd) il_send_cmd() argument
398 return il_send_cmd_async(il, cmd); il_send_cmd()
400 return il_send_cmd_sync(il, cmd); il_send_cmd()
405 il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data) il_send_cmd_pdu() argument
413 return il_send_cmd_sync(il, &cmd); il_send_cmd_pdu()
418 il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data, il_send_cmd_pdu_async() argument
419 void (*callback) (struct il_priv *il, il_send_cmd_pdu_async()
432 return il_send_cmd_async(il, &cmd); il_send_cmd_pdu_async()
480 il_blink_compensation(struct il_priv *il, u8 time, u16 compensation) il_blink_compensation() argument
493 il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off) il_led_cmd() argument
501 if (!test_bit(S_READY, &il->status)) il_led_cmd()
504 if (il->blink_on == on && il->blink_off == off) il_led_cmd()
513 il->cfg->led_compensation); il_led_cmd()
515 il_blink_compensation(il, on, il_led_cmd()
516 il->cfg->led_compensation); il_led_cmd()
518 il_blink_compensation(il, off, il_led_cmd()
519 il->cfg->led_compensation); il_led_cmd()
521 ret = il->ops->send_led_cmd(il, &led_cmd); il_led_cmd()
523 il->blink_on = on; il_led_cmd()
524 il->blink_off = off; il_led_cmd()
533 struct il_priv *il = container_of(led_cdev, struct il_priv, led); il_led_brightness_set() local
539 il_led_cmd(il, on, 0); il_led_brightness_set()
546 struct il_priv *il = container_of(led_cdev, struct il_priv, led); il_led_blink_set() local
548 return il_led_cmd(il, *delay_on, *delay_off); il_led_blink_set()
552 il_leds_init(struct il_priv *il) il_leds_init() argument
558 mode = il->cfg->led_mode; il_leds_init()
560 il->led.name = il_leds_init()
561 kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy)); il_leds_init()
562 il->led.brightness_set = il_led_brightness_set; il_leds_init()
563 il->led.blink_set = il_led_blink_set; il_leds_init()
564 il->led.max_brightness = 1; il_leds_init()
571 il->led.default_trigger = il_leds_init()
572 ieee80211_create_tpt_led_trigger(il->hw, il_leds_init()
578 il->led.default_trigger = ieee80211_get_radio_led_name(il->hw); il_leds_init()
582 ret = led_classdev_register(&il->pci_dev->dev, &il->led); il_leds_init()
584 kfree(il->led.name); il_leds_init()
588 il->led_registered = true; il_leds_init()
593 il_leds_exit(struct il_priv *il) il_leds_exit() argument
595 if (!il->led_registered) il_leds_exit()
598 led_classdev_unregister(&il->led); il_leds_exit()
599 kfree(il->led.name); il_leds_exit()
615 * information into il->channel_info_24/52 and il->channel_map_24/52
671 il_eeprom_verify_signature(struct il_priv *il) il_eeprom_verify_signature() argument
673 u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK; il_eeprom_verify_signature()
690 il_eeprom_query_addr(const struct il_priv *il, size_t offset) il_eeprom_query_addr() argument
692 BUG_ON(offset >= il->cfg->eeprom_size); il_eeprom_query_addr()
693 return &il->eeprom[offset]; il_eeprom_query_addr()
698 il_eeprom_query16(const struct il_priv *il, size_t offset) il_eeprom_query16() argument
700 if (!il->eeprom) il_eeprom_query16()
702 return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8); il_eeprom_query16()
709 * Load the EEPROM contents from adapter into il->eeprom
714 il_eeprom_init(struct il_priv *il) il_eeprom_init() argument
717 u32 gp = _il_rd(il, CSR_EEPROM_GP); il_eeprom_init()
723 sz = il->cfg->eeprom_size; il_eeprom_init()
725 il->eeprom = kzalloc(sz, GFP_KERNEL); il_eeprom_init()
726 if (!il->eeprom) { il_eeprom_init()
730 e = (__le16 *) il->eeprom; il_eeprom_init()
732 il->ops->apm_init(il); il_eeprom_init()
734 ret = il_eeprom_verify_signature(il); il_eeprom_init()
742 ret = il->ops->eeprom_acquire_semaphore(il); il_eeprom_init()
753 _il_wr(il, CSR_EEPROM_REG, il_eeprom_init()
757 _il_poll_bit(il, CSR_EEPROM_REG, il_eeprom_init()
765 r = _il_rd(il, CSR_EEPROM_REG); il_eeprom_init()
770 il_eeprom_query16(il, EEPROM_VERSION)); il_eeprom_init()
774 il->ops->eeprom_release_semaphore(il); il_eeprom_init()
778 il_eeprom_free(il); il_eeprom_init()
780 il_apm_stop(il); il_eeprom_init()
787 il_eeprom_free(struct il_priv *il) il_eeprom_free() argument
789 kfree(il->eeprom); il_eeprom_free()
790 il->eeprom = NULL; il_eeprom_free()
795 il_init_band_reference(const struct il_priv *il, int eep_band, il_init_band_reference() argument
800 u32 offset = il->cfg->regulatory_bands[eep_band - 1]; il_init_band_reference()
806 (struct il_eeprom_channel *)il_eeprom_query_addr(il, il_init_band_reference()
813 (struct il_eeprom_channel *)il_eeprom_query_addr(il, il_init_band_reference()
820 (struct il_eeprom_channel *)il_eeprom_query_addr(il, il_init_band_reference()
827 (struct il_eeprom_channel *)il_eeprom_query_addr(il, il_init_band_reference()
834 (struct il_eeprom_channel *)il_eeprom_query_addr(il, il_init_band_reference()
841 (struct il_eeprom_channel *)il_eeprom_query_addr(il, il_init_band_reference()
848 (struct il_eeprom_channel *)il_eeprom_query_addr(il, il_init_band_reference()
860 * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
865 il_mod_ht40_chan_info(struct il_priv *il, enum ieee80211_band band, u16 channel, il_mod_ht40_chan_info() argument
872 (struct il_channel_info *)il_get_channel_info(il, band, channel); il_mod_ht40_chan_info()
904 il_init_channel_map(struct il_priv *il) il_init_channel_map() argument
912 if (il->channel_count) { il_init_channel_map()
919 il->channel_count = il_init_channel_map()
924 D_EEPROM("Parsing data for %d channels.\n", il->channel_count); il_init_channel_map()
926 il->channel_info = il_init_channel_map()
927 kzalloc(sizeof(struct il_channel_info) * il->channel_count, il_init_channel_map()
929 if (!il->channel_info) { il_init_channel_map()
931 il->channel_count = 0; il_init_channel_map()
935 ch_info = il->channel_info; il_init_channel_map()
942 il_init_band_reference(il, band, &eeprom_ch_count, il_init_channel_map()
1002 if (il->cfg->regulatory_bands[5] == EEPROM_REGULATORY_BAND_NO_HT40 && il_init_channel_map()
1003 il->cfg->regulatory_bands[6] == EEPROM_REGULATORY_BAND_NO_HT40) il_init_channel_map()
1010 il_init_band_reference(il, band, &eeprom_ch_count, il_init_channel_map()
1020 il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch], il_init_channel_map()
1025 il_mod_ht40_chan_info(il, ieeeband, il_init_channel_map()
1040 il_free_channel_map(struct il_priv *il) il_free_channel_map() argument
1042 kfree(il->channel_info); il_free_channel_map()
1043 il->channel_count = 0; il_free_channel_map()
1053 il_get_channel_info(const struct il_priv *il, enum ieee80211_band band, il_get_channel_info() argument
1060 for (i = 14; i < il->channel_count; i++) { il_get_channel_info()
1061 if (il->channel_info[i].channel == channel) il_get_channel_info()
1062 return &il->channel_info[i]; il_get_channel_info()
1067 return &il->channel_info[channel - 1]; il_get_channel_info()
1093 il_build_powertable_cmd(struct il_priv *il, struct il_powertable_cmd *cmd) il_build_powertable_cmd() argument
1106 if (il->power_data.pci_pm) il_build_powertable_cmd()
1110 if (il->power_data.ps_disabled) il_build_powertable_cmd()
1120 dtim_period = il->vif ? il->vif->bss_conf.dtim_period : 0; il_build_powertable_cmd()
1160 il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd) il_set_power() argument
1173 return il_send_cmd_pdu(il, C_POWER_TBL, il_set_power()
1178 il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force) il_power_set_mode() argument
1183 lockdep_assert_held(&il->mutex); il_power_set_mode()
1186 update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE || il_power_set_mode()
1187 il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE; il_power_set_mode()
1189 if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force) il_power_set_mode()
1192 if (!il_is_ready_rf(il)) il_power_set_mode()
1196 memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd)); il_power_set_mode()
1197 if (test_bit(S_SCANNING, &il->status) && !force) { il_power_set_mode()
1203 set_bit(S_POWER_PMI, &il->status); il_power_set_mode()
1205 ret = il_set_power(il, cmd); il_power_set_mode()
1208 clear_bit(S_POWER_PMI, &il->status); il_power_set_mode()
1210 if (il->ops->update_chain_flags && update_chains) il_power_set_mode()
1211 il->ops->update_chain_flags(il); il_power_set_mode()
1212 else if (il->ops->update_chain_flags) il_power_set_mode()
1215 il->chain_noise_data.state); il_power_set_mode()
1217 memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)); il_power_set_mode()
1225 il_power_update_mode(struct il_priv *il, bool force) il_power_update_mode() argument
1229 il_build_powertable_cmd(il, &cmd); il_power_update_mode()
1231 return il_power_set_mode(il, &cmd, force); il_power_update_mode()
1237 il_power_initialize(struct il_priv *il) il_power_initialize() argument
1241 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); il_power_initialize()
1242 il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); il_power_initialize()
1244 il->power_data.debug_sleep_level_override = -1; il_power_initialize()
1246 memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd)); il_power_initialize()
1268 il_send_scan_abort(struct il_priv *il) il_send_scan_abort() argument
1280 if (!test_bit(S_READY, &il->status) || il_send_scan_abort()
1281 !test_bit(S_GEO_CONFIGURED, &il->status) || il_send_scan_abort()
1282 !test_bit(S_SCAN_HW, &il->status) || il_send_scan_abort()
1283 test_bit(S_FW_ERROR, &il->status) || il_send_scan_abort()
1284 test_bit(S_EXIT_PENDING, &il->status)) il_send_scan_abort()
1287 ret = il_send_cmd_sync(il, &cmd); il_send_scan_abort()
1303 il_free_pages(il, cmd.reply_page); il_send_scan_abort()
1308 il_complete_scan(struct il_priv *il, bool aborted) il_complete_scan() argument
1311 if (il->scan_request) { il_complete_scan()
1313 ieee80211_scan_completed(il->hw, aborted); il_complete_scan()
1316 il->scan_vif = NULL; il_complete_scan()
1317 il->scan_request = NULL; il_complete_scan()
1321 il_force_scan_end(struct il_priv *il) il_force_scan_end() argument
1323 lockdep_assert_held(&il->mutex); il_force_scan_end()
1325 if (!test_bit(S_SCANNING, &il->status)) { il_force_scan_end()
1331 clear_bit(S_SCANNING, &il->status); il_force_scan_end()
1332 clear_bit(S_SCAN_HW, &il->status); il_force_scan_end()
1333 clear_bit(S_SCAN_ABORTING, &il->status); il_force_scan_end()
1334 il_complete_scan(il, true); il_force_scan_end()
1338 il_do_scan_abort(struct il_priv *il) il_do_scan_abort() argument
1342 lockdep_assert_held(&il->mutex); il_do_scan_abort()
1344 if (!test_bit(S_SCANNING, &il->status)) { il_do_scan_abort()
1349 if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) { il_do_scan_abort()
1354 ret = il_send_scan_abort(il); il_do_scan_abort()
1357 il_force_scan_end(il); il_do_scan_abort()
1366 il_scan_cancel(struct il_priv *il) il_scan_cancel() argument
1369 queue_work(il->workqueue, &il->abort_scan); il_scan_cancel()
1380 il_scan_cancel_timeout(struct il_priv *il, unsigned long ms) il_scan_cancel_timeout() argument
1384 lockdep_assert_held(&il->mutex); il_scan_cancel_timeout()
1388 il_do_scan_abort(il); il_scan_cancel_timeout()
1391 if (!test_bit(S_SCAN_HW, &il->status)) il_scan_cancel_timeout()
1396 return test_bit(S_SCAN_HW, &il->status); il_scan_cancel_timeout()
1402 il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_scan() argument
1415 il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_scan_start() argument
1420 il->scan_start_tsf = le32_to_cpu(notif->tsf_low); il_hdl_scan_start()
1429 il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_scan_results() argument
1440 le32_to_cpu(notif->tsf_low) - il->scan_start_tsf); il_hdl_scan_results()
1446 il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_scan_complete() argument
1459 clear_bit(S_SCAN_HW, &il->status); il_hdl_scan_complete()
1462 (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2", il_hdl_scan_complete()
1463 jiffies_to_msecs(jiffies - il->scan_start)); il_hdl_scan_complete()
1465 queue_work(il->workqueue, &il->scan_completed); il_hdl_scan_complete()
1469 il_setup_rx_scan_handlers(struct il_priv *il) il_setup_rx_scan_handlers() argument
1472 il->handlers[C_SCAN] = il_hdl_scan; il_setup_rx_scan_handlers()
1473 il->handlers[N_SCAN_START] = il_hdl_scan_start; il_setup_rx_scan_handlers()
1474 il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results; il_setup_rx_scan_handlers()
1475 il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete; il_setup_rx_scan_handlers()
1480 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band, il_get_active_dwell_time() argument
1493 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band, il_get_passive_dwell_time() argument
1504 if (il_is_any_associated(il)) { il_get_passive_dwell_time()
1510 value = il->vif ? il->vif->bss_conf.beacon_int : 0; il_get_passive_dwell_time()
1522 il_init_scan_params(struct il_priv *il) il_init_scan_params() argument
1524 u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1; il_init_scan_params()
1525 if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ]) il_init_scan_params()
1526 il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx; il_init_scan_params()
1527 if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ]) il_init_scan_params()
1528 il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx; il_init_scan_params()
1533 il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif) il_scan_initiate() argument
1537 lockdep_assert_held(&il->mutex); il_scan_initiate()
1539 cancel_delayed_work(&il->scan_check); il_scan_initiate()
1541 if (!il_is_ready_rf(il)) { il_scan_initiate()
1546 if (test_bit(S_SCAN_HW, &il->status)) { il_scan_initiate()
1551 if (test_bit(S_SCAN_ABORTING, &il->status)) { il_scan_initiate()
1558 set_bit(S_SCANNING, &il->status); il_scan_initiate()
1559 il->scan_start = jiffies; il_scan_initiate()
1561 ret = il->ops->request_scan(il, vif); il_scan_initiate()
1563 clear_bit(S_SCANNING, &il->status); il_scan_initiate()
1567 queue_delayed_work(il->workqueue, &il->scan_check, il_scan_initiate()
1578 struct il_priv *il = hw->priv; il_mac_hw_scan() local
1586 mutex_lock(&il->mutex); il_mac_hw_scan()
1589 if (test_bit(S_SCANNING, &il->status)) { il_mac_hw_scan()
1596 il->scan_request = req; il_mac_hw_scan()
1597 il->scan_vif = vif; il_mac_hw_scan()
1598 il->scan_band = req->channels[0]->band; il_mac_hw_scan()
1600 ret = il_scan_initiate(il, vif); il_mac_hw_scan()
1604 mutex_unlock(&il->mutex); il_mac_hw_scan()
1613 struct il_priv *il = il_bg_scan_check() local
1621 mutex_lock(&il->mutex); il_bg_scan_check()
1622 il_force_scan_end(il); il_bg_scan_check()
1623 mutex_unlock(&il->mutex); il_bg_scan_check()
1631 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame, il_fill_probe_req() argument
1678 struct il_priv *il = container_of(work, struct il_priv, abort_scan); il_bg_abort_scan() local
1684 mutex_lock(&il->mutex); il_bg_abort_scan()
1685 il_scan_cancel_timeout(il, 200); il_bg_abort_scan()
1686 mutex_unlock(&il->mutex); il_bg_abort_scan()
1692 struct il_priv *il = container_of(work, struct il_priv, scan_completed); il_bg_scan_completed() local
1697 cancel_delayed_work(&il->scan_check); il_bg_scan_completed()
1699 mutex_lock(&il->mutex); il_bg_scan_completed()
1701 aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status); il_bg_scan_completed()
1705 if (!test_and_clear_bit(S_SCANNING, &il->status)) { il_bg_scan_completed()
1710 il_complete_scan(il, aborted); il_bg_scan_completed()
1714 if (!il_is_ready_rf(il)) il_bg_scan_completed()
1721 il_power_set_mode(il, &il->power_data.sleep_cmd_next, false); il_bg_scan_completed()
1722 il_set_tx_power(il, il->tx_power_next, false); il_bg_scan_completed()
1724 il->ops->post_scan(il); il_bg_scan_completed()
1727 mutex_unlock(&il->mutex); il_bg_scan_completed()
1731 il_setup_scan_deferred_work(struct il_priv *il) il_setup_scan_deferred_work() argument
1733 INIT_WORK(&il->scan_completed, il_bg_scan_completed); il_setup_scan_deferred_work()
1734 INIT_WORK(&il->abort_scan, il_bg_abort_scan); il_setup_scan_deferred_work()
1735 INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check); il_setup_scan_deferred_work()
1740 il_cancel_scan_deferred_work(struct il_priv *il) il_cancel_scan_deferred_work() argument
1742 cancel_work_sync(&il->abort_scan); il_cancel_scan_deferred_work()
1743 cancel_work_sync(&il->scan_completed); il_cancel_scan_deferred_work()
1745 if (cancel_delayed_work_sync(&il->scan_check)) { il_cancel_scan_deferred_work()
1746 mutex_lock(&il->mutex); il_cancel_scan_deferred_work()
1747 il_force_scan_end(il); il_cancel_scan_deferred_work()
1748 mutex_unlock(&il->mutex); il_cancel_scan_deferred_work()
1753 /* il->sta_lock must be held */
1755 il_sta_ucode_activate(struct il_priv *il, u8 sta_id) il_sta_ucode_activate() argument
1758 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) il_sta_ucode_activate()
1760 sta_id, il->stations[sta_id].sta.sta.addr); il_sta_ucode_activate()
1762 if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) { il_sta_ucode_activate()
1765 il->stations[sta_id].sta.sta.addr); il_sta_ucode_activate()
1767 il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE; il_sta_ucode_activate()
1769 il->stations[sta_id].sta.sta.addr); il_sta_ucode_activate()
1774 il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta, il_process_add_sta_resp() argument
1788 spin_lock_irqsave(&il->sta_lock, flags); il_process_add_sta_resp()
1793 il_sta_ucode_activate(il, sta_id); il_process_add_sta_resp()
1813 il->stations[sta_id].sta.mode == il_process_add_sta_resp()
1815 il->stations[sta_id].sta.sta.addr); il_process_add_sta_resp()
1826 il->stations[sta_id].sta.mode == il_process_add_sta_resp()
1828 spin_unlock_irqrestore(&il->sta_lock, flags); il_process_add_sta_resp()
1834 il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd, il_add_sta_callback() argument
1839 il_process_add_sta_resp(il, addsta, pkt, false); il_add_sta_callback()
1844 il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags) il_send_add_sta() argument
1866 cmd.len = il->ops->build_addsta_hcmd(sta, data); il_send_add_sta()
1867 ret = il_send_cmd(il, &cmd); il_send_add_sta()
1874 ret = il_process_add_sta_resp(il, sta, pkt, true); il_send_add_sta()
1876 il_free_pages(il, cmd.reply_page); il_send_add_sta()
1883 il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta) il_set_ht_add_station() argument
1896 sta_flags = il->stations[idx].sta.station_flags; il_set_ht_add_station()
1922 if (il_is_ht40_tx_allowed(il, &sta->ht_cap)) il_set_ht_add_station()
1927 il->stations[idx].sta.station_flags = sta_flags; il_set_ht_add_station()
1938 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap, il_prep_station() argument
1949 sta_id = il->hw_params.bcast_id; il_prep_station()
1951 for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) { il_prep_station()
1952 if (ether_addr_equal(il->stations[i].sta.sta.addr, il_prep_station()
1958 if (!il->stations[i].used && il_prep_station()
1975 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) { il_prep_station()
1980 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) && il_prep_station()
1981 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) && il_prep_station()
1982 ether_addr_equal(il->stations[sta_id].sta.sta.addr, addr)) { il_prep_station()
1988 station = &il->stations[sta_id]; il_prep_station()
1991 il->num_stations++; il_prep_station()
2005 il_set_ht_add_station(il, sta_id, sta); il_prep_station()
2008 rate = (il->band == IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP; il_prep_station()
2023 il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap, il_add_station_common() argument
2032 spin_lock_irqsave(&il->sta_lock, flags_spin); il_add_station_common()
2033 sta_id = il_prep_station(il, addr, is_ap, sta); il_add_station_common()
2036 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_add_station_common()
2045 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) { il_add_station_common()
2047 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_add_station_common()
2051 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) && il_add_station_common()
2052 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) { il_add_station_common()
2055 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_add_station_common()
2059 il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS; il_add_station_common()
2060 memcpy(&sta_cmd, &il->stations[sta_id].sta, il_add_station_common()
2062 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_add_station_common()
2065 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC); il_add_station_common()
2067 spin_lock_irqsave(&il->sta_lock, flags_spin); il_add_station_common()
2069 il->stations[sta_id].sta.sta.addr); il_add_station_common()
2070 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE; il_add_station_common()
2071 il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS; il_add_station_common()
2072 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_add_station_common()
2082 * il->sta_lock must be held
2085 il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id) il_sta_ucode_deactivate() argument
2088 if ((il->stations[sta_id]. il_sta_ucode_deactivate()
2093 il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE; il_sta_ucode_deactivate()
2095 memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry)); il_sta_ucode_deactivate()
2100 il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id, il_send_remove_station() argument
2122 ret = il_send_cmd(il, &cmd); il_send_remove_station()
2137 spin_lock_irqsave(&il->sta_lock, flags_spin); il_send_remove_station()
2138 il_sta_ucode_deactivate(il, sta_id); il_send_remove_station()
2139 spin_unlock_irqrestore(&il->sta_lock, il_send_remove_station()
2150 il_free_pages(il, cmd.reply_page); il_send_remove_station()
2159 il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr) il_remove_station() argument
2163 if (!il_is_ready(il)) { il_remove_station()
2179 spin_lock_irqsave(&il->sta_lock, flags); il_remove_station()
2181 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) { il_remove_station()
2186 if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) { il_remove_station()
2191 if (il->stations[sta_id].used & IL_STA_LOCAL) { il_remove_station()
2192 kfree(il->stations[sta_id].lq); il_remove_station()
2193 il->stations[sta_id].lq = NULL; il_remove_station()
2196 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE; il_remove_station()
2198 il->num_stations--; il_remove_station()
2200 BUG_ON(il->num_stations < 0); il_remove_station()
2202 spin_unlock_irqrestore(&il->sta_lock, flags); il_remove_station()
2204 return il_send_remove_station(il, addr, sta_id, false); il_remove_station()
2206 spin_unlock_irqrestore(&il->sta_lock, flags); il_remove_station()
2220 il_clear_ucode_stations(struct il_priv *il) il_clear_ucode_stations() argument
2228 spin_lock_irqsave(&il->sta_lock, flags_spin); il_clear_ucode_stations()
2229 for (i = 0; i < il->hw_params.max_stations; i++) { il_clear_ucode_stations()
2230 if (il->stations[i].used & IL_STA_UCODE_ACTIVE) { il_clear_ucode_stations()
2232 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE; il_clear_ucode_stations()
2236 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_clear_ucode_stations()
2252 il_restore_stations(struct il_priv *il) il_restore_stations() argument
2262 if (!il_is_ready(il)) { il_restore_stations()
2268 spin_lock_irqsave(&il->sta_lock, flags_spin); il_restore_stations()
2269 for (i = 0; i < il->hw_params.max_stations; i++) { il_restore_stations()
2270 if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) && il_restore_stations()
2271 !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) { il_restore_stations()
2273 il->stations[i].sta.sta.addr); il_restore_stations()
2274 il->stations[i].sta.mode = 0; il_restore_stations()
2275 il->stations[i].used |= IL_STA_UCODE_INPROGRESS; il_restore_stations()
2280 for (i = 0; i < il->hw_params.max_stations; i++) { il_restore_stations()
2281 if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) { il_restore_stations()
2282 memcpy(&sta_cmd, &il->stations[i].sta, il_restore_stations()
2285 if (il->stations[i].lq) { il_restore_stations()
2286 memcpy(&lq, il->stations[i].lq, il_restore_stations()
2290 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_restore_stations()
2291 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC); il_restore_stations()
2293 spin_lock_irqsave(&il->sta_lock, flags_spin); il_restore_stations()
2295 il->stations[i].sta.sta.addr); il_restore_stations()
2296 il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE; il_restore_stations()
2297 il->stations[i].used &= il_restore_stations()
2299 spin_unlock_irqrestore(&il->sta_lock, il_restore_stations()
2307 il_send_lq_cmd(il, &lq, CMD_SYNC, true); il_restore_stations()
2308 spin_lock_irqsave(&il->sta_lock, flags_spin); il_restore_stations()
2309 il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS; il_restore_stations()
2313 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_restore_stations()
2323 il_get_free_ucode_key_idx(struct il_priv *il) il_get_free_ucode_key_idx() argument
2327 for (i = 0; i < il->sta_key_max_num; i++) il_get_free_ucode_key_idx()
2328 if (!test_and_set_bit(i, &il->ucode_key_table)) il_get_free_ucode_key_idx()
2336 il_dealloc_bcast_stations(struct il_priv *il) il_dealloc_bcast_stations() argument
2341 spin_lock_irqsave(&il->sta_lock, flags); il_dealloc_bcast_stations()
2342 for (i = 0; i < il->hw_params.max_stations; i++) { il_dealloc_bcast_stations()
2343 if (!(il->stations[i].used & IL_STA_BCAST)) il_dealloc_bcast_stations()
2346 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE; il_dealloc_bcast_stations()
2347 il->num_stations--; il_dealloc_bcast_stations()
2348 BUG_ON(il->num_stations < 0); il_dealloc_bcast_stations()
2349 kfree(il->stations[i].lq); il_dealloc_bcast_stations()
2350 il->stations[i].lq = NULL; il_dealloc_bcast_stations()
2352 spin_unlock_irqrestore(&il->sta_lock, flags); il_dealloc_bcast_stations()
2358 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq) il_dump_lq_cmd() argument
2370 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq) il_dump_lq_cmd() argument
2387 il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq) il_is_lq_table_valid() argument
2391 if (il->ht.enabled) il_is_lq_table_valid()
2394 D_INFO("Channel %u is not an HT channel\n", il->active.channel); il_is_lq_table_valid()
2415 il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq, il_send_lq_cmd() argument
2431 spin_lock_irqsave(&il->sta_lock, flags_spin); il_send_lq_cmd()
2432 if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) { il_send_lq_cmd()
2433 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_send_lq_cmd()
2436 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_send_lq_cmd()
2438 il_dump_lq_cmd(il, lq); il_send_lq_cmd()
2441 if (il_is_lq_table_valid(il, lq)) il_send_lq_cmd()
2442 ret = il_send_cmd(il, &cmd); il_send_lq_cmd()
2453 spin_lock_irqsave(&il->sta_lock, flags_spin); il_send_lq_cmd()
2454 il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS; il_send_lq_cmd()
2455 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il_send_lq_cmd()
2465 struct il_priv *il = hw->priv; il_mac_sta_remove() local
2469 mutex_lock(&il->mutex); il_mac_sta_remove()
2472 ret = il_remove_station(il, sta_common->sta_id, sta->addr); il_mac_sta_remove()
2477 mutex_unlock(&il->mutex); il_mac_sta_remove()
2571 il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q) il_rx_queue_update_write_ptr() argument
2574 u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg; il_rx_queue_update_write_ptr()
2583 if (test_bit(S_POWER_PMI, &il->status)) { il_rx_queue_update_write_ptr()
2584 reg = _il_rd(il, CSR_UCODE_DRV_GP1); il_rx_queue_update_write_ptr()
2589 il_set_bit(il, CSR_GP_CNTRL, il_rx_queue_update_write_ptr()
2595 il_wr(il, rx_wrt_ptr_reg, q->write_actual); il_rx_queue_update_write_ptr()
2601 il_wr(il, rx_wrt_ptr_reg, q->write_actual); il_rx_queue_update_write_ptr()
2612 il_rx_queue_alloc(struct il_priv *il) il_rx_queue_alloc() argument
2614 struct il_rx_queue *rxq = &il->rxq; il_rx_queue_alloc()
2615 struct device *dev = &il->pci_dev->dev; il_rx_queue_alloc()
2646 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, il_rx_queue_alloc()
2654 il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_spectrum_measurement() argument
2664 memcpy(&il->measure_report, report, sizeof(*report)); il_hdl_spectrum_measurement()
2665 il->measurement_status |= MEASUREMENT_READY; il_hdl_spectrum_measurement()
2673 il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr, il_set_decrypted_flag() argument
2682 if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK) il_set_decrypted_flag()
2724 il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq) il_txq_update_write_ptr() argument
2733 if (test_bit(S_POWER_PMI, &il->status)) { il_txq_update_write_ptr()
2737 reg = _il_rd(il, CSR_UCODE_DRV_GP1); il_txq_update_write_ptr()
2742 il_set_bit(il, CSR_GP_CNTRL, il_txq_update_write_ptr()
2747 il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8)); il_txq_update_write_ptr()
2755 _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8)); il_txq_update_write_ptr()
2764 il_tx_queue_unmap(struct il_priv *il, int txq_id) il_tx_queue_unmap() argument
2766 struct il_tx_queue *txq = &il->txq[txq_id]; il_tx_queue_unmap()
2773 il->ops->txq_free_tfd(il, txq); il_tx_queue_unmap()
2788 il_tx_queue_free(struct il_priv *il, int txq_id) il_tx_queue_free() argument
2790 struct il_tx_queue *txq = &il->txq[txq_id]; il_tx_queue_free()
2791 struct device *dev = &il->pci_dev->dev; il_tx_queue_free()
2794 il_tx_queue_unmap(il, txq_id); il_tx_queue_free()
2802 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd, il_tx_queue_free()
2824 il_cmd_queue_unmap(struct il_priv *il) il_cmd_queue_unmap() argument
2826 struct il_tx_queue *txq = &il->txq[il->cmd_queue]; il_cmd_queue_unmap()
2837 pci_unmap_single(il->pci_dev, il_cmd_queue_unmap()
2849 pci_unmap_single(il->pci_dev, il_cmd_queue_unmap()
2867 il_cmd_queue_free(struct il_priv *il) il_cmd_queue_free() argument
2869 struct il_tx_queue *txq = &il->txq[il->cmd_queue]; il_cmd_queue_free()
2870 struct device *dev = &il->pci_dev->dev; il_cmd_queue_free()
2873 il_cmd_queue_unmap(il); il_cmd_queue_free()
2881 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd, il_cmd_queue_free()
2941 il_queue_init(struct il_priv *il, struct il_queue *q, int slots, u32 id) il_queue_init() argument
2975 il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id) il_tx_queue_alloc() argument
2977 struct device *dev = &il->pci_dev->dev; il_tx_queue_alloc()
2978 size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX; il_tx_queue_alloc()
2982 if (id != il->cmd_queue) { il_tx_queue_alloc()
3015 il_tx_queue_init(struct il_priv *il, u32 txq_id) il_tx_queue_init() argument
3019 struct il_tx_queue *txq = &il->txq[txq_id]; il_tx_queue_init()
3029 if (txq_id == il->cmd_queue) { il_tx_queue_init()
3057 ret = il_tx_queue_alloc(il, txq, txq_id); il_tx_queue_init()
3072 il_queue_init(il, &txq->q, slots, txq_id); il_tx_queue_init()
3075 il->ops->txq_init(il, txq); il_tx_queue_init()
3090 il_tx_queue_reset(struct il_priv *il, u32 txq_id) il_tx_queue_reset() argument
3093 struct il_tx_queue *txq = &il->txq[txq_id]; il_tx_queue_reset()
3095 if (txq_id == il->cmd_queue) { il_tx_queue_reset()
3107 il_queue_init(il, &txq->q, slots, txq_id); il_tx_queue_reset()
3110 il->ops->txq_init(il, txq); il_tx_queue_reset()
3118 * @il: device ilate data point
3126 il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) il_enqueue_hcmd() argument
3128 struct il_tx_queue *txq = &il->txq[il->cmd_queue]; il_enqueue_hcmd()
3138 cmd->len = il->ops->get_hcmd_size(cmd->id, cmd->len); il_enqueue_hcmd()
3150 if (il_is_rfkill(il) || il_is_ctkill(il)) { il_enqueue_hcmd()
3152 il_is_rfkill(il) ? "RF" : "CT"); il_enqueue_hcmd()
3156 spin_lock_irqsave(&il->hcmd_lock, flags); il_enqueue_hcmd()
3159 spin_unlock_irqrestore(&il->hcmd_lock, flags); il_enqueue_hcmd()
3162 queue_work(il->workqueue, &il->restart); il_enqueue_hcmd()
3171 spin_unlock_irqrestore(&il->hcmd_lock, flags); il_enqueue_hcmd()
3190 cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr)); il_enqueue_hcmd()
3205 q->write_ptr, idx, il->cmd_queue); il_enqueue_hcmd()
3212 idx, il->cmd_queue); il_enqueue_hcmd()
3217 pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size, il_enqueue_hcmd()
3219 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) { il_enqueue_hcmd()
3228 if (il->ops->txq_update_byte_cnt_tbl) il_enqueue_hcmd()
3230 il->ops->txq_update_byte_cnt_tbl(il, txq, 0); il_enqueue_hcmd()
3232 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, 1, il_enqueue_hcmd()
3237 il_txq_update_write_ptr(il, txq); il_enqueue_hcmd()
3240 spin_unlock_irqrestore(&il->hcmd_lock, flags); il_enqueue_hcmd()
3252 il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx) il_hcmd_queue_reclaim() argument
3254 struct il_tx_queue *txq = &il->txq[txq_id]; il_hcmd_queue_reclaim()
3271 queue_work(il->workqueue, &il->restart); il_hcmd_queue_reclaim()
3286 il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb) il_tx_cmd_complete() argument
3296 struct il_tx_queue *txq = &il->txq[il->cmd_queue]; il_tx_cmd_complete()
3303 (txq_id != il->cmd_queue, il_tx_cmd_complete()
3305 txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr, il_tx_cmd_complete()
3306 il->txq[il->cmd_queue].q.write_ptr)) { il_tx_cmd_complete()
3307 il_print_hex_error(il, pkt, 32); il_tx_cmd_complete()
3317 pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping), il_tx_cmd_complete()
3325 meta->callback(il, cmd, pkt); il_tx_cmd_complete()
3327 spin_lock_irqsave(&il->hcmd_lock, flags); il_tx_cmd_complete()
3329 il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx); il_tx_cmd_complete()
3332 clear_bit(S_HCMD_ACTIVE, &il->status); il_tx_cmd_complete()
3335 wake_up(&il->wait_command_queue); il_tx_cmd_complete()
3341 spin_unlock_irqrestore(&il->hcmd_lock, flags); il_tx_cmd_complete()
3379 il_init_ht_hw_capab(const struct il_priv *il, il_init_ht_hw_capab() argument
3384 u8 rx_chains_num = il->hw_params.rx_chains_num; il_init_ht_hw_capab()
3385 u8 tx_chains_num = il->hw_params.tx_chains_num; il_init_ht_hw_capab()
3394 if (il->hw_params.ht40_channel & BIT(band)) { il_init_ht_hw_capab()
3401 if (il->cfg->mod_params->amsdu_size_8K) il_init_ht_hw_capab()
3432 il_init_geos(struct il_priv *il) il_init_geos() argument
3442 if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates || il_init_geos()
3443 il->bands[IEEE80211_BAND_5GHZ].n_bitrates) { il_init_geos()
3445 set_bit(S_GEO_CONFIGURED, &il->status); il_init_geos()
3450 kzalloc(sizeof(struct ieee80211_channel) * il->channel_count, il_init_geos()
3464 sband = &il->bands[IEEE80211_BAND_5GHZ]; il_init_geos()
3470 if (il->cfg->sku & IL_SKU_N) il_init_geos()
3471 il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_5GHZ); il_init_geos()
3473 sband = &il->bands[IEEE80211_BAND_2GHZ]; il_init_geos()
3479 if (il->cfg->sku & IL_SKU_N) il_init_geos()
3480 il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_2GHZ); il_init_geos()
3482 il->ieee_channels = channels; il_init_geos()
3483 il->ieee_rates = rates; il_init_geos()
3485 for (i = 0; i < il->channel_count; i++) { il_init_geos()
3486 ch = &il->channel_info[i]; il_init_geos()
3491 sband = &il->bands[ch->band]; il_init_geos()
3527 il->tx_power_device_lmt = max_tx_power; il_init_geos()
3528 il->tx_power_user_lmt = max_tx_power; il_init_geos()
3529 il->tx_power_next = max_tx_power; il_init_geos()
3531 if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 && il_init_geos()
3532 (il->cfg->sku & IL_SKU_A)) { il_init_geos()
3535 il->pci_dev->device, il->pci_dev->subsystem_device); il_init_geos()
3536 il->cfg->sku &= ~IL_SKU_A; il_init_geos()
3540 il->bands[IEEE80211_BAND_2GHZ].n_channels, il_init_geos()
3541 il->bands[IEEE80211_BAND_5GHZ].n_channels); il_init_geos()
3543 set_bit(S_GEO_CONFIGURED, &il->status); il_init_geos()
3553 il_free_geos(struct il_priv *il) il_free_geos() argument
3555 kfree(il->ieee_channels); il_free_geos()
3556 kfree(il->ieee_rates); il_free_geos()
3557 clear_bit(S_GEO_CONFIGURED, &il->status); il_free_geos()
3562 il_is_channel_extension(struct il_priv *il, enum ieee80211_band band, il_is_channel_extension() argument
3567 ch_info = il_get_channel_info(il, band, channel); il_is_channel_extension()
3582 il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap) il_is_ht40_tx_allowed() argument
3584 if (!il->ht.enabled || !il->ht.is_40mhz) il_is_ht40_tx_allowed()
3595 if (il->disable_ht40) il_is_ht40_tx_allowed()
3599 return il_is_channel_extension(il, il->band, il_is_ht40_tx_allowed()
3600 le16_to_cpu(il->staging.channel), il_is_ht40_tx_allowed()
3601 il->ht.extension_chan_offset); il_is_ht40_tx_allowed()
3640 il_send_rxon_timing(struct il_priv *il) il_send_rxon_timing() argument
3646 struct ieee80211_vif *vif = il->vif; il_send_rxon_timing()
3648 conf = &il->hw->conf; il_send_rxon_timing()
3650 lockdep_assert_held(&il->mutex); il_send_rxon_timing()
3652 memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd)); il_send_rxon_timing()
3654 il->timing.timestamp = cpu_to_le64(il->timestamp); il_send_rxon_timing()
3655 il->timing.listen_interval = cpu_to_le16(conf->listen_interval); il_send_rxon_timing()
3663 il->timing.atim_win = 0; il_send_rxon_timing()
3667 il->hw_params.max_beacon_itrvl * il_send_rxon_timing()
3669 il->timing.beacon_interval = cpu_to_le16(beacon_int); il_send_rxon_timing()
3671 tsf = il->timestamp; /* tsf is modifed by do_div: copy it */ il_send_rxon_timing()
3674 il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem); il_send_rxon_timing()
3676 il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1; il_send_rxon_timing()
3679 le16_to_cpu(il->timing.beacon_interval), il_send_rxon_timing()
3680 le32_to_cpu(il->timing.beacon_init_val), il_send_rxon_timing()
3681 le16_to_cpu(il->timing.atim_win)); il_send_rxon_timing()
3683 return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing), il_send_rxon_timing()
3684 &il->timing); il_send_rxon_timing()
3689 il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt) il_set_rxon_hwcrypto() argument
3691 struct il_rxon_cmd *rxon = &il->staging; il_set_rxon_hwcrypto()
3703 il_check_rxon_cmd(struct il_priv *il) il_check_rxon_cmd() argument
3705 struct il_rxon_cmd *rxon = &il->staging; il_check_rxon_cmd()
3776 * @il: staging_rxon is compared to active_rxon
3783 il_full_rxon_required(struct il_priv *il) il_full_rxon_required() argument
3785 const struct il_rxon_cmd *staging = &il->staging; il_full_rxon_required()
3786 const struct il_rxon_cmd *active = &il->active; il_full_rxon_required()
3803 CHK(!il_is_associated(il)); il_full_rxon_required()
3837 il_get_lowest_plcp(struct il_priv *il) il_get_lowest_plcp() argument
3843 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) il_get_lowest_plcp()
3851 _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf) _il_set_rxon_ht() argument
3853 struct il_rxon_cmd *rxon = &il->staging; _il_set_rxon_ht()
3855 if (!il->ht.enabled) { _il_set_rxon_ht()
3864 cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS); _il_set_rxon_ht()
3871 if (il_is_ht40_tx_allowed(il, NULL)) { _il_set_rxon_ht()
3873 if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) { _il_set_rxon_ht()
3876 switch (il->ht.extension_chan_offset) { _il_set_rxon_ht()
3887 switch (il->ht.extension_chan_offset) { _il_set_rxon_ht()
3908 if (il->ops->set_rxon_chain) _il_set_rxon_ht()
3909 il->ops->set_rxon_chain(il); _il_set_rxon_ht()
3913 il->ht.protection, il->ht.extension_chan_offset); _il_set_rxon_ht()
3917 il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf) il_set_rxon_ht() argument
3919 _il_set_rxon_ht(il, ht_conf); il_set_rxon_ht()
3925 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band) il_get_single_channel_number() argument
3934 max = il->channel_count; il_get_single_channel_number()
3941 channel = il->channel_info[i].channel; il_get_single_channel_number()
3942 if (channel == le16_to_cpu(il->staging.channel)) il_get_single_channel_number()
3945 ch_info = il_get_channel_info(il, band, channel); il_get_single_channel_number()
3962 il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch) il_set_rxon_channel() argument
3967 if (le16_to_cpu(il->staging.channel) == channel && il->band == band) il_set_rxon_channel()
3970 il->staging.channel = cpu_to_le16(channel); il_set_rxon_channel()
3972 il->staging.flags &= ~RXON_FLG_BAND_24G_MSK; il_set_rxon_channel()
3974 il->staging.flags |= RXON_FLG_BAND_24G_MSK; il_set_rxon_channel()
3976 il->band = band; il_set_rxon_channel()
3985 il_set_flags_for_band(struct il_priv *il, enum ieee80211_band band, il_set_flags_for_band() argument
3989 il->staging.flags &= il_set_flags_for_band()
3992 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; il_set_flags_for_band()
3996 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; il_set_flags_for_band()
3998 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; il_set_flags_for_band()
4000 il->staging.flags |= RXON_FLG_BAND_24G_MSK; il_set_flags_for_band()
4001 il->staging.flags |= RXON_FLG_AUTO_DETECT_MSK; il_set_flags_for_band()
4002 il->staging.flags &= ~RXON_FLG_CCK_MSK; il_set_flags_for_band()
4011 il_connection_init_rx_config(struct il_priv *il) il_connection_init_rx_config() argument
4015 memset(&il->staging, 0, sizeof(il->staging)); il_connection_init_rx_config()
4017 switch (il->iw_mode) { il_connection_init_rx_config()
4019 il->staging.dev_type = RXON_DEV_TYPE_ESS; il_connection_init_rx_config()
4022 il->staging.dev_type = RXON_DEV_TYPE_ESS; il_connection_init_rx_config()
4023 il->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; il_connection_init_rx_config()
4026 il->staging.dev_type = RXON_DEV_TYPE_IBSS; il_connection_init_rx_config()
4027 il->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK; il_connection_init_rx_config()
4028 il->staging.filter_flags = il_connection_init_rx_config()
4032 IL_ERR("Unsupported interface type %d\n", il->vif->type); il_connection_init_rx_config()
4039 if (!hw_to_local(il->hw)->short_preamble) il_connection_init_rx_config()
4040 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; il_connection_init_rx_config()
4042 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; il_connection_init_rx_config()
4046 il_get_channel_info(il, il->band, le16_to_cpu(il->active.channel)); il_connection_init_rx_config()
4049 ch_info = &il->channel_info[0]; il_connection_init_rx_config()
4051 il->staging.channel = cpu_to_le16(ch_info->channel); il_connection_init_rx_config()
4052 il->band = ch_info->band; il_connection_init_rx_config()
4054 il_set_flags_for_band(il, il->band, il->vif); il_connection_init_rx_config()
4056 il->staging.ofdm_basic_rates = il_connection_init_rx_config()
4058 il->staging.cck_basic_rates = il_connection_init_rx_config()
4062 il->staging.flags &= il_connection_init_rx_config()
4064 if (il->vif) il_connection_init_rx_config()
4065 memcpy(il->staging.node_addr, il->vif->addr, ETH_ALEN); il_connection_init_rx_config()
4067 il->staging.ofdm_ht_single_stream_basic_rates = 0xff; il_connection_init_rx_config()
4068 il->staging.ofdm_ht_dual_stream_basic_rates = 0xff; il_connection_init_rx_config()
4073 il_set_rate(struct il_priv *il) il_set_rate() argument
4079 hw = il_get_hw_mode(il, il->band); il_set_rate()
4085 il->active_rate = 0; il_set_rate()
4090 il->active_rate |= (1 << rate->hw_value); il_set_rate()
4093 D_RATE("Set active_rate = %0x\n", il->active_rate); il_set_rate()
4095 il->staging.cck_basic_rates = il_set_rate()
4098 il->staging.ofdm_basic_rates = il_set_rate()
4104 il_chswitch_done(struct il_priv *il, bool is_success) il_chswitch_done() argument
4106 if (test_bit(S_EXIT_PENDING, &il->status)) il_chswitch_done()
4109 if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status)) il_chswitch_done()
4110 ieee80211_chswitch_done(il->vif, is_success); il_chswitch_done()
4115 il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_csa() argument
4119 struct il_rxon_cmd *rxon = (void *)&il->active; il_hdl_csa()
4121 if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status)) il_hdl_csa()
4124 if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) { il_hdl_csa()
4126 il->staging.channel = csa->channel; il_hdl_csa()
4128 il_chswitch_done(il, true); il_hdl_csa()
4132 il_chswitch_done(il, false); il_hdl_csa()
4139 il_print_rx_config_cmd(struct il_priv *il) il_print_rx_config_cmd() argument
4141 struct il_rxon_cmd *rxon = &il->staging; il_print_rx_config_cmd()
4144 il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); il_print_rx_config_cmd()
4161 il_irq_handle_error(struct il_priv *il) il_irq_handle_error() argument
4164 set_bit(S_FW_ERROR, &il->status); il_irq_handle_error()
4167 clear_bit(S_HCMD_ACTIVE, &il->status); il_irq_handle_error()
4169 IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version); il_irq_handle_error()
4171 il->ops->dump_nic_error_log(il); il_irq_handle_error()
4172 if (il->ops->dump_fh) il_irq_handle_error()
4173 il->ops->dump_fh(il, NULL, false); il_irq_handle_error()
4175 if (il_get_debug_level(il) & IL_DL_FW_ERRORS) il_irq_handle_error()
4176 il_print_rx_config_cmd(il); il_irq_handle_error()
4179 wake_up(&il->wait_command_queue); il_irq_handle_error()
4183 clear_bit(S_READY, &il->status); il_irq_handle_error()
4185 if (!test_bit(S_EXIT_PENDING, &il->status)) { il_irq_handle_error()
4189 if (il->cfg->mod_params->restart_fw) il_irq_handle_error()
4190 queue_work(il->workqueue, &il->restart); il_irq_handle_error()
4196 _il_apm_stop_master(struct il_priv *il) _il_apm_stop_master() argument
4201 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); _il_apm_stop_master()
4204 _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED, _il_apm_stop_master()
4215 _il_apm_stop(struct il_priv *il) _il_apm_stop() argument
4217 lockdep_assert_held(&il->reg_lock); _il_apm_stop()
4222 _il_apm_stop_master(il); _il_apm_stop()
4225 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); _il_apm_stop()
4233 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); _il_apm_stop()
4238 il_apm_stop(struct il_priv *il) il_apm_stop() argument
4242 spin_lock_irqsave(&il->reg_lock, flags); il_apm_stop()
4243 _il_apm_stop(il); il_apm_stop()
4244 spin_unlock_irqrestore(&il->reg_lock, flags); il_apm_stop()
4254 il_apm_init(struct il_priv *il) il_apm_init() argument
4267 il_set_bit(il, CSR_GIO_CHICKEN_BITS, il_apm_init()
4274 il_set_bit(il, CSR_GIO_CHICKEN_BITS, il_apm_init()
4278 il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL); il_apm_init()
4285 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il_apm_init()
4296 if (il->cfg->set_l0s) { il_apm_init()
4297 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); il_apm_init()
4300 il_set_bit(il, CSR_GIO_REG, il_apm_init()
4305 il_clear_bit(il, CSR_GIO_REG, il_apm_init()
4312 if (il->cfg->pll_cfg_val) il_apm_init()
4313 il_set_bit(il, CSR_ANA_PLL_CFG, il_apm_init()
4314 il->cfg->pll_cfg_val); il_apm_init()
4320 il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); il_apm_init()
4328 _il_poll_bit(il, CSR_GP_CNTRL, il_apm_init()
4344 if (il->cfg->use_bsm) il_apm_init()
4345 il_wr_prph(il, APMG_CLK_EN_REG, il_apm_init()
4348 il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT); il_apm_init()
4352 il_set_bits_prph(il, APMG_PCIDEV_STT_REG, il_apm_init()
4361 il_set_tx_power(struct il_priv *il, s8 tx_power, bool force) il_set_tx_power() argument
4367 lockdep_assert_held(&il->mutex); il_set_tx_power()
4369 if (il->tx_power_user_lmt == tx_power && !force) il_set_tx_power()
4372 if (!il->ops->send_tx_power) il_set_tx_power()
4381 if (tx_power > il->tx_power_device_lmt) { il_set_tx_power()
4383 tx_power, il->tx_power_device_lmt); il_set_tx_power()
4387 if (!il_is_ready_rf(il)) il_set_tx_power()
4392 il->tx_power_next = tx_power; il_set_tx_power()
4395 defer = test_bit(S_SCANNING, &il->status) || il_set_tx_power()
4396 memcmp(&il->active, &il->staging, sizeof(il->staging)); il_set_tx_power()
4402 prev_tx_power = il->tx_power_user_lmt; il_set_tx_power()
4403 il->tx_power_user_lmt = tx_power; il_set_tx_power()
4405 ret = il->ops->send_tx_power(il); il_set_tx_power()
4409 il->tx_power_user_lmt = prev_tx_power; il_set_tx_power()
4410 il->tx_power_next = prev_tx_power; il_set_tx_power()
4417 il_send_bt_config(struct il_priv *il) il_send_bt_config() argument
4434 if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd)) il_send_bt_config()
4440 il_send_stats_request(struct il_priv *il, u8 flags, bool clear) il_send_stats_request() argument
4447 return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd), il_send_stats_request()
4450 return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd), il_send_stats_request()
4456 il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_pm_sleep() argument
4468 il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_pm_debug_stats() argument
4474 il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len); il_hdl_pm_debug_stats()
4479 il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb) il_hdl_error() argument
4494 il_clear_isr_stats(struct il_priv *il) il_clear_isr_stats() argument
4496 memset(&il->isr_stats, 0, sizeof(il->isr_stats)); il_clear_isr_stats()
4503 struct il_priv *il = hw->priv; il_mac_conf_tx() local
4509 if (!il_is_ready_rf(il)) { il_mac_conf_tx()
4521 spin_lock_irqsave(&il->lock, flags); il_mac_conf_tx()
4523 il->qos_data.def_qos_parm.ac[q].cw_min = il_mac_conf_tx()
4525 il->qos_data.def_qos_parm.ac[q].cw_max = il_mac_conf_tx()
4527 il->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; il_mac_conf_tx()
4528 il->qos_data.def_qos_parm.ac[q].edca_txop = il_mac_conf_tx()
4531 il->qos_data.def_qos_parm.ac[q].reserved1 = 0; il_mac_conf_tx()
4533 spin_unlock_irqrestore(&il->lock, flags); il_mac_conf_tx()
4543 struct il_priv *il = hw->priv; il_mac_tx_last_beacon() local
4548 ret = (il->ibss_manager == IL_IBSS_MANAGER); il_mac_tx_last_beacon()
4556 il_set_mode(struct il_priv *il) il_set_mode() argument
4558 il_connection_init_rx_config(il); il_set_mode()
4560 if (il->ops->set_rxon_chain) il_set_mode()
4561 il->ops->set_rxon_chain(il); il_set_mode()
4563 return il_commit_rxon(il); il_set_mode()
4569 struct il_priv *il = hw->priv; il_mac_add_interface() local
4573 mutex_lock(&il->mutex); il_mac_add_interface()
4576 if (!il_is_ready_rf(il)) { il_mac_add_interface()
4586 reset = (il->vif == vif); il_mac_add_interface()
4587 if (il->vif && !reset) { il_mac_add_interface()
4592 il->vif = vif; il_mac_add_interface()
4593 il->iw_mode = vif->type; il_mac_add_interface()
4595 err = il_set_mode(il); il_mac_add_interface()
4599 il->vif = NULL; il_mac_add_interface()
4600 il->iw_mode = NL80211_IFTYPE_STATION; il_mac_add_interface()
4606 mutex_unlock(&il->mutex); il_mac_add_interface()
4613 il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif) il_teardown_interface() argument
4615 lockdep_assert_held(&il->mutex); il_teardown_interface()
4617 if (il->scan_vif == vif) { il_teardown_interface()
4618 il_scan_cancel_timeout(il, 200); il_teardown_interface()
4619 il_force_scan_end(il); il_teardown_interface()
4622 il_set_mode(il); il_teardown_interface()
4628 struct il_priv *il = hw->priv; il_mac_remove_interface() local
4630 mutex_lock(&il->mutex); il_mac_remove_interface()
4633 WARN_ON(il->vif != vif); il_mac_remove_interface()
4634 il->vif = NULL; il_mac_remove_interface()
4635 il->iw_mode = NL80211_IFTYPE_UNSPECIFIED; il_mac_remove_interface()
4636 il_teardown_interface(il, vif); il_mac_remove_interface()
4637 eth_zero_addr(il->bssid); il_mac_remove_interface()
4640 mutex_unlock(&il->mutex); il_mac_remove_interface()
4645 il_alloc_txq_mem(struct il_priv *il) il_alloc_txq_mem() argument
4647 if (!il->txq) il_alloc_txq_mem()
4648 il->txq = il_alloc_txq_mem()
4650 il->cfg->num_of_queues, GFP_KERNEL); il_alloc_txq_mem()
4651 if (!il->txq) { il_alloc_txq_mem()
4660 il_free_txq_mem(struct il_priv *il) il_free_txq_mem() argument
4662 kfree(il->txq); il_free_txq_mem()
4663 il->txq = NULL; il_free_txq_mem()
4668 il_force_reset(struct il_priv *il, bool external) il_force_reset() argument
4672 if (test_bit(S_EXIT_PENDING, &il->status)) il_force_reset()
4675 force_reset = &il->force_reset; il_force_reset()
4698 if (!external && !il->cfg->mod_params->restart_fw) { il_force_reset()
4707 set_bit(S_FW_ERROR, &il->status); il_force_reset()
4708 wake_up(&il->wait_command_queue); il_force_reset()
4713 clear_bit(S_READY, &il->status); il_force_reset()
4714 queue_work(il->workqueue, &il->restart); il_force_reset()
4724 struct il_priv *il = hw->priv; il_mac_change_interface() local
4727 mutex_lock(&il->mutex); il_mac_change_interface()
4736 if (!il->vif || !il_is_ready_rf(il)) { il_mac_change_interface()
4748 il->iw_mode = newtype; il_mac_change_interface()
4749 il_teardown_interface(il, vif); il_mac_change_interface()
4754 mutex_unlock(&il->mutex); il_mac_change_interface()
4763 struct il_priv *il = hw->priv; il_mac_flush() local
4767 mutex_lock(&il->mutex); il_mac_flush()
4770 if (il->txq == NULL) il_mac_flush()
4773 for (i = 0; i < il->hw_params.max_txq_num; i++) { il_mac_flush()
4776 if (i == il->cmd_queue) il_mac_flush()
4779 q = &il->txq[i].q; il_mac_flush()
4792 mutex_unlock(&il->mutex); il_mac_flush()
4801 il_check_stuck_queue(struct il_priv *il, int cnt) il_check_stuck_queue() argument
4803 struct il_tx_queue *txq = &il->txq[cnt]; il_check_stuck_queue()
4816 msecs_to_jiffies(il->cfg->wd_timeout); il_check_stuck_queue()
4821 ret = il_force_reset(il, false); il_check_stuck_queue()
4841 struct il_priv *il = (struct il_priv *)data; il_bg_watchdog() local
4845 if (test_bit(S_EXIT_PENDING, &il->status)) il_bg_watchdog()
4848 timeout = il->cfg->wd_timeout; il_bg_watchdog()
4853 if (il_check_stuck_queue(il, il->cmd_queue)) il_bg_watchdog()
4857 for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { il_bg_watchdog()
4859 if (cnt == il->cmd_queue) il_bg_watchdog()
4861 if (il_check_stuck_queue(il, cnt)) il_bg_watchdog()
4865 mod_timer(&il->watchdog, il_bg_watchdog()
4871 il_setup_watchdog(struct il_priv *il) il_setup_watchdog() argument
4873 unsigned int timeout = il->cfg->wd_timeout; il_setup_watchdog()
4876 mod_timer(&il->watchdog, il_setup_watchdog()
4879 del_timer(&il->watchdog); il_setup_watchdog()
4890 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval) il_usecs_to_beacons() argument
4901 interval) & (il_beacon_time_mask_high(il, il_usecs_to_beacons()
4902 il->hw_params. il_usecs_to_beacons()
4903 beacon_time_tsf_bits) >> il-> il_usecs_to_beacons()
4906 (usec % interval) & il_beacon_time_mask_low(il, il_usecs_to_beacons()
4907 il->hw_params. il_usecs_to_beacons()
4910 return (quot << il->hw_params.beacon_time_tsf_bits) + rem; il_usecs_to_beacons()
4918 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon, il_add_beacon_time() argument
4921 u32 base_low = base & il_beacon_time_mask_low(il, il_add_beacon_time()
4922 il->hw_params. il_add_beacon_time()
4924 u32 addon_low = addon & il_beacon_time_mask_low(il, il_add_beacon_time()
4925 il->hw_params. il_add_beacon_time()
4928 u32 res = (base & il_beacon_time_mask_high(il, il_add_beacon_time()
4929 il->hw_params. il_add_beacon_time()
4931 (addon & il_beacon_time_mask_high(il, il_add_beacon_time()
4932 il->hw_params. il_add_beacon_time()
4939 res += (1 << il->hw_params.beacon_time_tsf_bits); il_add_beacon_time()
4941 res += (1 << il->hw_params.beacon_time_tsf_bits); il_add_beacon_time()
4953 struct il_priv *il = pci_get_drvdata(pdev); il_pci_suspend() local
4962 il_apm_stop(il); il_pci_suspend()
4971 struct il_priv *il = pci_get_drvdata(pdev); il_pci_resume() local
4980 il_enable_interrupts(il); il_pci_resume()
4982 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) il_pci_resume()
4986 set_bit(S_RFKILL, &il->status); il_pci_resume()
4988 clear_bit(S_RFKILL, &il->status); il_pci_resume()
4990 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill); il_pci_resume()
5001 il_update_qos(struct il_priv *il) il_update_qos() argument
5003 if (test_bit(S_EXIT_PENDING, &il->status)) il_update_qos()
5006 il->qos_data.def_qos_parm.qos_flags = 0; il_update_qos()
5008 if (il->qos_data.qos_active) il_update_qos()
5009 il->qos_data.def_qos_parm.qos_flags |= il_update_qos()
5012 if (il->ht.enabled) il_update_qos()
5013 il->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; il_update_qos()
5016 il->qos_data.qos_active, il->qos_data.def_qos_parm.qos_flags); il_update_qos()
5018 il_send_cmd_pdu_async(il, C_QOS_PARAM, sizeof(struct il_qosparam_cmd), il_update_qos()
5019 &il->qos_data.def_qos_parm, NULL); il_update_qos()
5028 struct il_priv *il = hw->priv; il_mac_config() local
5032 struct il_ht_config *ht_conf = &il->current_ht_config; il_mac_config()
5039 mutex_lock(&il->mutex); il_mac_config()
5043 if (unlikely(test_bit(S_SCANNING, &il->status))) { il_mac_config()
5051 il->current_ht_config.smps = conf->smps_mode; il_mac_config()
5060 if (il->ops->set_rxon_chain) il_mac_config()
5061 il->ops->set_rxon_chain(il); il_mac_config()
5073 ch_info = il_get_channel_info(il, channel->band, ch); il_mac_config()
5080 if (il->iw_mode == NL80211_IFTYPE_ADHOC && il_mac_config()
5087 spin_lock_irqsave(&il->lock, flags); il_mac_config()
5090 if (il->ht.enabled != conf_is_ht(conf)) { il_mac_config()
5091 il->ht.enabled = conf_is_ht(conf); il_mac_config()
5094 if (il->ht.enabled) { il_mac_config()
5096 il->ht.extension_chan_offset = il_mac_config()
5098 il->ht.is_40mhz = true; il_mac_config()
5100 il->ht.extension_chan_offset = il_mac_config()
5102 il->ht.is_40mhz = true; il_mac_config()
5104 il->ht.extension_chan_offset = il_mac_config()
5106 il->ht.is_40mhz = false; il_mac_config()
5109 il->ht.is_40mhz = false; il_mac_config()
5115 il->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE; il_mac_config()
5120 if ((le16_to_cpu(il->staging.channel) != ch)) il_mac_config()
5121 il->staging.flags = 0; il_mac_config()
5123 il_set_rxon_channel(il, channel); il_mac_config()
5124 il_set_rxon_ht(il, ht_conf); il_mac_config()
5126 il_set_flags_for_band(il, channel->band, il->vif); il_mac_config()
5128 spin_unlock_irqrestore(&il->lock, flags); il_mac_config()
5130 if (il->ops->update_bcast_stations) il_mac_config()
5131 ret = il->ops->update_bcast_stations(il); il_mac_config()
5137 il_set_rate(il); il_mac_config()
5141 il->power_data.ps_disabled = !(conf->flags & IEEE80211_CONF_PS); il_mac_config()
5142 ret = il_power_update_mode(il, false); il_mac_config()
5148 D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt, il_mac_config()
5151 il_set_tx_power(il, conf->power_level, false); il_mac_config()
5154 if (!il_is_ready(il)) { il_mac_config()
5162 if (memcmp(&il->active, &il->staging, sizeof(il->staging))) il_mac_config()
5163 il_commit_rxon(il); il_mac_config()
5167 il_update_qos(il); il_mac_config()
5171 mutex_unlock(&il->mutex); il_mac_config()
5180 struct il_priv *il = hw->priv; il_mac_reset_tsf() local
5183 mutex_lock(&il->mutex); il_mac_reset_tsf()
5186 spin_lock_irqsave(&il->lock, flags); il_mac_reset_tsf()
5188 memset(&il->current_ht_config, 0, sizeof(struct il_ht_config)); il_mac_reset_tsf()
5191 if (il->beacon_skb) il_mac_reset_tsf()
5192 dev_kfree_skb(il->beacon_skb); il_mac_reset_tsf()
5193 il->beacon_skb = NULL; il_mac_reset_tsf()
5194 il->timestamp = 0; il_mac_reset_tsf()
5196 spin_unlock_irqrestore(&il->lock, flags); il_mac_reset_tsf()
5198 il_scan_cancel_timeout(il, 100); il_mac_reset_tsf()
5199 if (!il_is_ready_rf(il)) { il_mac_reset_tsf()
5201 mutex_unlock(&il->mutex); il_mac_reset_tsf()
5206 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; il_mac_reset_tsf()
5207 il_commit_rxon(il); il_mac_reset_tsf()
5209 il_set_rate(il); il_mac_reset_tsf()
5212 mutex_unlock(&il->mutex); il_mac_reset_tsf()
5217 il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif) il_ht_conf() argument
5219 struct il_ht_config *ht_conf = &il->current_ht_config; il_ht_conf()
5225 if (!il->ht.enabled) il_ht_conf()
5228 il->ht.protection = il_ht_conf()
5230 il->ht.non_gf_sta_present = il_ht_conf()
5277 il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif) il_set_no_assoc() argument
5284 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; il_set_no_assoc()
5285 il->staging.assoc_id = 0; il_set_no_assoc()
5286 il_commit_rxon(il); il_set_no_assoc()
5292 struct il_priv *il = hw->priv; il_beacon_update() local
5302 lockdep_assert_held(&il->mutex); il_beacon_update()
5304 if (!il->beacon_enabled) { il_beacon_update()
5310 spin_lock_irqsave(&il->lock, flags); il_beacon_update()
5312 if (il->beacon_skb) il_beacon_update()
5313 dev_kfree_skb(il->beacon_skb); il_beacon_update()
5315 il->beacon_skb = skb; il_beacon_update()
5318 il->timestamp = le64_to_cpu(timestamp); il_beacon_update()
5321 spin_unlock_irqrestore(&il->lock, flags); il_beacon_update()
5323 if (!il_is_ready_rf(il)) { il_beacon_update()
5328 il->ops->post_associate(il); il_beacon_update()
5335 struct il_priv *il = hw->priv; il_mac_bss_info_changed() local
5338 mutex_lock(&il->mutex); il_mac_bss_info_changed()
5341 if (!il_is_alive(il)) { il_mac_bss_info_changed()
5343 mutex_unlock(&il->mutex); il_mac_bss_info_changed()
5350 spin_lock_irqsave(&il->lock, flags); il_mac_bss_info_changed()
5351 il->qos_data.qos_active = bss_conf->qos; il_mac_bss_info_changed()
5352 il_update_qos(il); il_mac_bss_info_changed()
5353 spin_unlock_irqrestore(&il->lock, flags); il_mac_bss_info_changed()
5359 il->beacon_enabled = true; il_mac_bss_info_changed()
5361 il->beacon_enabled = false; il_mac_bss_info_changed()
5376 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE); il_mac_bss_info_changed()
5383 if (il_scan_cancel_timeout(il, 100)) { il_mac_bss_info_changed()
5385 mutex_unlock(&il->mutex); il_mac_bss_info_changed()
5390 memcpy(il->staging.bssid_addr, bss_conf->bssid, ETH_ALEN); il_mac_bss_info_changed()
5393 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN); il_mac_bss_info_changed()
5407 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; il_mac_bss_info_changed()
5409 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; il_mac_bss_info_changed()
5414 if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ) il_mac_bss_info_changed()
5415 il->staging.flags |= RXON_FLG_TGG_PROTECT_MSK; il_mac_bss_info_changed()
5417 il->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK; il_mac_bss_info_changed()
5419 il->staging.flags |= RXON_FLG_SELF_CTS_EN; il_mac_bss_info_changed()
5421 il->staging.flags &= ~RXON_FLG_SELF_CTS_EN; il_mac_bss_info_changed()
5431 il->staging.ofdm_basic_rates = il_mac_bss_info_changed()
5434 il->staging.ofdm_basic_rates = il_mac_bss_info_changed()
5436 il->staging.cck_basic_rates = il_mac_bss_info_changed()
5442 il_ht_conf(il, vif); il_mac_bss_info_changed()
5444 if (il->ops->set_rxon_chain) il_mac_bss_info_changed()
5445 il->ops->set_rxon_chain(il); il_mac_bss_info_changed()
5451 il->timestamp = bss_conf->sync_tsf; il_mac_bss_info_changed()
5453 if (!il_is_rfkill(il)) il_mac_bss_info_changed()
5454 il->ops->post_associate(il); il_mac_bss_info_changed()
5456 il_set_no_assoc(il, vif); il_mac_bss_info_changed()
5459 if (changes && il_is_associated(il) && bss_conf->aid) { il_mac_bss_info_changed()
5461 ret = il_send_rxon_assoc(il); il_mac_bss_info_changed()
5464 memcpy((void *)&il->active, &il->staging, il_mac_bss_info_changed()
5471 memcpy(il->staging.bssid_addr, bss_conf->bssid, il_mac_bss_info_changed()
5473 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN); il_mac_bss_info_changed()
5474 il->ops->config_ap(il); il_mac_bss_info_changed()
5476 il_set_no_assoc(il, vif); il_mac_bss_info_changed()
5480 ret = il->ops->manage_ibss_station(il, vif, il_mac_bss_info_changed()
5489 mutex_unlock(&il->mutex); il_mac_bss_info_changed()
5496 struct il_priv *il = data; il_isr() local
5500 if (!il) il_isr()
5503 spin_lock_irqsave(&il->lock, flags); il_isr()
5509 inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */ il_isr()
5510 _il_wr(il, CSR_INT_MASK, 0x00000000); il_isr()
5513 inta = _il_rd(il, CSR_INT); il_isr()
5514 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); il_isr()
5538 tasklet_schedule(&il->irq_tasklet); il_isr()
5541 spin_unlock_irqrestore(&il->lock, flags); il_isr()
5547 if (test_bit(S_INT_ENABLED, &il->status)) il_isr()
5548 il_enable_interrupts(il); il_isr()
5549 spin_unlock_irqrestore(&il->lock, flags); il_isr()
5559 il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info, il_tx_cmd_protection() argument
|
| H A D | 4965.c | 48 il4965_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) il4965_verify_inst_sparse() argument
61 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL4965_RTC_INST_LOWER_BOUND); il4965_verify_inst_sparse()
62 val = _il_rd(il, HBUS_TARG_MEM_RDAT); il4965_verify_inst_sparse()
79 il4965_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) il4965_verify_inst_full() argument
88 il_wr(il, HBUS_TARG_MEM_RADDR, IL4965_RTC_INST_LOWER_BOUND); il4965_verify_inst_full()
95 val = _il_rd(il, HBUS_TARG_MEM_RDAT); il4965_verify_inst_full()
118 il4965_verify_ucode(struct il_priv *il) il4965_verify_ucode() argument
125 image = (__le32 *) il->ucode_boot.v_addr; il4965_verify_ucode()
126 len = il->ucode_boot.len; il4965_verify_ucode()
127 ret = il4965_verify_inst_sparse(il, image, len); il4965_verify_ucode()
134 image = (__le32 *) il->ucode_init.v_addr; il4965_verify_ucode()
135 len = il->ucode_init.len; il4965_verify_ucode()
136 ret = il4965_verify_inst_sparse(il, image, len); il4965_verify_ucode()
143 image = (__le32 *) il->ucode_code.v_addr; il4965_verify_ucode()
144 len = il->ucode_code.len; il4965_verify_ucode()
145 ret = il4965_verify_inst_sparse(il, image, len); il4965_verify_ucode()
156 image = (__le32 *) il->ucode_boot.v_addr; il4965_verify_ucode()
157 len = il->ucode_boot.len; il4965_verify_ucode()
158 ret = il4965_verify_inst_full(il, image, len); il4965_verify_ucode()
176 il4965_eeprom_acquire_semaphore(struct il_priv *il) il4965_eeprom_acquire_semaphore() argument
183 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il4965_eeprom_acquire_semaphore()
188 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, il4965_eeprom_acquire_semaphore()
200 il4965_eeprom_release_semaphore(struct il_priv *il) il4965_eeprom_release_semaphore() argument
202 il_clear_bit(il, CSR_HW_IF_CONFIG_REG, il4965_eeprom_release_semaphore()
208 il4965_eeprom_check_version(struct il_priv *il) il4965_eeprom_check_version() argument
213 eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION); il4965_eeprom_check_version()
214 calib_ver = il_eeprom_query16(il, EEPROM_4965_CALIB_VERSION_OFFSET); il4965_eeprom_check_version()
216 if (eeprom_ver < il->cfg->eeprom_ver || il4965_eeprom_check_version()
217 calib_ver < il->cfg->eeprom_calib_ver) il4965_eeprom_check_version()
225 "CALIB=0x%x < 0x%x\n", eeprom_ver, il->cfg->eeprom_ver, il4965_eeprom_check_version()
226 calib_ver, il->cfg->eeprom_calib_ver); il4965_eeprom_check_version()
232 il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac) il4965_eeprom_get_mac() argument
234 const u8 *addr = il_eeprom_query_addr(il, il4965_eeprom_get_mac()
241 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd) il4965_send_led_cmd() argument
252 reg = _il_rd(il, CSR_LED_REG); il4965_send_led_cmd()
254 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK); il4965_send_led_cmd()
256 return il_send_cmd(il, &cmd); il4965_send_led_cmd()
261 il4965_led_enable(struct il_priv *il) il4965_led_enable() argument
263 _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON); il4965_led_enable()
266 static int il4965_send_tx_power(struct il_priv *il);
267 static int il4965_hw_get_temperature(struct il_priv *il);
281 il4965_verify_bsm(struct il_priv *il) il4965_verify_bsm() argument
283 __le32 *image = il->ucode_boot.v_addr; il4965_verify_bsm()
284 u32 len = il->ucode_boot.len; il4965_verify_bsm()
291 val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); il4965_verify_bsm()
294 val = il_rd_prph(il, reg); il4965_verify_bsm()
342 il4965_load_bsm(struct il_priv *il) il4965_load_bsm() argument
344 __le32 *image = il->ucode_boot.v_addr; il4965_load_bsm()
345 u32 len = il->ucode_boot.len; il4965_load_bsm()
357 il->ucode_type = UCODE_RT; il4965_load_bsm()
369 pinst = il->ucode_init.p_addr >> 4; il4965_load_bsm()
370 pdata = il->ucode_init_data.p_addr >> 4; il4965_load_bsm()
371 inst_len = il->ucode_init.len; il4965_load_bsm()
372 data_len = il->ucode_init_data.len; il4965_load_bsm()
374 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); il4965_load_bsm()
375 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); il4965_load_bsm()
376 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); il4965_load_bsm()
377 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); il4965_load_bsm()
383 _il_wr_prph(il, reg_offset, le32_to_cpu(*image)); il4965_load_bsm()
385 ret = il4965_verify_bsm(il); il4965_load_bsm()
390 il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); il4965_load_bsm()
391 il_wr_prph(il, BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND); il4965_load_bsm()
392 il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); il4965_load_bsm()
396 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START); il4965_load_bsm()
400 done = il_rd_prph(il, BSM_WR_CTRL_REG); il4965_load_bsm()
414 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); il4965_load_bsm()
429 il4965_set_ucode_ptrs(struct il_priv *il) il4965_set_ucode_ptrs() argument
436 pinst = il->ucode_code.p_addr >> 4; il4965_set_ucode_ptrs()
437 pdata = il->ucode_data_backup.p_addr >> 4; il4965_set_ucode_ptrs()
440 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); il4965_set_ucode_ptrs()
441 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); il4965_set_ucode_ptrs()
442 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); il4965_set_ucode_ptrs()
446 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, il4965_set_ucode_ptrs()
447 il->ucode_code.len | BSM_DRAM_INST_LOAD); il4965_set_ucode_ptrs()
459 * Voltage, temperature, and MIMO tx gain correction, now stored in il
465 il4965_init_alive_start(struct il_priv *il) il4965_init_alive_start() argument
470 if (il4965_verify_ucode(il)) { il4965_init_alive_start()
478 il->temperature = il4965_hw_get_temperature(il); il4965_init_alive_start()
484 if (il4965_set_ucode_ptrs(il)) { il4965_init_alive_start()
493 queue_work(il->workqueue, &il->restart); il4965_init_alive_start()
507 il4965_nic_config(struct il_priv *il) il4965_nic_config() argument
512 spin_lock_irqsave(&il->lock, flags); il4965_nic_config()
514 radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG); il4965_nic_config()
518 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il4965_nic_config()
524 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il4965_nic_config()
528 il->calib_info = il4965_nic_config()
530 il_eeprom_query_addr(il, EEPROM_4965_CALIB_TXPOWER_OFFSET); il4965_nic_config()
532 spin_unlock_irqrestore(&il->lock, flags); il4965_nic_config()
539 il4965_chain_noise_reset(struct il_priv *il) il4965_chain_noise_reset() argument
541 struct il_chain_noise_data *data = &(il->chain_noise_data); il4965_chain_noise_reset()
543 if (data->state == IL_CHAIN_NOISE_ALIVE && il_is_any_associated(il)) { il4965_chain_noise_reset()
560 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd)) il4965_chain_noise_reset()
644 il4965_get_sub_band(const struct il_priv *il, u32 channel) il4965_get_sub_band() argument
649 if (il->calib_info->band_info[b].ch_from == 0) il4965_get_sub_band()
652 if (channel >= il->calib_info->band_info[b].ch_from && il4965_get_sub_band()
653 channel <= il->calib_info->band_info[b].ch_to) il4965_get_sub_band()
682 il4965_interpolate_chan(struct il_priv *il, u32 channel, il4965_interpolate_chan() argument
694 s = il4965_get_sub_band(il, channel); il4965_interpolate_chan()
700 ch_i1 = il->calib_info->band_info[s].ch1.ch_num; il4965_interpolate_chan()
701 ch_i2 = il->calib_info->band_info[s].ch2.ch_num; il4965_interpolate_chan()
709 m1 = &(il->calib_info->band_info[s].ch1. il4965_interpolate_chan()
711 m2 = &(il->calib_info->band_info[s].ch2. il4965_interpolate_chan()
1019 il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, u8 is_ht40, il4965_fill_txpower_tbl() argument
1049 user_target_power = 2 * il->tx_power_user_lmt; il4965_fill_txpower_tbl()
1054 ch_info = il_get_channel_info(il, il->band, channel); il4965_fill_txpower_tbl()
1080 saturation_power = il->calib_info->saturation_power24; il4965_fill_txpower_tbl()
1082 saturation_power = il->calib_info->saturation_power52; il4965_fill_txpower_tbl()
1109 il4965_interpolate_chan(il, channel, &ch_eeprom_info); il4965_fill_txpower_tbl()
1112 voltage = le16_to_cpu(il->calib_info->voltage); il4965_fill_txpower_tbl()
1113 init_voltage = (s32) le32_to_cpu(il->card_alive_init.voltage); il4965_fill_txpower_tbl()
1121 current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN); il4965_fill_txpower_tbl()
1122 current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX); il4965_fill_txpower_tbl()
1194 (s32) le32_to_cpu(il->card_alive_init. il4965_fill_txpower_tbl()
1254 * The power limit is taken from il->tx_power_user_lmt.
1257 il4965_send_tx_power(struct il_priv *il) il4965_send_tx_power() argument
1266 (test_bit(S_SCAN_HW, &il->status), il4965_send_tx_power()
1270 band = il->band == IEEE80211_BAND_2GHZ; il4965_send_tx_power()
1272 is_ht40 = iw4965_is_ht40_channel(il->active.flags); il4965_send_tx_power()
1274 if (is_ht40 && (il->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) il4965_send_tx_power()
1278 cmd.channel = il->active.channel; il4965_send_tx_power()
1281 il4965_fill_txpower_tbl(il, band, le16_to_cpu(il->active.channel), il4965_send_tx_power()
1286 ret = il_send_cmd_pdu(il, C_TX_PWR_TBL, sizeof(cmd), &cmd); il4965_send_tx_power()
1293 il4965_send_rxon_assoc(struct il_priv *il) il4965_send_rxon_assoc() argument
1297 const struct il_rxon_cmd *rxon1 = &il->staging; il4965_send_rxon_assoc()
1298 const struct il_rxon_cmd *rxon2 = &il->active; il4965_send_rxon_assoc()
1313 rxon_assoc.flags = il->staging.flags; il4965_send_rxon_assoc()
1314 rxon_assoc.filter_flags = il->staging.filter_flags; il4965_send_rxon_assoc()
1315 rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates; il4965_send_rxon_assoc()
1316 rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates; il4965_send_rxon_assoc()
1319 il->staging.ofdm_ht_single_stream_basic_rates; il4965_send_rxon_assoc()
1321 il->staging.ofdm_ht_dual_stream_basic_rates; il4965_send_rxon_assoc()
1322 rxon_assoc.rx_chain_select_flags = il->staging.rx_chain; il4965_send_rxon_assoc()
1325 il_send_cmd_pdu_async(il, C_RXON_ASSOC, sizeof(rxon_assoc), il4965_send_rxon_assoc()
1332 il4965_commit_rxon(struct il_priv *il) il4965_commit_rxon() argument
1335 struct il_rxon_cmd *active_rxon = (void *)&il->active; il4965_commit_rxon()
1337 bool new_assoc = !!(il->staging.filter_flags & RXON_FILTER_ASSOC_MSK); il4965_commit_rxon()
1339 if (!il_is_alive(il)) il4965_commit_rxon()
1343 il->staging.flags |= RXON_FLG_TSF2HOST_MSK; il4965_commit_rxon()
1345 ret = il_check_rxon_cmd(il); il4965_commit_rxon()
1355 if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) && il4965_commit_rxon()
1356 il->switch_channel != il->staging.channel) { il4965_commit_rxon()
1358 le16_to_cpu(il->switch_channel)); il4965_commit_rxon()
1359 il_chswitch_done(il, false); il4965_commit_rxon()
1365 if (!il_full_rxon_required(il)) { il4965_commit_rxon()
1366 ret = il_send_rxon_assoc(il); il4965_commit_rxon()
1372 memcpy(active_rxon, &il->staging, sizeof(*active_rxon)); il4965_commit_rxon()
1373 il_print_rx_config_cmd(il); il4965_commit_rxon()
1378 il_set_tx_power(il, il->tx_power_next, false); il4965_commit_rxon()
1386 if (il_is_associated(il) && new_assoc) { il4965_commit_rxon()
1391 il_send_cmd_pdu(il, C_RXON, il4965_commit_rxon()
1401 il_clear_ucode_stations(il); il4965_commit_rxon()
1402 il_restore_stations(il); il4965_commit_rxon()
1403 ret = il4965_restore_default_wep_keys(il); il4965_commit_rxon()
1412 le16_to_cpu(il->staging.channel), il->staging.bssid_addr); il4965_commit_rxon()
1414 il_set_rxon_hwcrypto(il, !il->cfg->mod_params->sw_crypto); il4965_commit_rxon()
1422 il_send_cmd_pdu(il, C_RXON, il4965_commit_rxon()
1423 sizeof(struct il_rxon_cmd), &il->staging); il4965_commit_rxon()
1429 memcpy(active_rxon, &il->staging, sizeof(*active_rxon)); il4965_commit_rxon()
1430 il_clear_ucode_stations(il); il4965_commit_rxon()
1431 il_restore_stations(il); il4965_commit_rxon()
1432 ret = il4965_restore_default_wep_keys(il); il4965_commit_rxon()
1439 il->start_calib = 0; il4965_commit_rxon()
1444 il_send_cmd_pdu(il, C_RXON, il4965_commit_rxon()
1445 sizeof(struct il_rxon_cmd), &il->staging); il4965_commit_rxon()
1450 memcpy(active_rxon, &il->staging, sizeof(*active_rxon)); il4965_commit_rxon()
1452 il_print_rx_config_cmd(il); il4965_commit_rxon()
1454 il4965_init_sensitivity(il); il4965_commit_rxon()
1458 ret = il_set_tx_power(il, il->tx_power_next, true); il4965_commit_rxon()
1468 il4965_hw_channel_switch(struct il_priv *il, il4965_hw_channel_switch() argument
1481 u16 beacon_interval = le16_to_cpu(il->timing.beacon_interval); il4965_hw_channel_switch()
1482 struct ieee80211_vif *vif = il->vif; il4965_hw_channel_switch()
1483 band = (il->band == IEEE80211_BAND_2GHZ); il4965_hw_channel_switch()
1488 is_ht40 = iw4965_is_ht40_channel(il->staging.flags); il4965_hw_channel_switch()
1490 if (is_ht40 && (il->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) il4965_hw_channel_switch()
1497 cmd.rxon_flags = il->staging.flags; il4965_hw_channel_switch()
1498 cmd.rxon_filter_flags = il->staging.filter_flags; il4965_hw_channel_switch()
1505 if (il->ucode_beacon_time > tsf_low && beacon_interval) { il4965_hw_channel_switch()
1507 ((il->ucode_beacon_time - tsf_low) / beacon_interval)) { il4965_hw_channel_switch()
1509 (il->ucode_beacon_time - tsf_low) / beacon_interval; il4965_hw_channel_switch()
1514 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time); il4965_hw_channel_switch()
1519 il_usecs_to_beacons(il, switch_time_in_usec, il4965_hw_channel_switch()
1522 il_add_beacon_time(il, il->ucode_beacon_time, il4965_hw_channel_switch()
1526 ch_info = il_get_channel_info(il, il->band, ch); il4965_hw_channel_switch()
1531 il->active.channel, ch); il4965_hw_channel_switch()
1535 rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, ctrl_chan_high, il4965_hw_channel_switch()
1542 return il_send_cmd_pdu(il, C_CHANNEL_SWITCH, sizeof(cmd), &cmd); il4965_hw_channel_switch()
1549 il4965_txq_update_byte_cnt_tbl(struct il_priv *il, struct il_tx_queue *txq, il4965_txq_update_byte_cnt_tbl() argument
1552 struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr; il4965_txq_update_byte_cnt_tbl()
1577 il4965_hw_get_temperature(struct il_priv *il) il4965_hw_get_temperature() argument
1584 if (test_bit(S_TEMPERATURE, &il->status) && il4965_hw_get_temperature()
1585 (il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)) { il4965_hw_get_temperature()
1587 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]); il4965_hw_get_temperature()
1588 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]); il4965_hw_get_temperature()
1589 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[1]); il4965_hw_get_temperature()
1590 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]); il4965_hw_get_temperature()
1593 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]); il4965_hw_get_temperature()
1594 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]); il4965_hw_get_temperature()
1595 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[0]); il4965_hw_get_temperature()
1596 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]); il4965_hw_get_temperature()
1606 if (!test_bit(S_TEMPERATURE, &il->status)) il4965_hw_get_temperature()
1610 (il->_4965.stats.general.common.temperature), il4965_hw_get_temperature()
1642 * Assumes caller will replace il->last_temperature once calibration
1646 il4965_is_temp_calib_needed(struct il_priv *il) il4965_is_temp_calib_needed() argument
1650 if (!test_bit(S_STATS, &il->status)) { il4965_is_temp_calib_needed()
1655 temp_diff = il->temperature - il->last_temperature; il4965_is_temp_calib_needed()
1677 il4965_temperature_calib(struct il_priv *il) il4965_temperature_calib() argument
1681 temp = il4965_hw_get_temperature(il); il4965_temperature_calib()
1685 if (il->temperature != temp) { il4965_temperature_calib()
1686 if (il->temperature) il4965_temperature_calib()
1688 KELVIN_TO_CELSIUS(il->temperature), il4965_temperature_calib()
1695 il->temperature = temp; il4965_temperature_calib()
1696 set_bit(S_TEMPERATURE, &il->status); il4965_temperature_calib()
1698 if (!il->disable_tx_power_cal && il4965_temperature_calib()
1699 unlikely(!test_bit(S_SCANNING, &il->status)) && il4965_temperature_calib()
1700 il4965_is_temp_calib_needed(il)) il4965_temperature_calib()
1701 queue_work(il->workqueue, &il->txpower_work); il4965_temperature_calib()
1736 il4965_post_scan(struct il_priv *il) il4965_post_scan() argument
1742 if (memcmp(&il->staging, &il->active, sizeof(il->staging))) il4965_post_scan()
1743 il_commit_rxon(il); il4965_post_scan()
1747 il4965_post_associate(struct il_priv *il) il4965_post_associate() argument
1749 struct ieee80211_vif *vif = il->vif; il4965_post_associate()
1752 if (!vif || !il->is_open) il4965_post_associate()
1755 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_post_associate()
1758 il_scan_cancel_timeout(il, 200); il4965_post_associate()
1760 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; il4965_post_associate()
1761 il_commit_rxon(il); il4965_post_associate()
1763 ret = il_send_rxon_timing(il); il4965_post_associate()
1767 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; il4965_post_associate()
1769 il_set_rxon_ht(il, &il->current_ht_config); il4965_post_associate()
1771 if (il->ops->set_rxon_chain) il4965_post_associate()
1772 il->ops->set_rxon_chain(il); il4965_post_associate()
1774 il->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid); il4965_post_associate()
1780 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; il4965_post_associate()
1782 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; il4965_post_associate()
1784 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { il4965_post_associate()
1786 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; il4965_post_associate()
1788 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; il4965_post_associate()
1791 il_commit_rxon(il); il4965_post_associate()
1794 il->active.bssid_addr); il4965_post_associate()
1800 il4965_send_beacon_cmd(il); il4965_post_associate()
1811 if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE) il4965_post_associate()
1812 il_power_update_mode(il, false); il4965_post_associate()
1815 il4965_chain_noise_reset(il); il4965_post_associate()
1816 il->start_calib = 1; il4965_post_associate()
1820 il4965_config_ap(struct il_priv *il) il4965_config_ap() argument
1822 struct ieee80211_vif *vif = il->vif; il4965_config_ap()
1825 lockdep_assert_held(&il->mutex); il4965_config_ap()
1827 if (test_bit(S_EXIT_PENDING, &il->status)) il4965_config_ap()
1831 if (!il_is_associated(il)) { il4965_config_ap()
1834 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; il4965_config_ap()
1835 il_commit_rxon(il); il4965_config_ap()
1838 ret = il_send_rxon_timing(il); il4965_config_ap()
1844 il->chain_noise_data.active_chains = il->hw_params.valid_rx_ant; il4965_config_ap()
1845 il_set_rxon_ht(il, &il->current_ht_config); il4965_config_ap()
1846 if (il->ops->set_rxon_chain) il4965_config_ap()
1847 il->ops->set_rxon_chain(il); il4965_config_ap()
1849 il->staging.assoc_id = 0; il4965_config_ap()
1852 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; il4965_config_ap()
1854 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; il4965_config_ap()
1856 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { il4965_config_ap()
1858 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; il4965_config_ap()
1860 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; il4965_config_ap()
1863 il4965_send_beacon_cmd(il); il4965_config_ap()
1865 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; il4965_config_ap()
1866 il_commit_rxon(il); il4965_config_ap()
1868 il4965_send_beacon_cmd(il); il4965_config_ap()
|
| H A D | 3945-mac.c | 96 * @il: eeprom and antenna fields are used to determine antenna flags
98 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
106 il3945_get_antenna_flags(const struct il_priv *il) il3945_get_antenna_flags() argument
108 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_get_antenna_flags()
133 il3945_set_ccmp_dynamic_key_info(struct il_priv *il, il3945_set_ccmp_dynamic_key_info() argument
143 if (sta_id == il->hw_params.bcast_id) il3945_set_ccmp_dynamic_key_info()
150 spin_lock_irqsave(&il->sta_lock, flags); il3945_set_ccmp_dynamic_key_info()
151 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; il3945_set_ccmp_dynamic_key_info()
152 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; il3945_set_ccmp_dynamic_key_info()
153 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); il3945_set_ccmp_dynamic_key_info()
155 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); il3945_set_ccmp_dynamic_key_info()
157 if ((il->stations[sta_id].sta.key. il3945_set_ccmp_dynamic_key_info()
159 il->stations[sta_id].sta.key.key_offset = il3945_set_ccmp_dynamic_key_info()
160 il_get_free_ucode_key_idx(il); il3945_set_ccmp_dynamic_key_info()
164 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, il3945_set_ccmp_dynamic_key_info()
167 il->stations[sta_id].sta.key.key_flags = key_flags; il3945_set_ccmp_dynamic_key_info()
168 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; il3945_set_ccmp_dynamic_key_info()
169 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il3945_set_ccmp_dynamic_key_info()
173 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); il3945_set_ccmp_dynamic_key_info()
175 spin_unlock_irqrestore(&il->sta_lock, flags); il3945_set_ccmp_dynamic_key_info()
181 il3945_set_tkip_dynamic_key_info(struct il_priv *il, il3945_set_tkip_dynamic_key_info() argument
188 il3945_set_wep_dynamic_key_info(struct il_priv *il, il3945_set_wep_dynamic_key_info() argument
195 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id) il3945_clear_sta_key_info() argument
200 spin_lock_irqsave(&il->sta_lock, flags); il3945_clear_sta_key_info()
201 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); il3945_clear_sta_key_info()
202 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); il3945_clear_sta_key_info()
203 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; il3945_clear_sta_key_info()
204 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; il3945_clear_sta_key_info()
205 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; il3945_clear_sta_key_info()
206 memcpy(&sta_cmd, &il->stations[sta_id].sta, il3945_clear_sta_key_info()
208 spin_unlock_irqrestore(&il->sta_lock, flags); il3945_clear_sta_key_info()
211 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); il3945_clear_sta_key_info()
215 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, il3945_set_dynamic_key() argument
224 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id); il3945_set_dynamic_key()
227 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id); il3945_set_dynamic_key()
231 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id); il3945_set_dynamic_key()
245 il3945_remove_static_key(struct il_priv *il) il3945_remove_static_key() argument
253 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key) il3945_set_static_key() argument
264 il3945_clear_free_frames(struct il_priv *il) il3945_clear_free_frames() argument
268 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); il3945_clear_free_frames()
270 while (!list_empty(&il->free_frames)) { il3945_clear_free_frames()
271 element = il->free_frames.next; il3945_clear_free_frames()
274 il->frames_count--; il3945_clear_free_frames()
277 if (il->frames_count) { il3945_clear_free_frames()
279 il->frames_count); il3945_clear_free_frames()
280 il->frames_count = 0; il3945_clear_free_frames()
285 il3945_get_free_frame(struct il_priv *il) il3945_get_free_frame() argument
289 if (list_empty(&il->free_frames)) { il3945_get_free_frame()
296 il->frames_count++; il3945_get_free_frame()
300 element = il->free_frames.next; il3945_get_free_frame()
306 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame) il3945_free_frame() argument
309 list_add(&frame->list, &il->free_frames); il3945_free_frame()
313 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, il3945_fill_beacon_frame() argument
317 if (!il_is_associated(il) || !il->beacon_skb) il3945_fill_beacon_frame()
320 if (il->beacon_skb->len > left) il3945_fill_beacon_frame()
323 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len); il3945_fill_beacon_frame()
325 return il->beacon_skb->len; il3945_fill_beacon_frame()
329 il3945_send_beacon_cmd(struct il_priv *il) il3945_send_beacon_cmd() argument
336 frame = il3945_get_free_frame(il); il3945_send_beacon_cmd()
344 rate = il_get_lowest_plcp(il); il3945_send_beacon_cmd()
346 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate); il3945_send_beacon_cmd()
348 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); il3945_send_beacon_cmd()
350 il3945_free_frame(il, frame); il3945_send_beacon_cmd()
356 il3945_unset_hw_params(struct il_priv *il) il3945_unset_hw_params() argument
358 if (il->_3945.shared_virt) il3945_unset_hw_params()
359 dma_free_coherent(&il->pci_dev->dev, il3945_unset_hw_params()
361 il->_3945.shared_virt, il->_3945.shared_phys); il3945_unset_hw_params()
365 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, il3945_build_tx_cmd_hwcrypto() argument
370 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo; il3945_build_tx_cmd_hwcrypto()
409 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd, il3945_build_tx_cmd_basic() argument
442 il_tx_cmd_protection(il, info, fc, &tx_flags); il3945_build_tx_cmd_basic()
463 il3945_tx_skb(struct il_priv *il, il3945_tx_skb() argument
487 spin_lock_irqsave(&il->lock, flags); il3945_tx_skb()
488 if (il_is_rfkill(il)) { il3945_tx_skb()
493 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == il3945_tx_skb()
513 spin_unlock_irqrestore(&il->lock, flags); il3945_tx_skb()
518 sta_id = il_sta_id_or_broadcast(il, sta); il3945_tx_skb()
534 txq = &il->txq[txq_id]; il3945_tx_skb()
540 spin_lock_irqsave(&il->lock, flags); il3945_tx_skb()
568 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id); il3945_tx_skb()
571 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id); il3945_tx_skb()
573 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id); il3945_tx_skb()
598 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen, il3945_tx_skb()
600 if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys))) il3945_tx_skb()
608 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen, il3945_tx_skb()
610 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) il3945_tx_skb()
616 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0); il3945_tx_skb()
620 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0, il3945_tx_skb()
630 il_update_stats(il, true, fc, skb->len); il3945_tx_skb()
634 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd)); il3945_tx_skb()
635 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, il3945_tx_skb()
640 il_txq_update_write_ptr(il, txq); il3945_tx_skb()
641 spin_unlock_irqrestore(&il->lock, flags); il3945_tx_skb()
643 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) { il3945_tx_skb()
645 spin_lock_irqsave(&il->lock, flags); il3945_tx_skb()
647 il_txq_update_write_ptr(il, txq); il3945_tx_skb()
648 spin_unlock_irqrestore(&il->lock, flags); il3945_tx_skb()
651 il_stop_queue(il, txq); il3945_tx_skb()
657 spin_unlock_irqrestore(&il->lock, flags); il3945_tx_skb()
663 il3945_get_measurement(struct il_priv *il, il3945_get_measurement() argument
678 if (il_is_associated(il)) il3945_get_measurement()
680 il_usecs_to_beacons(il, il3945_get_measurement()
682 il->_3945.last_tsf, il3945_get_measurement()
683 le16_to_cpu(il->timing.beacon_interval)); il3945_get_measurement()
694 if (il_is_associated(il)) il3945_get_measurement()
696 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time, il3945_get_measurement()
697 le16_to_cpu(il->timing.beacon_interval)); il3945_get_measurement()
704 if (il->active.flags & RXON_FLG_BAND_24G_MSK) il3945_get_measurement()
709 rc = il_send_cmd_sync(il, &cmd); il3945_get_measurement()
725 il->measurement_status &= ~MEASUREMENT_READY; il3945_get_measurement()
727 il->measurement_status |= MEASUREMENT_ACTIVE; il3945_get_measurement()
736 il_free_pages(il, cmd.reply_page); il3945_get_measurement()
742 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) il3945_hdl_alive() argument
755 memcpy(&il->card_alive_init, &pkt->u.alive_frame, il3945_hdl_alive()
757 pwork = &il->init_alive_start; il3945_hdl_alive()
760 memcpy(&il->card_alive, &pkt->u.alive_frame, il3945_hdl_alive()
762 pwork = &il->alive_start; il3945_hdl_alive()
763 il3945_disable_events(il); il3945_hdl_alive()
769 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); il3945_hdl_alive()
775 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb) il3945_hdl_add_sta() argument
785 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) il3945_hdl_beacon() argument
799 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); il3945_hdl_beacon()
806 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) il3945_hdl_card_state() argument
810 unsigned long status = il->status; il3945_hdl_card_state()
816 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); il3945_hdl_card_state()
819 set_bit(S_RFKILL, &il->status); il3945_hdl_card_state()
821 clear_bit(S_RFKILL, &il->status); il3945_hdl_card_state()
823 il_scan_cancel(il); il3945_hdl_card_state()
826 test_bit(S_RFKILL, &il->status))) il3945_hdl_card_state()
827 wiphy_rfkill_set_hw_state(il->hw->wiphy, il3945_hdl_card_state()
828 test_bit(S_RFKILL, &il->status)); il3945_hdl_card_state()
830 wake_up(&il->wait_command_queue); il3945_hdl_card_state()
843 il3945_setup_handlers(struct il_priv *il) il3945_setup_handlers() argument
845 il->handlers[N_ALIVE] = il3945_hdl_alive; il3945_setup_handlers()
846 il->handlers[C_ADD_STA] = il3945_hdl_add_sta; il3945_setup_handlers()
847 il->handlers[N_ERROR] = il_hdl_error; il3945_setup_handlers()
848 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; il3945_setup_handlers()
849 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; il3945_setup_handlers()
850 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; il3945_setup_handlers()
851 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; il3945_setup_handlers()
852 il->handlers[N_BEACON] = il3945_hdl_beacon; il3945_setup_handlers()
859 il->handlers[C_STATS] = il3945_hdl_c_stats; il3945_setup_handlers()
860 il->handlers[N_STATS] = il3945_hdl_stats; il3945_setup_handlers()
862 il_setup_rx_scan_handlers(il); il3945_setup_handlers()
863 il->handlers[N_CARD_STATE] = il3945_hdl_card_state; il3945_setup_handlers()
866 il3945_hw_handler_setup(il); il3945_setup_handlers()
937 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) il3945_dma_addr2rbd_ptr() argument
954 il3945_rx_queue_restock(struct il_priv *il) il3945_rx_queue_restock() argument
956 struct il_rx_queue *rxq = &il->rxq; il3945_rx_queue_restock()
972 il3945_dma_addr2rbd_ptr(il, rxb->page_dma); il3945_rx_queue_restock()
981 queue_work(il->workqueue, &il->rx_replenish); il3945_rx_queue_restock()
990 il_rx_queue_update_write_ptr(il, rxq); il3945_rx_queue_restock()
1003 il3945_rx_allocate(struct il_priv *il, gfp_t priority) il3945_rx_allocate() argument
1005 struct il_rx_queue *rxq = &il->rxq; il3945_rx_allocate()
1024 if (il->hw_params.rx_page_order > 0) il3945_rx_allocate()
1028 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); il3945_rx_allocate()
1045 pci_map_page(il->pci_dev, page, 0, il3945_rx_allocate()
1046 PAGE_SIZE << il->hw_params.rx_page_order, il3945_rx_allocate()
1049 if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) { il3945_rx_allocate()
1050 __free_pages(page, il->hw_params.rx_page_order); il3945_rx_allocate()
1058 pci_unmap_page(il->pci_dev, page_dma, il3945_rx_allocate()
1059 PAGE_SIZE << il->hw_params.rx_page_order, il3945_rx_allocate()
1061 __free_pages(page, il->hw_params.rx_page_order); il3945_rx_allocate()
1073 il->alloc_rxb_page++; il3945_rx_allocate()
1080 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) il3945_rx_queue_reset() argument
1092 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, il3945_rx_queue_reset()
1093 PAGE_SIZE << il->hw_params.rx_page_order, il3945_rx_queue_reset()
1095 __il_free_pages(il, rxq->pool[i].page); il3945_rx_queue_reset()
1112 struct il_priv *il = data; il3945_rx_replenish() local
1115 il3945_rx_allocate(il, GFP_KERNEL); il3945_rx_replenish()
1117 spin_lock_irqsave(&il->lock, flags); il3945_rx_replenish()
1118 il3945_rx_queue_restock(il); il3945_rx_replenish()
1119 spin_unlock_irqrestore(&il->lock, flags); il3945_rx_replenish()
1123 il3945_rx_replenish_now(struct il_priv *il) il3945_rx_replenish_now() argument
1125 il3945_rx_allocate(il, GFP_ATOMIC); il3945_rx_replenish_now()
1127 il3945_rx_queue_restock(il); il3945_rx_replenish_now()
1136 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) il3945_rx_queue_free() argument
1141 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, il3945_rx_queue_free()
1142 PAGE_SIZE << il->hw_params.rx_page_order, il3945_rx_queue_free()
1144 __il_free_pages(il, rxq->pool[i].page); il3945_rx_queue_free()
1149 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, il3945_rx_queue_free()
1151 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), il3945_rx_queue_free()
1198 * Uses the il->handlers callback function array to invoke
1203 il3945_rx_handle(struct il_priv *il) il3945_rx_handle() argument
1207 struct il_rx_queue *rxq = &il->rxq; il3945_rx_handle()
1243 pci_unmap_page(il->pci_dev, rxb->page_dma, il3945_rx_handle()
1244 PAGE_SIZE << il->hw_params.rx_page_order, il3945_rx_handle()
1251 reclaim = il_need_reclaim(il, pkt); il3945_rx_handle()
1256 if (il->handlers[pkt->hdr.cmd]) { il3945_rx_handle()
1259 il->isr_stats.handlers[pkt->hdr.cmd]++; il3945_rx_handle()
1260 il->handlers[pkt->hdr.cmd] (il, rxb); il3945_rx_handle()
1279 il_tx_cmd_complete(il, rxb); il3945_rx_handle()
1290 pci_map_page(il->pci_dev, rxb->page, 0, il3945_rx_handle()
1291 PAGE_SIZE << il->hw_params. il3945_rx_handle()
1293 if (unlikely(pci_dma_mapping_error(il->pci_dev, il3945_rx_handle()
1295 __il_free_pages(il, rxb->page); il3945_rx_handle()
1314 il3945_rx_replenish_now(il); il3945_rx_handle()
1323 il3945_rx_replenish_now(il); il3945_rx_handle()
1325 il3945_rx_queue_restock(il); il3945_rx_handle()
1330 il3945_synchronize_irq(struct il_priv *il) il3945_synchronize_irq() argument
1333 synchronize_irq(il->pci_dev->irq); il3945_synchronize_irq()
1334 tasklet_kill(&il->irq_tasklet); il3945_synchronize_irq()
1362 il3945_dump_nic_error_log(struct il_priv *il) il3945_dump_nic_error_log() argument
1368 base = le32_to_cpu(il->card_alive.error_event_table_ptr); il3945_dump_nic_error_log()
1375 count = il_read_targ_mem(il, base); il3945_dump_nic_error_log()
1379 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); il3945_dump_nic_error_log()
1387 desc = il_read_targ_mem(il, base + i); il3945_dump_nic_error_log()
1388 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32)); il3945_dump_nic_error_log()
1389 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32)); il3945_dump_nic_error_log()
1390 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32)); il3945_dump_nic_error_log()
1391 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32)); il3945_dump_nic_error_log()
1392 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32)); il3945_dump_nic_error_log()
1393 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32)); il3945_dump_nic_error_log()
1402 il3945_irq_tasklet(struct il_priv *il) il3945_irq_tasklet() argument
1411 spin_lock_irqsave(&il->lock, flags); il3945_irq_tasklet()
1416 inta = _il_rd(il, CSR_INT); il3945_irq_tasklet()
1417 _il_wr(il, CSR_INT, inta); il3945_irq_tasklet()
1422 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); il3945_irq_tasklet()
1423 _il_wr(il, CSR_FH_INT_STATUS, inta_fh); il3945_irq_tasklet()
1426 if (il_get_debug_level(il) & IL_DL_ISR) { il3945_irq_tasklet()
1428 inta_mask = _il_rd(il, CSR_INT_MASK); il3945_irq_tasklet()
1434 spin_unlock_irqrestore(&il->lock, flags); il3945_irq_tasklet()
1450 il_disable_interrupts(il); il3945_irq_tasklet()
1452 il->isr_stats.hw++; il3945_irq_tasklet()
1453 il_irq_handle_error(il); il3945_irq_tasklet()
1460 if (il_get_debug_level(il) & (IL_DL_ISR)) { il3945_irq_tasklet()
1465 il->isr_stats.sch++; il3945_irq_tasklet()
1471 il->isr_stats.alive++; il3945_irq_tasklet()
1482 il->isr_stats.sw++; il3945_irq_tasklet()
1483 il_irq_handle_error(il); il3945_irq_tasklet()
1490 il_rx_queue_update_write_ptr(il, &il->rxq); il3945_irq_tasklet()
1492 spin_lock_irqsave(&il->lock, flags); il3945_irq_tasklet()
1493 il_txq_update_write_ptr(il, &il->txq[0]); il3945_irq_tasklet()
1494 il_txq_update_write_ptr(il, &il->txq[1]); il3945_irq_tasklet()
1495 il_txq_update_write_ptr(il, &il->txq[2]); il3945_irq_tasklet()
1496 il_txq_update_write_ptr(il, &il->txq[3]); il3945_irq_tasklet()
1497 il_txq_update_write_ptr(il, &il->txq[4]); il3945_irq_tasklet()
1498 spin_unlock_irqrestore(&il->lock, flags); il3945_irq_tasklet()
1500 il->isr_stats.wakeup++; il3945_irq_tasklet()
1508 il3945_rx_handle(il); il3945_irq_tasklet()
1509 il->isr_stats.rx++; il3945_irq_tasklet()
1515 il->isr_stats.tx++; il3945_irq_tasklet()
1517 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6)); il3945_irq_tasklet()
1518 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0); il3945_irq_tasklet()
1524 il->isr_stats.unhandled++; il3945_irq_tasklet()
1527 if (inta & ~il->inta_mask) { il3945_irq_tasklet()
1529 inta & ~il->inta_mask); il3945_irq_tasklet()
1535 if (test_bit(S_INT_ENABLED, &il->status)) il3945_irq_tasklet()
1536 il_enable_interrupts(il); il3945_irq_tasklet()
1539 if (il_get_debug_level(il) & (IL_DL_ISR)) { il3945_irq_tasklet()
1540 inta = _il_rd(il, CSR_INT); il3945_irq_tasklet()
1541 inta_mask = _il_rd(il, CSR_INT_MASK); il3945_irq_tasklet()
1542 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); il3945_irq_tasklet()
1550 il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band, il3945_get_channels_for_scan() argument
1562 sband = il_get_hw_mode(il, band); il3945_get_channels_for_scan()
1566 active_dwell = il_get_active_dwell_time(il, band, n_probes); il3945_get_channels_for_scan()
1567 passive_dwell = il_get_passive_dwell_time(il, band, vif); il3945_get_channels_for_scan()
1572 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) { il3945_get_channels_for_scan()
1573 chan = il->scan_request->channels[i]; il3945_get_channels_for_scan()
1580 ch_info = il_get_channel_info(il, band, scan_ch->channel); il3945_get_channels_for_scan()
1595 if (IL_UCODE_API(il->ucode_ver) == 1) il3945_get_channels_for_scan()
1606 if (IL_UCODE_API(il->ucode_ver) >= 2) { il3945_get_channels_for_scan()
1644 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) il3945_init_hw_rates() argument
1671 il3945_dealloc_ucode_pci(struct il_priv *il) il3945_dealloc_ucode_pci() argument
1673 il_free_fw_desc(il->pci_dev, &il->ucode_code); il3945_dealloc_ucode_pci()
1674 il_free_fw_desc(il->pci_dev, &il->ucode_data); il3945_dealloc_ucode_pci()
1675 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup); il3945_dealloc_ucode_pci()
1676 il_free_fw_desc(il->pci_dev, &il->ucode_init); il3945_dealloc_ucode_pci()
1677 il_free_fw_desc(il->pci_dev, &il->ucode_init_data); il3945_dealloc_ucode_pci()
1678 il_free_fw_desc(il->pci_dev, &il->ucode_boot); il3945_dealloc_ucode_pci()
1686 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) il3945_verify_inst_full() argument
1695 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND); il3945_verify_inst_full()
1702 val = _il_rd(il, HBUS_TARG_MEM_RDAT); il3945_verify_inst_full()
1726 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) il3945_verify_inst_sparse() argument
1739 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND); il3945_verify_inst_sparse()
1740 val = _il_rd(il, HBUS_TARG_MEM_RDAT); il3945_verify_inst_sparse()
1762 il3945_verify_ucode(struct il_priv *il) il3945_verify_ucode() argument
1769 image = (__le32 *) il->ucode_boot.v_addr; il3945_verify_ucode()
1770 len = il->ucode_boot.len; il3945_verify_ucode()
1771 rc = il3945_verify_inst_sparse(il, image, len); il3945_verify_ucode()
1778 image = (__le32 *) il->ucode_init.v_addr; il3945_verify_ucode()
1779 len = il->ucode_init.len; il3945_verify_ucode()
1780 rc = il3945_verify_inst_sparse(il, image, len); il3945_verify_ucode()
1787 image = (__le32 *) il->ucode_code.v_addr; il3945_verify_ucode()
1788 len = il->ucode_code.len; il3945_verify_ucode()
1789 rc = il3945_verify_inst_sparse(il, image, len); il3945_verify_ucode()
1800 image = (__le32 *) il->ucode_boot.v_addr; il3945_verify_ucode()
1801 len = il->ucode_boot.len; il3945_verify_ucode()
1802 rc = il3945_verify_inst_full(il, image, len); il3945_verify_ucode()
1808 il3945_nic_start(struct il_priv *il) il3945_nic_start() argument
1811 _il_wr(il, CSR_RESET, 0); il3945_nic_start()
1844 il3945_read_ucode(struct il_priv *il) il3945_read_ucode() argument
1850 const char *name_pre = il->cfg->fw_name_pre; il3945_read_ucode()
1851 const unsigned int api_max = il->cfg->ucode_api_max; il3945_read_ucode()
1852 const unsigned int api_min = il->cfg->ucode_api_min; il3945_read_ucode()
1862 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev); il3945_read_ucode()
1894 il->ucode_ver = le32_to_cpu(ucode->ver); il3945_read_ucode()
1895 api_ver = IL_UCODE_API(il->ucode_ver); il3945_read_ucode()
1911 il->ucode_ver = 0; il3945_read_ucode()
1922 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), il3945_read_ucode()
1923 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); il3945_read_ucode()
1925 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), il3945_read_ucode()
1926 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), il3945_read_ucode()
1927 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), il3945_read_ucode()
1928 IL_UCODE_SERIAL(il->ucode_ver)); il3945_read_ucode()
1930 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); il3945_read_ucode()
1984 il->ucode_code.len = inst_size; il3945_read_ucode()
1985 il_alloc_fw_desc(il->pci_dev, &il->ucode_code); il3945_read_ucode()
1987 il->ucode_data.len = data_size; il3945_read_ucode()
1988 il_alloc_fw_desc(il->pci_dev, &il->ucode_data); il3945_read_ucode()
1990 il->ucode_data_backup.len = data_size; il3945_read_ucode()
1991 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup); il3945_read_ucode()
1993 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr || il3945_read_ucode()
1994 !il->ucode_data_backup.v_addr) il3945_read_ucode()
1999 il->ucode_init.len = init_size; il3945_read_ucode()
2000 il_alloc_fw_desc(il->pci_dev, &il->ucode_init); il3945_read_ucode()
2002 il->ucode_init_data.len = init_data_size; il3945_read_ucode()
2003 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data); il3945_read_ucode()
2005 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr) il3945_read_ucode()
2011 il->ucode_boot.len = boot_size; il3945_read_ucode()
2012 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot); il3945_read_ucode()
2014 if (!il->ucode_boot.v_addr) il3945_read_ucode()
2023 memcpy(il->ucode_code.v_addr, src, len); il3945_read_ucode()
2027 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); il3945_read_ucode()
2033 memcpy(il->ucode_data.v_addr, src, len); il3945_read_ucode()
2034 memcpy(il->ucode_data_backup.v_addr, src, len); il3945_read_ucode()
2041 memcpy(il->ucode_init.v_addr, src, len); il3945_read_ucode()
2049 memcpy(il->ucode_init_data.v_addr, src, len); il3945_read_ucode()
2056 memcpy(il->ucode_boot.v_addr, src, len); il3945_read_ucode()
2065 il3945_dealloc_ucode_pci(il); il3945_read_ucode()
2084 il3945_set_ucode_ptrs(struct il_priv *il) il3945_set_ucode_ptrs() argument
2090 pinst = il->ucode_code.p_addr; il3945_set_ucode_ptrs()
2091 pdata = il->ucode_data_backup.p_addr; il3945_set_ucode_ptrs()
2094 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); il3945_set_ucode_ptrs()
2095 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); il3945_set_ucode_ptrs()
2096 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); il3945_set_ucode_ptrs()
2100 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, il3945_set_ucode_ptrs()
2101 il->ucode_code.len | BSM_DRAM_INST_LOAD); il3945_set_ucode_ptrs()
2116 il3945_init_alive_start(struct il_priv *il) il3945_init_alive_start() argument
2119 if (il->card_alive_init.is_valid != UCODE_VALID_OK) { il3945_init_alive_start()
2129 if (il3945_verify_ucode(il)) { il3945_init_alive_start()
2140 if (il3945_set_ucode_ptrs(il)) { il3945_init_alive_start()
2149 queue_work(il->workqueue, &il->restart); il3945_init_alive_start()
2158 il3945_alive_start(struct il_priv *il) il3945_alive_start() argument
2165 if (il->card_alive.is_valid != UCODE_VALID_OK) { il3945_alive_start()
2175 if (il3945_verify_ucode(il)) { il3945_alive_start()
2182 rfkill = il_rd_prph(il, APMG_RFKILL_REG); il3945_alive_start()
2186 clear_bit(S_RFKILL, &il->status); il3945_alive_start()
2189 while (il3945_hw_get_temperature(il) == 0) { il3945_alive_start()
2198 set_bit(S_RFKILL, &il->status); il3945_alive_start()
2201 set_bit(S_ALIVE, &il->status); il3945_alive_start()
2204 il_setup_watchdog(il); il3945_alive_start()
2206 if (il_is_rfkill(il)) il3945_alive_start()
2209 ieee80211_wake_queues(il->hw); il3945_alive_start()
2211 il->active_rate = RATES_MASK_3945; il3945_alive_start()
2213 il_power_update_mode(il, true); il3945_alive_start()
2215 if (il_is_associated(il)) { il3945_alive_start()
2217 (struct il3945_rxon_cmd *)(&il->active); il3945_alive_start()
2219 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; il3945_alive_start()
2223 il_connection_init_rx_config(il); il3945_alive_start()
2227 il_send_bt_config(il); il3945_alive_start()
2229 set_bit(S_READY, &il->status); il3945_alive_start()
2232 il3945_commit_rxon(il); il3945_alive_start()
2234 il3945_reg_txpower_periodic(il); il3945_alive_start()
2237 wake_up(&il->wait_command_queue); il3945_alive_start()
2242 queue_work(il->workqueue, &il->restart); il3945_alive_start()
2245 static void il3945_cancel_deferred_work(struct il_priv *il);
2248 __il3945_down(struct il_priv *il) __il3945_down() argument
2255 il_scan_cancel_timeout(il, 200); __il3945_down()
2257 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status); __il3945_down()
2261 del_timer_sync(&il->watchdog); __il3945_down()
2264 il_clear_ucode_stations(il); __il3945_down()
2265 il_dealloc_bcast_stations(il); __il3945_down()
2266 il_clear_driver_stations(il); __il3945_down()
2269 wake_up_all(&il->wait_command_queue); __il3945_down()
2274 clear_bit(S_EXIT_PENDING, &il->status); __il3945_down()
2277 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); __il3945_down()
2280 spin_lock_irqsave(&il->lock, flags); __il3945_down()
2281 il_disable_interrupts(il); __il3945_down()
2282 spin_unlock_irqrestore(&il->lock, flags); __il3945_down()
2283 il3945_synchronize_irq(il); __il3945_down()
2285 if (il->mac80211_registered) __il3945_down()
2286 ieee80211_stop_queues(il->hw); __il3945_down()
2290 if (!il_is_init(il)) { __il3945_down()
2291 il->status = __il3945_down()
2292 test_bit(S_RFKILL, &il->status) << S_RFKILL | __il3945_down()
2293 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | __il3945_down()
2294 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; __il3945_down()
2300 il->status &= __il3945_down()
2301 test_bit(S_RFKILL, &il->status) << S_RFKILL | __il3945_down()
2302 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | __il3945_down()
2303 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR | __il3945_down()
2304 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; __il3945_down()
2311 spin_lock_irq(&il->reg_lock); __il3945_down()
2314 il3945_hw_txq_ctx_stop(il); __il3945_down()
2315 il3945_hw_rxq_stop(il); __il3945_down()
2317 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); __il3945_down()
2320 _il_apm_stop(il); __il3945_down()
2322 spin_unlock_irq(&il->reg_lock); __il3945_down()
2324 il3945_hw_txq_ctx_free(il); __il3945_down()
2326 memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); __il3945_down()
2328 if (il->beacon_skb) __il3945_down()
2329 dev_kfree_skb(il->beacon_skb); __il3945_down()
2330 il->beacon_skb = NULL; __il3945_down()
2333 il3945_clear_free_frames(il); __il3945_down()
2337 il3945_down(struct il_priv *il) il3945_down() argument
2339 mutex_lock(&il->mutex); il3945_down()
2340 __il3945_down(il); il3945_down()
2341 mutex_unlock(&il->mutex); il3945_down()
2343 il3945_cancel_deferred_work(il); il3945_down()
2349 il3945_alloc_bcast_station(struct il_priv *il) il3945_alloc_bcast_station() argument
2354 spin_lock_irqsave(&il->sta_lock, flags); il3945_alloc_bcast_station()
2355 sta_id = il_prep_station(il, il_bcast_addr, false, NULL); il3945_alloc_bcast_station()
2358 spin_unlock_irqrestore(&il->sta_lock, flags); il3945_alloc_bcast_station()
2363 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE; il3945_alloc_bcast_station()
2364 il->stations[sta_id].used |= IL_STA_BCAST; il3945_alloc_bcast_station()
2365 spin_unlock_irqrestore(&il->sta_lock, flags); il3945_alloc_bcast_station()
2371 __il3945_up(struct il_priv *il) __il3945_up() argument
2375 rc = il3945_alloc_bcast_station(il); __il3945_up()
2379 if (test_bit(S_EXIT_PENDING, &il->status)) { __il3945_up()
2384 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) { __il3945_up()
2390 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) __il3945_up()
2391 clear_bit(S_RFKILL, &il->status); __il3945_up()
2393 set_bit(S_RFKILL, &il->status); __il3945_up()
2397 _il_wr(il, CSR_INT, 0xFFFFFFFF); __il3945_up()
2399 rc = il3945_hw_nic_init(il); __il3945_up()
2406 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); __il3945_up()
2407 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); __il3945_up()
2410 _il_wr(il, CSR_INT, 0xFFFFFFFF); __il3945_up()
2411 il_enable_interrupts(il); __il3945_up()
2414 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); __il3945_up()
2415 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); __il3945_up()
2420 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr, __il3945_up()
2421 il->ucode_data.len); __il3945_up()
2424 if (test_bit(S_RFKILL, &il->status)) __il3945_up()
2432 rc = il->ops->load_ucode(il); __il3945_up()
2440 il3945_nic_start(il); __il3945_up()
2447 set_bit(S_EXIT_PENDING, &il->status); __il3945_up()
2448 __il3945_down(il); __il3945_up()
2449 clear_bit(S_EXIT_PENDING, &il->status); __il3945_up()
2466 struct il_priv *il = il3945_bg_init_alive_start() local
2469 mutex_lock(&il->mutex); il3945_bg_init_alive_start()
2470 if (test_bit(S_EXIT_PENDING, &il->status)) il3945_bg_init_alive_start()
2473 il3945_init_alive_start(il); il3945_bg_init_alive_start()
2475 mutex_unlock(&il->mutex); il3945_bg_init_alive_start()
2481 struct il_priv *il = il3945_bg_alive_start() local
2484 mutex_lock(&il->mutex); il3945_bg_alive_start()
2485 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL) il3945_bg_alive_start()
2488 il3945_alive_start(il); il3945_bg_alive_start()
2490 mutex_unlock(&il->mutex); il3945_bg_alive_start()
2502 struct il_priv *il = il3945_rfkill_poll() local
2504 bool old_rfkill = test_bit(S_RFKILL, &il->status); il3945_rfkill_poll()
2506 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); il3945_rfkill_poll()
2510 set_bit(S_RFKILL, &il->status); il3945_rfkill_poll()
2512 clear_bit(S_RFKILL, &il->status); il3945_rfkill_poll()
2514 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill); il3945_rfkill_poll()
2522 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, il3945_rfkill_poll()
2528 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) il3945_request_scan() argument
2542 lockdep_assert_held(&il->mutex); il3945_request_scan()
2544 if (!il->scan_cmd) { il3945_request_scan()
2545 il->scan_cmd = il3945_request_scan()
2548 if (!il->scan_cmd) { il3945_request_scan()
2553 scan = il->scan_cmd; il3945_request_scan()
2559 if (il_is_associated(il)) { il3945_request_scan()
2589 if (il->scan_request->n_ssids) { il3945_request_scan()
2592 for (i = 0; i < il->scan_request->n_ssids; i++) { il3945_request_scan()
2594 if (!il->scan_request->ssids[i].ssid_len) il3945_request_scan()
2598 il->scan_request->ssids[i].ssid_len; il3945_request_scan()
2600 il->scan_request->ssids[i].ssid, il3945_request_scan()
2601 il->scan_request->ssids[i].ssid_len); il3945_request_scan()
2612 scan->tx_cmd.sta_id = il->hw_params.bcast_id; il3945_request_scan()
2617 switch (il->scan_band) { il3945_request_scan()
2641 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, il3945_request_scan()
2642 vif->addr, il->scan_request->ie, il3945_request_scan()
2643 il->scan_request->ie_len, il3945_request_scan()
2648 scan->flags |= il3945_get_antenna_flags(il); il3945_request_scan()
2651 il3945_get_channels_for_scan(il, band, is_active, n_probes, il3945_request_scan()
2664 set_bit(S_SCAN_HW, &il->status); il3945_request_scan()
2665 ret = il_send_cmd_sync(il, &cmd); il3945_request_scan()
2667 clear_bit(S_SCAN_HW, &il->status); il3945_request_scan()
2672 il3945_post_scan(struct il_priv *il) il3945_post_scan() argument
2678 if (memcmp(&il->staging, &il->active, sizeof(il->staging))) il3945_post_scan()
2679 il3945_commit_rxon(il); il3945_post_scan()
2685 struct il_priv *il = container_of(data, struct il_priv, restart); il3945_bg_restart() local
2687 if (test_bit(S_EXIT_PENDING, &il->status)) il3945_bg_restart()
2690 if (test_and_clear_bit(S_FW_ERROR, &il->status)) { il3945_bg_restart()
2691 mutex_lock(&il->mutex); il3945_bg_restart()
2692 il->is_open = 0; il3945_bg_restart()
2693 mutex_unlock(&il->mutex); il3945_bg_restart()
2694 il3945_down(il); il3945_bg_restart()
2695 ieee80211_restart_hw(il->hw); il3945_bg_restart()
2697 il3945_down(il); il3945_bg_restart()
2699 mutex_lock(&il->mutex); il3945_bg_restart()
2700 if (test_bit(S_EXIT_PENDING, &il->status)) { il3945_bg_restart()
2701 mutex_unlock(&il->mutex); il3945_bg_restart()
2705 __il3945_up(il); il3945_bg_restart()
2706 mutex_unlock(&il->mutex); il3945_bg_restart()
2713 struct il_priv *il = container_of(data, struct il_priv, rx_replenish); il3945_bg_rx_replenish() local
2715 mutex_lock(&il->mutex); il3945_bg_rx_replenish()
2716 if (test_bit(S_EXIT_PENDING, &il->status)) il3945_bg_rx_replenish()
2719 il3945_rx_replenish(il); il3945_bg_rx_replenish()
2721 mutex_unlock(&il->mutex); il3945_bg_rx_replenish()
2725 il3945_post_associate(struct il_priv *il) il3945_post_associate() argument
2730 if (!il->vif || !il->is_open) il3945_post_associate()
2733 D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid, il3945_post_associate()
2734 il->active.bssid_addr); il3945_post_associate()
2736 if (test_bit(S_EXIT_PENDING, &il->status)) il3945_post_associate()
2739 il_scan_cancel_timeout(il, 200); il3945_post_associate()
2741 conf = &il->hw->conf; il3945_post_associate()
2743 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; il3945_post_associate()
2744 il3945_commit_rxon(il); il3945_post_associate()
2746 rc = il_send_rxon_timing(il); il3945_post_associate()
2750 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; il3945_post_associate()
2752 il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid); il3945_post_associate()
2754 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid, il3945_post_associate()
2755 il->vif->bss_conf.beacon_int); il3945_post_associate()
2757 if (il->vif->bss_conf.use_short_preamble) il3945_post_associate()
2758 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; il3945_post_associate()
2760 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; il3945_post_associate()
2762 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { il3945_post_associate()
2763 if (il->vif->bss_conf.use_short_slot) il3945_post_associate()
2764 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; il3945_post_associate()
2766 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; il3945_post_associate()
2769 il3945_commit_rxon(il); il3945_post_associate()
2771 switch (il->vif->type) { il3945_post_associate()
2773 il3945_rate_scale_init(il->hw, IL_AP_ID); il3945_post_associate()
2776 il3945_send_beacon_cmd(il); il3945_post_associate()
2780 il->vif->type); il3945_post_associate()
2796 struct il_priv *il = hw->priv; il3945_mac_start() local
2800 mutex_lock(&il->mutex); il3945_mac_start()
2806 if (!il->ucode_code.len) { il3945_mac_start()
2807 ret = il3945_read_ucode(il); il3945_mac_start()
2810 mutex_unlock(&il->mutex); il3945_mac_start()
2815 ret = __il3945_up(il); il3945_mac_start()
2817 mutex_unlock(&il->mutex); il3945_mac_start()
2826 ret = wait_event_timeout(il->wait_command_queue, il3945_mac_start()
2827 test_bit(S_READY, &il->status), il3945_mac_start()
2830 if (!test_bit(S_READY, &il->status)) { il3945_mac_start()
2840 cancel_delayed_work(&il->_3945.rfkill_poll); il3945_mac_start()
2842 il->is_open = 1; il3945_mac_start()
2847 il->is_open = 0; il3945_mac_start()
2855 struct il_priv *il = hw->priv; il3945_mac_stop() local
2859 if (!il->is_open) { il3945_mac_stop()
2864 il->is_open = 0; il3945_mac_stop()
2866 il3945_down(il); il3945_mac_stop()
2868 flush_workqueue(il->workqueue); il3945_mac_stop()
2871 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, il3945_mac_stop()
2882 struct il_priv *il = hw->priv; il3945_mac_tx() local
2889 if (il3945_tx_skb(il, control->sta, skb)) il3945_mac_tx()
2896 il3945_config_ap(struct il_priv *il) il3945_config_ap() argument
2898 struct ieee80211_vif *vif = il->vif; il3945_config_ap()
2901 if (test_bit(S_EXIT_PENDING, &il->status)) il3945_config_ap()
2905 if (!(il_is_associated(il))) { il3945_config_ap()
2908 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; il3945_config_ap()
2909 il3945_commit_rxon(il); il3945_config_ap()
2912 rc = il_send_rxon_timing(il); il3945_config_ap()
2917 il->staging.assoc_id = 0; il3945_config_ap()
2920 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; il3945_config_ap()
2922 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; il3945_config_ap()
2924 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { il3945_config_ap()
2926 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; il3945_config_ap()
2928 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; il3945_config_ap()
2931 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; il3945_config_ap()
2932 il3945_commit_rxon(il); il3945_config_ap()
2934 il3945_send_beacon_cmd(il); il3945_config_ap()
2942 struct il_priv *il = hw->priv; il3945_mac_set_key() local
2964 static_key = !il_is_associated(il); il3945_mac_set_key()
2967 sta_id = il_sta_id_or_broadcast(il, sta); il3945_mac_set_key()
2974 mutex_lock(&il->mutex); il3945_mac_set_key()
2975 il_scan_cancel_timeout(il, 100); il3945_mac_set_key()
2980 ret = il3945_set_static_key(il, key); il3945_mac_set_key()
2982 ret = il3945_set_dynamic_key(il, key, sta_id); il3945_mac_set_key()
2987 ret = il3945_remove_static_key(il); il3945_mac_set_key()
2989 ret = il3945_clear_sta_key_info(il, sta_id); il3945_mac_set_key()
2997 mutex_unlock(&il->mutex); il3945_mac_set_key()
3006 struct il_priv *il = hw->priv; il3945_mac_sta_add() local
3012 mutex_lock(&il->mutex); il3945_mac_sta_add()
3016 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id); il3945_mac_sta_add()
3020 mutex_unlock(&il->mutex); il3945_mac_sta_add()
3028 il3945_rs_rate_init(il, sta, sta_id); il3945_mac_sta_add()
3029 mutex_unlock(&il->mutex); il3945_mac_sta_add()
3038 struct il_priv *il = hw->priv; il3945_configure_filter() local
3057 mutex_lock(&il->mutex); il3945_configure_filter()
3059 il->staging.filter_flags &= ~filter_nand; il3945_configure_filter()
3060 il->staging.filter_flags |= filter_or; il3945_configure_filter()
3068 mutex_unlock(&il->mutex); il3945_configure_filter()
3104 struct il_priv *il = dev_get_drvdata(d); il3945_show_debug_level() local
3105 return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); il3945_show_debug_level()
3112 struct il_priv *il = dev_get_drvdata(d); il3945_store_debug_level() local
3120 il->debug_level = val; il3945_store_debug_level()
3134 struct il_priv *il = dev_get_drvdata(d); il3945_show_temperature() local
3136 if (!il_is_alive(il)) il3945_show_temperature()
3139 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il)); il3945_show_temperature()
3147 struct il_priv *il = dev_get_drvdata(d); il3945_show_tx_power() local
3148 return sprintf(buf, "%d\n", il->tx_power_user_lmt); il3945_show_tx_power()
3155 struct il_priv *il = dev_get_drvdata(d); il3945_store_tx_power() local
3163 il3945_hw_reg_set_txpower(il, val); il3945_store_tx_power()
3174 struct il_priv *il = dev_get_drvdata(d); il3945_show_flags() local
3176 return sprintf(buf, "0x%04X\n", il->active.flags); il3945_show_flags()
3183 struct il_priv *il = dev_get_drvdata(d); il3945_store_flags() local
3186 mutex_lock(&il->mutex); il3945_store_flags()
3187 if (le32_to_cpu(il->staging.flags) != flags) { il3945_store_flags()
3189 if (il_scan_cancel_timeout(il, 100)) il3945_store_flags()
3193 il->staging.flags = cpu_to_le32(flags); il3945_store_flags()
3194 il3945_commit_rxon(il); il3945_store_flags()
3197 mutex_unlock(&il->mutex); il3945_store_flags()
3209 struct il_priv *il = dev_get_drvdata(d); il3945_show_filter_flags() local
3211 return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags)); il3945_show_filter_flags()
3218 struct il_priv *il = dev_get_drvdata(d); il3945_store_filter_flags() local
3221 mutex_lock(&il->mutex); il3945_store_filter_flags()
3222 if (le32_to_cpu(il->staging.filter_flags) != filter_flags) { il3945_store_filter_flags()
3224 if (il_scan_cancel_timeout(il, 100)) il3945_store_filter_flags()
3229 il->staging.filter_flags = cpu_to_le32(filter_flags); il3945_store_filter_flags()
3230 il3945_commit_rxon(il); il3945_store_filter_flags()
3233 mutex_unlock(&il->mutex); il3945_store_filter_flags()
3245 struct il_priv *il = dev_get_drvdata(d); il3945_show_measurement() local
3251 spin_lock_irqsave(&il->lock, flags); il3945_show_measurement()
3252 if (!(il->measurement_status & MEASUREMENT_READY)) { il3945_show_measurement()
3253 spin_unlock_irqrestore(&il->lock, flags); il3945_show_measurement()
3256 memcpy(&measure_report, &il->measure_report, size); il3945_show_measurement()
3257 il->measurement_status = 0; il3945_show_measurement()
3258 spin_unlock_irqrestore(&il->lock, flags); il3945_show_measurement()
3278 struct il_priv *il = dev_get_drvdata(d); il3945_store_measurement() local
3280 .channel = le16_to_cpu(il->active.channel), il3945_store_measurement()
3281 .start_time = cpu_to_le64(il->_3945.last_tsf), il3945_store_measurement()
3304 il3945_get_measurement(il, ¶ms, type); il3945_store_measurement()
3316 struct il_priv *il = dev_get_drvdata(d); il3945_store_retry_rate() local
3318 il->retry_rate = simple_strtoul(buf, NULL, 0); il3945_store_retry_rate()
3319 if (il->retry_rate <= 0) il3945_store_retry_rate()
3320 il->retry_rate = 1; il3945_store_retry_rate()
3329 struct il_priv *il = dev_get_drvdata(d); il3945_show_retry_rate() local
3330 return sprintf(buf, "%d", il->retry_rate); il3945_show_retry_rate()
3348 struct il_priv *il = dev_get_drvdata(d); il3945_show_antenna() local
3350 if (!il_is_alive(il)) il3945_show_antenna()
3360 struct il_priv *il __maybe_unused = dev_get_drvdata(d); il3945_store_antenna()
3386 struct il_priv *il = dev_get_drvdata(d); il3945_show_status() local
3387 if (!il_is_alive(il)) il3945_show_status()
3389 return sprintf(buf, "0x%08x\n", (int)il->status); il3945_show_status()
3398 struct il_priv *il = dev_get_drvdata(d); il3945_dump_error_log() local
3402 il3945_dump_nic_error_log(il); il3945_dump_error_log()
3416 il3945_setup_deferred_work(struct il_priv *il) il3945_setup_deferred_work() argument
3418 il->workqueue = create_singlethread_workqueue(DRV_NAME); il3945_setup_deferred_work()
3420 init_waitqueue_head(&il->wait_command_queue); il3945_setup_deferred_work()
3422 INIT_WORK(&il->restart, il3945_bg_restart); il3945_setup_deferred_work()
3423 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish); il3945_setup_deferred_work()
3424 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start); il3945_setup_deferred_work()
3425 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start); il3945_setup_deferred_work()
3426 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll); il3945_setup_deferred_work()
3428 il_setup_scan_deferred_work(il); il3945_setup_deferred_work()
3430 il3945_hw_setup_deferred_work(il); il3945_setup_deferred_work()
3432 setup_timer(&il->watchdog, il_bg_watchdog, (unsigned long)il); il3945_setup_deferred_work()
3434 tasklet_init(&il->irq_tasklet, il3945_setup_deferred_work()
3436 (unsigned long)il); il3945_setup_deferred_work()
3440 il3945_cancel_deferred_work(struct il_priv *il) il3945_cancel_deferred_work() argument
3442 il3945_hw_cancel_deferred_work(il); il3945_cancel_deferred_work()
3444 cancel_delayed_work_sync(&il->init_alive_start); il3945_cancel_deferred_work()
3445 cancel_delayed_work(&il->alive_start); il3945_cancel_deferred_work()
3447 il_cancel_scan_deferred_work(il); il3945_cancel_deferred_work()
3493 il3945_init_drv(struct il_priv *il) il3945_init_drv() argument
3496 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_init_drv()
3498 il->retry_rate = 1; il3945_init_drv()
3499 il->beacon_skb = NULL; il3945_init_drv()
3501 spin_lock_init(&il->sta_lock); il3945_init_drv()
3502 spin_lock_init(&il->hcmd_lock); il3945_init_drv()
3504 INIT_LIST_HEAD(&il->free_frames); il3945_init_drv()
3506 mutex_init(&il->mutex); il3945_init_drv()
3508 il->ieee_channels = NULL; il3945_init_drv()
3509 il->ieee_rates = NULL; il3945_init_drv()
3510 il->band = IEEE80211_BAND_2GHZ; il3945_init_drv()
3512 il->iw_mode = NL80211_IFTYPE_STATION; il3945_init_drv()
3513 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; il3945_init_drv()
3516 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD; il3945_init_drv()
3524 ret = il_init_channel_map(il); il3945_init_drv()
3531 if (il3945_txpower_set_from_eeprom(il)) { il3945_init_drv()
3536 ret = il_init_geos(il); il3945_init_drv()
3541 il3945_init_hw_rates(il, il->ieee_rates); il3945_init_drv()
3546 il_free_channel_map(il); il3945_init_drv()
3554 il3945_setup_mac(struct il_priv *il) il3945_setup_mac() argument
3557 struct ieee80211_hw *hw = il->hw; il3945_setup_mac()
3583 if (il->bands[IEEE80211_BAND_2GHZ].n_channels) il3945_setup_mac()
3584 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = il3945_setup_mac()
3585 &il->bands[IEEE80211_BAND_2GHZ]; il3945_setup_mac()
3587 if (il->bands[IEEE80211_BAND_5GHZ].n_channels) il3945_setup_mac()
3588 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = il3945_setup_mac()
3589 &il->bands[IEEE80211_BAND_5GHZ]; il3945_setup_mac()
3591 il_leds_init(il); il3945_setup_mac()
3593 ret = ieee80211_register_hw(il->hw); il3945_setup_mac()
3598 il->mac80211_registered = 1; il3945_setup_mac()
3607 struct il_priv *il; il3945_pci_probe() local
3622 il = hw->priv; il3945_pci_probe()
3623 il->hw = hw; il3945_pci_probe()
3626 il->cmd_queue = IL39_CMD_QUEUE_NUM; il3945_pci_probe()
3638 il->cfg = cfg; il3945_pci_probe()
3639 il->ops = &il3945_ops; il3945_pci_probe()
3641 il->debugfs_ops = &il3945_debugfs_ops; il3945_pci_probe()
3643 il->pci_dev = pdev; il3945_pci_probe()
3644 il->inta_mask = CSR_INI_SET_MASK; il3945_pci_probe()
3668 pci_set_drvdata(pdev, il); il3945_pci_probe()
3676 il->hw_base = pci_ioremap_bar(pdev, 0); il3945_pci_probe()
3677 if (!il->hw_base) { il3945_pci_probe()
3684 D_INFO("pci_resource_base = %p\n", il->hw_base); il3945_pci_probe()
3693 spin_lock_init(&il->reg_lock); il3945_pci_probe()
3694 spin_lock_init(&il->lock); il3945_pci_probe()
3701 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); il3945_pci_probe()
3708 err = il_eeprom_init(il); il3945_pci_probe()
3714 eeprom = (struct il3945_eeprom *)il->eeprom; il3945_pci_probe()
3716 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address); il3945_pci_probe()
3722 err = il3945_hw_set_hw_params(il); il3945_pci_probe()
3729 * 6. Setup il il3945_pci_probe()
3732 err = il3945_init_drv(il); il3945_pci_probe()
3738 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name); il3945_pci_probe()
3744 spin_lock_irqsave(&il->lock, flags); il3945_pci_probe()
3745 il_disable_interrupts(il); il3945_pci_probe()
3746 spin_unlock_irqrestore(&il->lock, flags); il3945_pci_probe()
3748 pci_enable_msi(il->pci_dev); il3945_pci_probe()
3750 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); il3945_pci_probe()
3752 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); il3945_pci_probe()
3762 il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5]); il3945_pci_probe()
3763 il3945_setup_deferred_work(il); il3945_pci_probe()
3764 il3945_setup_handlers(il); il3945_pci_probe()
3765 il_power_initialize(il); il3945_pci_probe()
3771 il_enable_interrupts(il); il3945_pci_probe()
3773 err = il3945_setup_mac(il); il3945_pci_probe()
3777 err = il_dbgfs_register(il, DRV_NAME); il3945_pci_probe()
3783 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ); il3945_pci_probe()
3788 destroy_workqueue(il->workqueue); il3945_pci_probe()
3789 il->workqueue = NULL; il3945_pci_probe()
3792 free_irq(il->pci_dev->irq, il); il3945_pci_probe()
3794 pci_disable_msi(il->pci_dev); il3945_pci_probe()
3795 il_free_geos(il); il3945_pci_probe()
3796 il_free_channel_map(il); il3945_pci_probe()
3798 il3945_unset_hw_params(il); il3945_pci_probe()
3800 il_eeprom_free(il); il3945_pci_probe()
3802 iounmap(il->hw_base); il3945_pci_probe()
3808 ieee80211_free_hw(il->hw); il3945_pci_probe()
3816 struct il_priv *il = pci_get_drvdata(pdev); il3945_pci_remove() local
3819 if (!il) il3945_pci_remove()
3824 il_dbgfs_unregister(il); il3945_pci_remove()
3826 set_bit(S_EXIT_PENDING, &il->status); il3945_pci_remove()
3828 il_leds_exit(il); il3945_pci_remove()
3830 if (il->mac80211_registered) { il3945_pci_remove()
3831 ieee80211_unregister_hw(il->hw); il3945_pci_remove()
3832 il->mac80211_registered = 0; il3945_pci_remove()
3834 il3945_down(il); il3945_pci_remove()
3844 il_apm_stop(il); il3945_pci_remove()
3849 spin_lock_irqsave(&il->lock, flags); il3945_pci_remove()
3850 il_disable_interrupts(il); il3945_pci_remove()
3851 spin_unlock_irqrestore(&il->lock, flags); il3945_pci_remove()
3853 il3945_synchronize_irq(il); il3945_pci_remove()
3857 cancel_delayed_work_sync(&il->_3945.rfkill_poll); il3945_pci_remove()
3859 il3945_dealloc_ucode_pci(il); il3945_pci_remove()
3861 if (il->rxq.bd) il3945_pci_remove()
3862 il3945_rx_queue_free(il, &il->rxq); il3945_pci_remove()
3863 il3945_hw_txq_ctx_free(il); il3945_pci_remove()
3865 il3945_unset_hw_params(il); il3945_pci_remove()
3868 flush_workqueue(il->workqueue); il3945_pci_remove()
3871 * il->workqueue... so we can't take down the workqueue il3945_pci_remove()
3873 destroy_workqueue(il->workqueue); il3945_pci_remove()
3874 il->workqueue = NULL; il3945_pci_remove()
3876 free_irq(pdev->irq, il); il3945_pci_remove()
3879 iounmap(il->hw_base); il3945_pci_remove()
3883 il_free_channel_map(il); il3945_pci_remove()
3884 il_free_geos(il); il3945_pci_remove()
3885 kfree(il->scan_cmd); il3945_pci_remove()
3886 if (il->beacon_skb) il3945_pci_remove()
3887 dev_kfree_skb(il->beacon_skb); il3945_pci_remove()
3889 ieee80211_free_hw(il->hw); il3945_pci_remove()
|
| H A D | debug.c | 35 il_clear_traffic_stats(struct il_priv *il) il_clear_traffic_stats() argument
37 memset(&il->tx_stats, 0, sizeof(struct traffic_stats)); il_clear_traffic_stats()
38 memset(&il->rx_stats, 0, sizeof(struct traffic_stats)); il_clear_traffic_stats()
46 il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len) il_update_stats() argument
51 stats = &il->tx_stats; il_update_stats()
53 stats = &il->rx_stats; il_update_stats()
131 if (!debugfs_create_file(#name, mode, parent, il, \
235 struct il_priv *il = file->private_data; il_dbgfs_tx_stats_read() local
250 il_get_mgmt_string(cnt), il->tx_stats.mgmt[cnt]); il_dbgfs_tx_stats_read()
256 il_get_ctrl_string(cnt), il->tx_stats.ctrl[cnt]); il_dbgfs_tx_stats_read()
261 il->tx_stats.data_cnt); il_dbgfs_tx_stats_read()
264 il->tx_stats.data_bytes); il_dbgfs_tx_stats_read()
275 struct il_priv *il = file->private_data; il_dbgfs_clear_traffic_stats_write() local
286 il_clear_traffic_stats(il); il_dbgfs_clear_traffic_stats_write()
296 struct il_priv *il = file->private_data; il_dbgfs_rx_stats_read() local
311 il_get_mgmt_string(cnt), il->rx_stats.mgmt[cnt]); il_dbgfs_rx_stats_read()
317 il_get_ctrl_string(cnt), il->rx_stats.ctrl[cnt]); il_dbgfs_rx_stats_read()
322 il->rx_stats.data_cnt); il_dbgfs_rx_stats_read()
325 il->rx_stats.data_bytes); il_dbgfs_rx_stats_read()
344 struct il_priv *il = file->private_data; il_dbgfs_sram_read() local
348 if (!il->dbgfs_sram_offset && !il->dbgfs_sram_len) { il_dbgfs_sram_read()
349 il->dbgfs_sram_offset = 0x800000; il_dbgfs_sram_read()
350 if (il->ucode_type == UCODE_INIT) il_dbgfs_sram_read()
351 il->dbgfs_sram_len = il->ucode_init_data.len; il_dbgfs_sram_read()
353 il->dbgfs_sram_len = il->ucode_data.len; il_dbgfs_sram_read()
355 bufsz = 30 + il->dbgfs_sram_len * sizeof(char) * 10; il_dbgfs_sram_read()
361 il->dbgfs_sram_len); il_dbgfs_sram_read()
364 il->dbgfs_sram_offset); il_dbgfs_sram_read()
365 for (i = il->dbgfs_sram_len; i > 0; i -= 4) { il_dbgfs_sram_read()
367 il_read_targ_mem(il, il_dbgfs_sram_read()
368 il->dbgfs_sram_offset + il_dbgfs_sram_read()
369 il->dbgfs_sram_len - i); il_dbgfs_sram_read()
398 struct il_priv *il = file->private_data; il_dbgfs_sram_write() local
409 il->dbgfs_sram_offset = offset; il_dbgfs_sram_write()
410 il->dbgfs_sram_len = len; il_dbgfs_sram_write()
412 il->dbgfs_sram_offset = 0; il_dbgfs_sram_write()
413 il->dbgfs_sram_len = 0; il_dbgfs_sram_write()
423 struct il_priv *il = file->private_data; il_dbgfs_stations_read() local
425 int max_sta = il->hw_params.max_stations; il_dbgfs_stations_read()
430 const size_t bufsz = 30 + sizeof(char) * 500 * (il->num_stations); il_dbgfs_stations_read()
438 il->num_stations); il_dbgfs_stations_read()
441 station = &il->stations[i]; il_dbgfs_stations_read()
488 struct il_priv *il = file->private_data; il_dbgfs_nvm_read() local
493 size_t eeprom_len = il->cfg->eeprom_size; il_dbgfs_nvm_read()
501 ptr = il->eeprom; il_dbgfs_nvm_read()
513 eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION); il_dbgfs_nvm_read()
535 struct il_priv *il = file->private_data; il_dbgfs_channels_read() local
542 if (!test_bit(S_GEO_CONFIGURED, &il->status)) il_dbgfs_channels_read()
551 supp_band = il_get_hw_mode(il, IEEE80211_BAND_2GHZ); il_dbgfs_channels_read()
578 supp_band = il_get_hw_mode(il, IEEE80211_BAND_5GHZ); il_dbgfs_channels_read()
615 struct il_priv *il = file->private_data; il_dbgfs_status_read() local
622 test_bit(S_HCMD_ACTIVE, &il->status)); il_dbgfs_status_read()
625 test_bit(S_INT_ENABLED, &il->status)); il_dbgfs_status_read()
628 test_bit(S_RFKILL, &il->status)); il_dbgfs_status_read()
631 test_bit(S_CT_KILL, &il->status)); il_dbgfs_status_read()
634 test_bit(S_INIT, &il->status)); il_dbgfs_status_read()
637 test_bit(S_ALIVE, &il->status)); il_dbgfs_status_read()
640 test_bit(S_READY, &il->status)); il_dbgfs_status_read()
643 test_bit(S_TEMPERATURE, &il->status)); il_dbgfs_status_read()
646 test_bit(S_GEO_CONFIGURED, &il->status)); il_dbgfs_status_read()
649 test_bit(S_EXIT_PENDING, &il->status)); il_dbgfs_status_read()
652 test_bit(S_STATS, &il->status)); il_dbgfs_status_read()
655 test_bit(S_SCANNING, &il->status)); il_dbgfs_status_read()
658 test_bit(S_SCAN_ABORTING, &il->status)); il_dbgfs_status_read()
661 test_bit(S_SCAN_HW, &il->status)); il_dbgfs_status_read()
664 test_bit(S_POWER_PMI, &il->status)); il_dbgfs_status_read()
667 test_bit(S_FW_ERROR, &il->status)); il_dbgfs_status_read()
676 struct il_priv *il = file->private_data; il_dbgfs_interrupt_read() local
694 il->isr_stats.hw); il_dbgfs_interrupt_read()
697 il->isr_stats.sw); il_dbgfs_interrupt_read()
698 if (il->isr_stats.sw || il->isr_stats.hw) { il_dbgfs_interrupt_read()
702 il->isr_stats.err_code); il_dbgfs_interrupt_read()
707 il->isr_stats.sch); il_dbgfs_interrupt_read()
710 il->isr_stats.alive); il_dbgfs_interrupt_read()
715 il->isr_stats.rfkill); il_dbgfs_interrupt_read()
719 il->isr_stats.ctkill); il_dbgfs_interrupt_read()
723 il->isr_stats.wakeup); il_dbgfs_interrupt_read()
727 il->isr_stats.rx); il_dbgfs_interrupt_read()
729 if (il->isr_stats.handlers[cnt] > 0) il_dbgfs_interrupt_read()
734 il->isr_stats.handlers[cnt]); il_dbgfs_interrupt_read()
739 il->isr_stats.tx); il_dbgfs_interrupt_read()
743 il->isr_stats.unhandled); il_dbgfs_interrupt_read()
754 struct il_priv *il = file->private_data; il_dbgfs_interrupt_write() local
766 il_clear_isr_stats(il); il_dbgfs_interrupt_write()
775 struct il_priv *il = file->private_data; il_dbgfs_qos_read() local
787 il->qos_data.def_qos_parm.ac[i].cw_min, il_dbgfs_qos_read()
788 il->qos_data.def_qos_parm.ac[i].cw_max, il_dbgfs_qos_read()
789 il->qos_data.def_qos_parm.ac[i].aifsn, il_dbgfs_qos_read()
790 il->qos_data.def_qos_parm.ac[i].edca_txop); il_dbgfs_qos_read()
800 struct il_priv *il = file->private_data; il_dbgfs_disable_ht40_write() local
811 if (!il_is_any_associated(il)) il_dbgfs_disable_ht40_write()
812 il->disable_ht40 = ht40 ? true : false; il_dbgfs_disable_ht40_write()
826 struct il_priv *il = file->private_data; il_dbgfs_disable_ht40_read() local
833 il->disable_ht40 ? "Disabled" : "Enabled"); il_dbgfs_disable_ht40_read()
851 struct il_priv *il = file->private_data; il_dbgfs_tx_queue_read() local
859 sizeof(char) * 64 * il->cfg->num_of_queues; il_dbgfs_tx_queue_read()
861 if (!il->txq) { il_dbgfs_tx_queue_read()
869 for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { il_dbgfs_tx_queue_read()
870 txq = &il->txq[cnt]; il_dbgfs_tx_queue_read()
877 !!test_bit(cnt, il->queue_stopped), il_dbgfs_tx_queue_read()
886 atomic_read(&il->queue_stop_count[cnt])); il_dbgfs_tx_queue_read()
898 struct il_priv *il = file->private_data; il_dbgfs_rx_queue_read() local
899 struct il_rx_queue *rxq = &il->rxq; il_dbgfs_rx_queue_read()
926 struct il_priv *il = file->private_data; il_dbgfs_ucode_rx_stats_read() local
928 return il->debugfs_ops->rx_stats_read(file, user_buf, count, ppos); il_dbgfs_ucode_rx_stats_read()
935 struct il_priv *il = file->private_data; il_dbgfs_ucode_tx_stats_read() local
937 return il->debugfs_ops->tx_stats_read(file, user_buf, count, ppos); il_dbgfs_ucode_tx_stats_read()
944 struct il_priv *il = file->private_data; il_dbgfs_ucode_general_stats_read() local
946 return il->debugfs_ops->general_stats_read(file, user_buf, count, ppos); il_dbgfs_ucode_general_stats_read()
954 struct il_priv *il = file->private_data; il_dbgfs_sensitivity_read() local
962 data = &il->sensitivity_data; il_dbgfs_sensitivity_read()
1053 struct il_priv *il = file->private_data; il_dbgfs_chain_noise_read() local
1061 data = &il->chain_noise_data; il_dbgfs_chain_noise_read()
1123 struct il_priv *il = file->private_data; il_dbgfs_power_save_status_read() local
1130 _il_rd(il, CSR_GP_CNTRL) & CSR_GP_REG_POWER_SAVE_STATUS_MSK; il_dbgfs_power_save_status_read()
1148 struct il_priv *il = file->private_data; il_dbgfs_clear_ucode_stats_write() local
1161 mutex_lock(&il->mutex); il_dbgfs_clear_ucode_stats_write()
1162 il_send_stats_request(il, CMD_SYNC, true); il_dbgfs_clear_ucode_stats_write()
1163 mutex_unlock(&il->mutex); il_dbgfs_clear_ucode_stats_write()
1173 struct il_priv *il = file->private_data; il_dbgfs_rxon_flags_read() local
1177 len = sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.flags)); il_dbgfs_rxon_flags_read()
1186 struct il_priv *il = file->private_data; il_dbgfs_rxon_filter_flags_read() local
1191 sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags)); il_dbgfs_rxon_filter_flags_read()
1199 struct il_priv *il = file->private_data; il_dbgfs_fh_reg_read() local
1204 if (il->ops->dump_fh) { il_dbgfs_fh_reg_read()
1205 ret = pos = il->ops->dump_fh(il, &buf, true); il_dbgfs_fh_reg_read()
1222 struct il_priv *il = file->private_data; il_dbgfs_missed_beacon_read() local
1229 il->missed_beacon_threshold); il_dbgfs_missed_beacon_read()
1238 struct il_priv *il = file->private_data; il_dbgfs_missed_beacon_write() local
1252 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; il_dbgfs_missed_beacon_write()
1254 il->missed_beacon_threshold = missed; il_dbgfs_missed_beacon_write()
1264 struct il_priv *il = file->private_data; il_dbgfs_force_reset_read() local
1270 force_reset = &il->force_reset; il_dbgfs_force_reset_read()
1296 struct il_priv *il = file->private_data; il_dbgfs_force_reset_write() local
1298 ret = il_force_reset(il, true); il_dbgfs_force_reset_write()
1308 struct il_priv *il = file->private_data; il_dbgfs_wd_timeout_write() local
1322 il->cfg->wd_timeout = timeout; il_dbgfs_wd_timeout_write()
1323 il_setup_watchdog(il); il_dbgfs_wd_timeout_write()
1351 il_dbgfs_register(struct il_priv *il, const char *name) il_dbgfs_register() argument
1353 struct dentry *phyd = il->hw->wiphy->debugfsdir; il_dbgfs_register()
1360 il->debugfs_dir = dir_drv; il_dbgfs_register()
1394 if (il->cfg->sensitivity_calib_by_driver) il_dbgfs_register()
1396 if (il->cfg->chain_noise_calib_by_driver) il_dbgfs_register()
1401 if (il->cfg->sensitivity_calib_by_driver) il_dbgfs_register()
1403 &il->disable_sens_cal); il_dbgfs_register()
1404 if (il->cfg->chain_noise_calib_by_driver) il_dbgfs_register()
1406 &il->disable_chain_noise_cal); il_dbgfs_register()
1407 DEBUGFS_ADD_BOOL(disable_tx_power, dir_rf, &il->disable_tx_power_cal); il_dbgfs_register()
1412 il_dbgfs_unregister(il); il_dbgfs_register()
1422 il_dbgfs_unregister(struct il_priv *il) il_dbgfs_unregister() argument
1424 if (!il->debugfs_dir) il_dbgfs_unregister()
1427 debugfs_remove_recursive(il->debugfs_dir); il_dbgfs_unregister()
1428 il->debugfs_dir = NULL; il_dbgfs_unregister()
|
| H A D | 3945.c | 46 il3945_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd) il3945_send_led_cmd() argument
56 return il_send_cmd(il, &cmd); il3945_send_led_cmd()
118 il3945_disable_events(struct il_priv *il) il3945_disable_events() argument
174 base = le32_to_cpu(il->card_alive.log_event_table_ptr); il3945_disable_events()
180 disable_ptr = il_read_targ_mem(il, base + (4 * sizeof(u32))); il3945_disable_events()
181 array_size = il_read_targ_mem(il, base + (5 * sizeof(u32))); il3945_disable_events()
187 il_write_targ_mem(il, disable_ptr + (i * sizeof(u32)), il3945_disable_events()
253 il3945_rs_next_rate(struct il_priv *il, int rate) il3945_rs_next_rate() argument
257 switch (il->band) { il3945_rs_next_rate()
265 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) && il3945_rs_next_rate()
266 il_is_associated(il)) { il3945_rs_next_rate()
287 il3945_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) il3945_tx_queue_reclaim() argument
289 struct il_tx_queue *txq = &il->txq[txq_id]; il3945_tx_queue_reclaim()
299 ieee80211_tx_status_irqsafe(il->hw, skb); il3945_tx_queue_reclaim()
301 il->ops->txq_free_tfd(il, txq); il3945_tx_queue_reclaim()
305 txq_id != IL39_CMD_QUEUE_NUM && il->mac80211_registered) il3945_tx_queue_reclaim()
306 il_wake_queue(il, txq); il3945_tx_queue_reclaim()
313 il3945_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb) il3945_hdl_tx() argument
319 struct il_tx_queue *txq = &il->txq[txq_id]; il3945_hdl_tx()
341 il->iw_mode == NL80211_IFTYPE_STATION) { il3945_hdl_tx()
342 il_stop_queues_by_reason(il, IL_STOP_REASON_PASSIVE); il3945_hdl_tx()
370 il3945_tx_queue_reclaim(il, txq_id, idx); il3945_hdl_tx()
385 il3945_accumulative_stats(struct il_priv *il, __le32 * stats) il3945_accumulative_stats() argument
392 prev_stats = (__le32 *) &il->_3945.stats; il3945_accumulative_stats()
393 accum_stats = (u32 *) &il->_3945.accum_stats; il3945_accumulative_stats()
394 delta = (u32 *) &il->_3945.delta_stats; il3945_accumulative_stats()
395 max_delta = (u32 *) &il->_3945.max_delta; il3945_accumulative_stats()
411 il->_3945.accum_stats.general.temperature = il3945_accumulative_stats()
412 il->_3945.stats.general.temperature; il3945_accumulative_stats()
413 il->_3945.accum_stats.general.ttl_timestamp = il3945_accumulative_stats()
414 il->_3945.stats.general.ttl_timestamp; il3945_accumulative_stats()
419 il3945_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb) il3945_hdl_stats() argument
427 il3945_accumulative_stats(il, (__le32 *) &pkt->u.raw); il3945_hdl_stats()
430 memcpy(&il->_3945.stats, pkt->u.raw, sizeof(il->_3945.stats)); il3945_hdl_stats()
434 il3945_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb) il3945_hdl_c_stats() argument
441 memset(&il->_3945.accum_stats, 0, il3945_hdl_c_stats()
443 memset(&il->_3945.delta_stats, 0, il3945_hdl_c_stats()
445 memset(&il->_3945.max_delta, 0, il3945_hdl_c_stats()
450 il3945_hdl_stats(il, rxb); il3945_hdl_c_stats()
461 il3945_is_network_packet(struct il_priv *il, struct ieee80211_hdr *header) il3945_is_network_packet() argument
465 switch (il->iw_mode) { il3945_is_network_packet()
468 return ether_addr_equal_64bits(header->addr3, il->bssid); il3945_is_network_packet()
471 return ether_addr_equal_64bits(header->addr2, il->bssid); il3945_is_network_packet()
480 il3945_pass_packet_to_mac80211(struct il_priv *il, struct il_rx_buf *rxb, il3945_pass_packet_to_mac80211() argument
490 u32 fraglen = PAGE_SIZE << il->hw_params.rx_page_order; il3945_pass_packet_to_mac80211()
499 if (unlikely(!il->is_open)) { il3945_pass_packet_to_mac80211()
504 if (unlikely(test_bit(IL_STOP_REASON_PASSIVE, &il->stop_reason))) { il3945_pass_packet_to_mac80211()
505 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE); il3945_pass_packet_to_mac80211()
516 il_set_decrypted_flag(il, (struct ieee80211_hdr *)pkt, il3945_pass_packet_to_mac80211()
528 il->alloc_rxb_page--; il3945_pass_packet_to_mac80211()
531 il_update_stats(il, false, fc, len); il3945_pass_packet_to_mac80211()
534 ieee80211_rx(il->hw, skb); il3945_pass_packet_to_mac80211()
540 il3945_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb) il3945_hdl_rx() argument
595 network_packet = il3945_is_network_packet(il, header); il3945_hdl_rx()
602 il->_3945.last_beacon_time = il3945_hdl_rx()
604 il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp); il3945_hdl_rx()
605 il->_3945.last_rx_rssi = rx_status.signal; il3945_hdl_rx()
608 il3945_pass_packet_to_mac80211(il, rxb, &rx_status); il3945_hdl_rx()
612 il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq, il3945_hw_txq_attach_buf_to_tfd() argument
651 il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) il3945_hw_txq_free_tfd() argument
656 struct pci_dev *dev = il->pci_dev; il3945_hw_txq_free_tfd()
698 il3945_hw_build_tx_cmd_rate(struct il_priv *il, struct il_device_cmd *cmd, il3945_hw_build_tx_cmd_rate() argument
702 u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value; il3945_hw_build_tx_cmd_rate()
745 il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate) il3945_sync_sta() argument
753 spin_lock_irqsave(&il->sta_lock, flags_spin); il3945_sync_sta()
754 station = &il->stations[sta_id]; il3945_sync_sta()
759 il_send_add_sta(il, &station->sta, CMD_ASYNC); il3945_sync_sta()
760 spin_unlock_irqrestore(&il->sta_lock, flags_spin); il3945_sync_sta()
767 il3945_set_pwr_vmain(struct il_priv *il) il3945_set_pwr_vmain() argument
773 if (pci_pme_capable(il->pci_dev, PCI_D3cold)) { il3945_set_pwr_vmain()
774 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, il3945_set_pwr_vmain()
778 _il_poll_bit(il, CSR_GPIO_IN, il3945_set_pwr_vmain()
784 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, il3945_set_pwr_vmain()
788 _il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC, il3945_set_pwr_vmain()
793 il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq) il3945_rx_init() argument
795 il_wr(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma); il3945_rx_init()
796 il_wr(il, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma); il3945_rx_init()
797 il_wr(il, FH39_RCSR_WPTR(0), 0); il3945_rx_init()
798 il_wr(il, FH39_RCSR_CONFIG(0), il3945_rx_init()
810 il_rd(il, FH39_RSSR_CTRL); il3945_rx_init()
816 il3945_tx_reset(struct il_priv *il) il3945_tx_reset() argument
819 il_wr_prph(il, ALM_SCD_MODE_REG, 0x2); il3945_tx_reset()
822 il_wr_prph(il, ALM_SCD_ARASTAT_REG, 0x01); il3945_tx_reset()
825 il_wr_prph(il, ALM_SCD_TXFACT_REG, 0x3f); il3945_tx_reset()
827 il_wr_prph(il, ALM_SCD_SBYP_MODE_1_REG, 0x010000); il3945_tx_reset()
828 il_wr_prph(il, ALM_SCD_SBYP_MODE_2_REG, 0x030002); il3945_tx_reset()
829 il_wr_prph(il, ALM_SCD_TXF4MF_REG, 0x000004); il3945_tx_reset()
830 il_wr_prph(il, ALM_SCD_TXF5MF_REG, 0x000005); il3945_tx_reset()
832 il_wr(il, FH39_TSSR_CBB_BASE, il->_3945.shared_phys); il3945_tx_reset()
834 il_wr(il, FH39_TSSR_MSG_CONFIG, il3945_tx_reset()
852 il3945_txq_ctx_reset(struct il_priv *il) il3945_txq_ctx_reset() argument
856 il3945_hw_txq_ctx_free(il); il3945_txq_ctx_reset()
859 rc = il_alloc_txq_mem(il); il3945_txq_ctx_reset()
864 rc = il3945_tx_reset(il); il3945_txq_ctx_reset()
869 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { il3945_txq_ctx_reset()
870 rc = il_tx_queue_init(il, txq_id); il3945_txq_ctx_reset()
880 il3945_hw_txq_ctx_free(il); il3945_txq_ctx_reset()
890 il3945_apm_init(struct il_priv *il) il3945_apm_init() argument
892 int ret = il_apm_init(il); il3945_apm_init()
895 il_wr_prph(il, APMG_RTC_INT_MSK_REG, 0x0); il3945_apm_init()
896 il_wr_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF); il3945_apm_init()
899 il_set_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); il3945_apm_init()
901 il_clear_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); il3945_apm_init()
907 il3945_nic_config(struct il_priv *il) il3945_nic_config() argument
909 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_nic_config()
911 u8 rev_id = il->pci_dev->revision; il3945_nic_config()
913 spin_lock_irqsave(&il->lock, flags); il3945_nic_config()
922 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il3945_nic_config()
926 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il3945_nic_config()
932 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il3945_nic_config()
939 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il3945_nic_config()
943 il_clear_bit(il, CSR_HW_IF_CONFIG_REG, il3945_nic_config()
948 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il3945_nic_config()
955 il_set_bit(il, CSR_HW_IF_CONFIG_REG, il3945_nic_config()
958 spin_unlock_irqrestore(&il->lock, flags); il3945_nic_config()
968 il3945_hw_nic_init(struct il_priv *il) il3945_hw_nic_init() argument
972 struct il_rx_queue *rxq = &il->rxq; il3945_hw_nic_init()
974 spin_lock_irqsave(&il->lock, flags); il3945_hw_nic_init()
975 il3945_apm_init(il); il3945_hw_nic_init()
976 spin_unlock_irqrestore(&il->lock, flags); il3945_hw_nic_init()
978 il3945_set_pwr_vmain(il); il3945_hw_nic_init()
979 il3945_nic_config(il); il3945_hw_nic_init()
983 rc = il_rx_queue_alloc(il); il3945_hw_nic_init()
989 il3945_rx_queue_reset(il, rxq); il3945_hw_nic_init()
991 il3945_rx_replenish(il); il3945_hw_nic_init()
993 il3945_rx_init(il, rxq); il3945_hw_nic_init()
997 il_rx_queue_update_write_ptr(il, rxq); il3945_hw_nic_init()
1000 il_wr(il, FH39_RCSR_WPTR(0), rxq->write & ~7); il3945_hw_nic_init()
1002 rc = il3945_txq_ctx_reset(il); il3945_hw_nic_init()
1006 set_bit(S_INIT, &il->status); il3945_hw_nic_init()
1017 il3945_hw_txq_ctx_free(struct il_priv *il) il3945_hw_txq_ctx_free() argument
1022 if (il->txq) il3945_hw_txq_ctx_free()
1023 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) il3945_hw_txq_ctx_free()
1025 il_cmd_queue_free(il); il3945_hw_txq_ctx_free()
1027 il_tx_queue_free(il, txq_id); il3945_hw_txq_ctx_free()
1030 il_free_txq_mem(il); il3945_hw_txq_ctx_free()
1034 il3945_hw_txq_ctx_stop(struct il_priv *il) il3945_hw_txq_ctx_stop() argument
1039 _il_wr_prph(il, ALM_SCD_MODE_REG, 0); il3945_hw_txq_ctx_stop()
1040 _il_wr_prph(il, ALM_SCD_TXFACT_REG, 0); il3945_hw_txq_ctx_stop()
1043 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { il3945_hw_txq_ctx_stop()
1044 _il_wr(il, FH39_TCSR_CONFIG(txq_id), 0x0); il3945_hw_txq_ctx_stop()
1045 _il_poll_bit(il, FH39_TSSR_TX_STATUS, il3945_hw_txq_ctx_stop()
1072 il3945_hw_get_temperature(struct il_priv *il) il3945_hw_get_temperature() argument
1074 return _il_rd(il, CSR_UCODE_DRV_GP2); il3945_hw_get_temperature()
1082 il3945_hw_reg_txpower_get_temperature(struct il_priv *il) il3945_hw_reg_txpower_get_temperature() argument
1084 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_hw_reg_txpower_get_temperature()
1087 temperature = il3945_hw_get_temperature(il); il3945_hw_reg_txpower_get_temperature()
1099 if (il->last_temperature > 100) il3945_hw_reg_txpower_get_temperature()
1102 temperature = il->last_temperature; il3945_hw_reg_txpower_get_temperature()
1120 il3945_is_temp_calib_needed(struct il_priv *il) il3945_is_temp_calib_needed() argument
1124 il->temperature = il3945_hw_reg_txpower_get_temperature(il); il3945_is_temp_calib_needed()
1125 temp_diff = il->temperature - il->last_temperature; il3945_is_temp_calib_needed()
1146 il->last_temperature = il->temperature; il3945_is_temp_calib_needed()
1339 il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx, s32 rate_idx, il3945_hw_reg_set_scan_power() argument
1354 power = min(power, il->tx_power_user_lmt); il3945_hw_reg_set_scan_power()
1396 il3945_send_tx_power(struct il_priv *il) il3945_send_tx_power() argument
1401 .channel = il->active.channel, il3945_send_tx_power()
1406 (test_bit(S_SCAN_HW, &il->status), il3945_send_tx_power()
1410 chan = le16_to_cpu(il->active.channel); il3945_send_tx_power()
1412 txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1; il3945_send_tx_power()
1413 ch_info = il_get_channel_info(il, il->band, chan); il3945_send_tx_power()
1416 il->band); il3945_send_tx_power()
1450 return il_send_cmd_pdu(il, C_TX_PWR_TBL, il3945_send_tx_power()
1473 il3945_hw_reg_set_new_power(struct il_priv *il, struct il_channel_info *ch_info) il3945_hw_reg_set_new_power() argument
1482 clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers; il3945_hw_reg_set_new_power()
1565 il3945_hw_reg_comp_txpower_temp(struct il_priv *il) il3945_hw_reg_comp_txpower_temp() argument
1568 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_hw_reg_comp_txpower_temp()
1576 int temperature = il->temperature; il3945_hw_reg_comp_txpower_temp()
1578 if (il->disable_tx_power_cal || test_bit(S_SCANNING, &il->status)) { il3945_hw_reg_comp_txpower_temp()
1583 for (i = 0; i < il->channel_count; i++) { il3945_hw_reg_comp_txpower_temp()
1584 ch_info = &il->channel_info[i]; il3945_hw_reg_comp_txpower_temp()
1613 il->_3945.clip_groups[ch_info->group_idx].clip_powers; il3945_hw_reg_comp_txpower_temp()
1621 il3945_hw_reg_set_scan_power(il, scan_tbl_idx, il3945_hw_reg_comp_txpower_temp()
1628 return il->ops->send_tx_power(il); il3945_hw_reg_comp_txpower_temp()
1632 il3945_hw_reg_set_txpower(struct il_priv *il, s8 power) il3945_hw_reg_set_txpower() argument
1639 if (il->tx_power_user_lmt == power) { il3945_hw_reg_set_txpower()
1646 il->tx_power_user_lmt = power; il3945_hw_reg_set_txpower()
1650 for (i = 0; i < il->channel_count; i++) { il3945_hw_reg_set_txpower()
1651 ch_info = &il->channel_info[i]; il3945_hw_reg_set_txpower()
1662 il3945_hw_reg_set_new_power(il, ch_info); il3945_hw_reg_set_txpower()
1668 il3945_is_temp_calib_needed(il); il3945_hw_reg_set_txpower()
1669 il3945_hw_reg_comp_txpower_temp(il); il3945_hw_reg_set_txpower()
1675 il3945_send_rxon_assoc(struct il_priv *il) il3945_send_rxon_assoc() argument
1686 const struct il_rxon_cmd *rxon1 = &il->staging; il3945_send_rxon_assoc()
1687 const struct il_rxon_cmd *rxon2 = &il->active; il3945_send_rxon_assoc()
1697 rxon_assoc.flags = il->staging.flags; il3945_send_rxon_assoc()
1698 rxon_assoc.filter_flags = il->staging.filter_flags; il3945_send_rxon_assoc()
1699 rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates; il3945_send_rxon_assoc()
1700 rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates; il3945_send_rxon_assoc()
1703 rc = il_send_cmd_sync(il, &cmd); il3945_send_rxon_assoc()
1713 il_free_pages(il, cmd.reply_page); il3945_send_rxon_assoc()
1727 il3945_commit_rxon(struct il_priv *il) il3945_commit_rxon() argument
1730 struct il3945_rxon_cmd *active_rxon = (void *)&il->active; il3945_commit_rxon()
1731 struct il3945_rxon_cmd *staging_rxon = (void *)&il->staging; il3945_commit_rxon()
1735 if (test_bit(S_EXIT_PENDING, &il->status)) il3945_commit_rxon()
1738 if (!il_is_alive(il)) il3945_commit_rxon()
1746 staging_rxon->flags |= il3945_get_antenna_flags(il); il3945_commit_rxon()
1748 rc = il_check_rxon_cmd(il); il3945_commit_rxon()
1757 if (!il_full_rxon_required(il)) { il3945_commit_rxon()
1758 rc = il_send_rxon_assoc(il); il3945_commit_rxon()
1770 il_set_tx_power(il, il->tx_power_next, false); il3945_commit_rxon()
1778 if (il_is_associated(il) && new_assoc) { il3945_commit_rxon()
1788 rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), il3945_commit_rxon()
1789 &il->active); il3945_commit_rxon()
1799 il_clear_ucode_stations(il); il3945_commit_rxon()
1800 il_restore_stations(il); il3945_commit_rxon()
1814 il_set_rxon_hwcrypto(il, !il3945_mod_params.sw_crypto); il3945_commit_rxon()
1817 rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), il3945_commit_rxon()
1827 il_clear_ucode_stations(il); il3945_commit_rxon()
1828 il_restore_stations(il); il3945_commit_rxon()
1833 rc = il_set_tx_power(il, il->tx_power_next, true); il3945_commit_rxon()
1840 rc = il3945_init_hw_rate_table(il); il3945_commit_rxon()
1860 il3945_reg_txpower_periodic(struct il_priv *il) il3945_reg_txpower_periodic() argument
1864 if (!il3945_is_temp_calib_needed(il)) il3945_reg_txpower_periodic()
1870 il3945_hw_reg_comp_txpower_temp(il); il3945_reg_txpower_periodic()
1873 queue_delayed_work(il->workqueue, &il->_3945.thermal_periodic, il3945_reg_txpower_periodic()
1880 struct il_priv *il = container_of(work, struct il_priv, il3945_bg_reg_txpower_periodic() local
1883 mutex_lock(&il->mutex); il3945_bg_reg_txpower_periodic()
1884 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL) il3945_bg_reg_txpower_periodic()
1887 il3945_reg_txpower_periodic(il); il3945_bg_reg_txpower_periodic()
1889 mutex_unlock(&il->mutex); il3945_bg_reg_txpower_periodic()
1903 il3945_hw_reg_get_ch_grp_idx(struct il_priv *il, il3945_hw_reg_get_ch_grp_idx() argument
1906 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_hw_reg_get_ch_grp_idx()
1938 il3945_hw_reg_get_matched_power_idx(struct il_priv *il, s8 requested_power, il3945_hw_reg_get_matched_power_idx() argument
1942 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_hw_reg_get_matched_power_idx()
1988 il3945_hw_reg_init_channel_groups(struct il_priv *il) il3945_hw_reg_init_channel_groups() argument
1992 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_hw_reg_init_channel_groups()
2019 clip_pwrs = (s8 *) il->_3945.clip_groups[i].clip_powers; il3945_hw_reg_init_channel_groups()
2057 * Second pass (during init) to set up il->channel_info
2070 il3945_txpower_set_from_eeprom(struct il_priv *il) il3945_txpower_set_from_eeprom() argument
2074 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; il3945_txpower_set_from_eeprom()
2087 temperature = il3945_hw_reg_txpower_get_temperature(il); il3945_txpower_set_from_eeprom()
2088 il->last_temperature = temperature; il3945_txpower_set_from_eeprom()
2090 il3945_hw_reg_init_channel_groups(il); il3945_txpower_set_from_eeprom()
2093 for (i = 0, ch_info = il->channel_info; i < il->channel_count; il3945_txpower_set_from_eeprom()
2100 ch_info->group_idx = il3945_hw_reg_get_ch_grp_idx(il, ch_info); il3945_txpower_set_from_eeprom()
2104 il->_3945.clip_groups[ch_info->group_idx].clip_powers; il3945_txpower_set_from_eeprom()
2131 rc = il3945_hw_reg_get_matched_power_idx(il, pwr, il3945_txpower_set_from_eeprom()
2187 il3945_hw_reg_set_scan_power(il, scan_tbl_idx, il3945_txpower_set_from_eeprom()
2197 il3945_hw_rxq_stop(struct il_priv *il) il3945_hw_rxq_stop() argument
2201 _il_wr(il, FH39_RCSR_CONFIG(0), 0); il3945_hw_rxq_stop()
2202 ret = _il_poll_bit(il, FH39_RSSR_STATUS, il3945_hw_rxq_stop()
2213 il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq) il3945_hw_tx_queue_init() argument
2217 struct il3945_shared *shared_data = il->_3945.shared_virt; il3945_hw_tx_queue_init()
2221 il_wr(il, FH39_CBCC_CTRL(txq_id), 0); il3945_hw_tx_queue_init()
2222 il_wr(il, FH39_CBCC_BASE(txq_id), 0); il3945_hw_tx_queue_init()
2224 il_wr(il, FH39_TCSR_CONFIG(txq_id), il3945_hw_tx_queue_init()
2232 _il_rd(il, FH39_TSSR_CBB_BASE); il3945_hw_tx_queue_init()
2272 il3945_add_bssid_station(struct il_priv *il, const u8 * addr, u8 * sta_id_r) il3945_add_bssid_station() argument
2281 ret = il_add_station_common(il, addr, 0, NULL, &sta_id); il3945_add_bssid_station()
2290 spin_lock_irqsave(&il->sta_lock, flags); il3945_add_bssid_station()
2291 il->stations[sta_id].used |= IL_STA_LOCAL; il3945_add_bssid_station()
2292 spin_unlock_irqrestore(&il->sta_lock, flags); il3945_add_bssid_station()
2298 il3945_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif, il3945_manage_ibss_station() argument
2306 il3945_add_bssid_station(il, vif->bss_conf.bssid, il3945_manage_ibss_station()
2311 il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id, il3945_manage_ibss_station()
2312 (il->band == il3945_manage_ibss_station()
2315 il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id); il3945_manage_ibss_station()
2320 return il_remove_station(il, vif_priv->ibss_bssid_sta_id, il3945_manage_ibss_station()
2328 il3945_init_hw_rate_table(struct il_priv *il) il3945_init_hw_rate_table() argument
2340 table[idx].try_cnt = il->retry_rate; il3945_init_hw_rate_table()
2345 switch (il->band) { il3945_init_hw_rate_table()
2367 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) && il3945_init_hw_rate_table()
2368 il_is_associated(il)) { il3945_init_hw_rate_table()
2388 rc = il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd); il3945_init_hw_rate_table()
2394 return il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd); il3945_init_hw_rate_table()
2399 il3945_hw_set_hw_params(struct il_priv *il) il3945_hw_set_hw_params() argument
2401 memset((void *)&il->hw_params, 0, sizeof(struct il_hw_params)); il3945_hw_set_hw_params()
2403 il->_3945.shared_virt = il3945_hw_set_hw_params()
2404 dma_alloc_coherent(&il->pci_dev->dev, sizeof(struct il3945_shared), il3945_hw_set_hw_params()
2405 &il->_3945.shared_phys, GFP_KERNEL); il3945_hw_set_hw_params()
2406 if (!il->_3945.shared_virt) il3945_hw_set_hw_params()
2409 il->hw_params.bcast_id = IL3945_BROADCAST_ID; il3945_hw_set_hw_params()
2412 il->hw_params.max_txq_num = il->cfg->num_of_queues; il3945_hw_set_hw_params()
2414 il->hw_params.tfd_size = sizeof(struct il3945_tfd); il3945_hw_set_hw_params()
2415 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K); il3945_hw_set_hw_params()
2416 il->hw_params.max_rxq_size = RX_QUEUE_SIZE; il3945_hw_set_hw_params()
2417 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; il3945_hw_set_hw_params()
2418 il->hw_params.max_stations = IL3945_STATION_COUNT; il3945_hw_set_hw_params()
2420 il->sta_key_max_num = STA_KEY_MAX_NUM; il3945_hw_set_hw_params()
2422 il->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR; il3945_hw_set_hw_params()
2423 il->hw_params.max_beacon_itrvl = IL39_MAX_UCODE_BEACON_INTERVAL; il3945_hw_set_hw_params()
2424 il->hw_params.beacon_time_tsf_bits = IL3945_EXT_BEACON_TIME_POS; il3945_hw_set_hw_params()
2430 il3945_hw_get_beacon_cmd(struct il_priv *il, struct il3945_frame *frame, il3945_hw_get_beacon_cmd() argument
2439 tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id; il3945_hw_get_beacon_cmd()
2443 il3945_fill_beacon_frame(il, tx_beacon_cmd->frame, il3945_hw_get_beacon_cmd()
2463 il3945_hw_handler_setup(struct il_priv *il) il3945_hw_handler_setup() argument
2465 il->handlers[C_TX] = il3945_hdl_tx; il3945_hw_handler_setup()
2466 il->handlers[N_3945_RX] = il3945_hdl_rx; il3945_hw_handler_setup()
2470 il3945_hw_setup_deferred_work(struct il_priv *il) il3945_hw_setup_deferred_work() argument
2472 INIT_DELAYED_WORK(&il->_3945.thermal_periodic, il3945_hw_setup_deferred_work()
2477 il3945_hw_cancel_deferred_work(struct il_priv *il) il3945_hw_cancel_deferred_work() argument
2479 cancel_delayed_work(&il->_3945.thermal_periodic); il3945_hw_cancel_deferred_work()
2484 il3945_verify_bsm(struct il_priv *il) il3945_verify_bsm() argument
2486 __le32 *image = il->ucode_boot.v_addr; il3945_verify_bsm()
2487 u32 len = il->ucode_boot.len; il3945_verify_bsm()
2494 val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); il3945_verify_bsm()
2497 val = il_rd_prph(il, reg); il3945_verify_bsm()
2527 il3945_eeprom_acquire_semaphore(struct il_priv *il) il3945_eeprom_acquire_semaphore() argument
2529 _il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK); il3945_eeprom_acquire_semaphore()
2534 il3945_eeprom_release_semaphore(struct il_priv *il) il3945_eeprom_release_semaphore() argument
2572 il3945_load_bsm(struct il_priv *il) il3945_load_bsm() argument
2574 __le32 *image = il->ucode_boot.v_addr; il3945_load_bsm()
2575 u32 len = il->ucode_boot.len; il3945_load_bsm()
2596 pinst = il->ucode_init.p_addr; il3945_load_bsm()
2597 pdata = il->ucode_init_data.p_addr; il3945_load_bsm()
2598 inst_len = il->ucode_init.len; il3945_load_bsm()
2599 data_len = il->ucode_init_data.len; il3945_load_bsm()
2601 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); il3945_load_bsm()
2602 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); il3945_load_bsm()
2603 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); il3945_load_bsm()
2604 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); il3945_load_bsm()
2610 _il_wr_prph(il, reg_offset, le32_to_cpu(*image)); il3945_load_bsm()
2612 rc = il3945_verify_bsm(il); il3945_load_bsm()
2617 il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); il3945_load_bsm()
2618 il_wr_prph(il, BSM_WR_MEM_DST_REG, IL39_RTC_INST_LOWER_BOUND); il3945_load_bsm()
2619 il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); il3945_load_bsm()
2623 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START); il3945_load_bsm()
2627 done = il_rd_prph(il, BSM_WR_CTRL_REG); il3945_load_bsm()
2641 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); il3945_load_bsm()
|
| H A D | common.h | 46 #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a)
47 #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a)
48 #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a)
116 void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
428 int il_eeprom_init(struct il_priv *il);
429 void il_eeprom_free(struct il_priv *il);
430 const u8 *il_eeprom_query_addr(const struct il_priv *il, size_t offset);
431 u16 il_eeprom_query16(const struct il_priv *il, size_t offset);
432 int il_init_channel_map(struct il_priv *il);
433 void il_free_channel_map(struct il_priv *il);
434 const struct il_channel_info *il_get_channel_info(const struct il_priv *il,
580 void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
861 void il4965_update_chain_flags(struct il_priv *il);
1147 void (*handlers[IL_CN_MAX]) (struct il_priv *il,
1442 il_txq_ctx_activate(struct il_priv *il, int txq_id) il_txq_ctx_activate() argument
1444 set_bit(txq_id, &il->txq_ctx_active_msk); il_txq_ctx_activate()
1448 il_txq_ctx_deactivate(struct il_priv *il, int txq_id) il_txq_ctx_deactivate() argument
1450 clear_bit(txq_id, &il->txq_ctx_active_msk); il_txq_ctx_deactivate()
1454 il_is_associated(struct il_priv *il) il_is_associated() argument
1456 return (il->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; il_is_associated()
1460 il_is_any_associated(struct il_priv *il) il_is_any_associated() argument
1462 return il_is_associated(il); il_is_any_associated()
1498 __il_free_pages(struct il_priv *il, struct page *page) __il_free_pages() argument
1500 __free_pages(page, il->hw_params.rx_page_order); __il_free_pages()
1501 il->alloc_rxb_page--; __il_free_pages()
1505 il_free_pages(struct il_priv *il, unsigned long page) il_free_pages() argument
1507 free_pages(page, il->hw_params.rx_page_order); il_free_pages()
1508 il->alloc_rxb_page--; il_free_pages()
1547 void (*txq_update_byte_cnt_tbl) (struct il_priv *il,
1550 int (*txq_attach_buf_to_tfd) (struct il_priv *il,
1553 void (*txq_free_tfd) (struct il_priv *il, struct il_tx_queue *txq);
1554 int (*txq_init) (struct il_priv *il, struct il_tx_queue *txq);
1556 void (*init_alive_start) (struct il_priv *il);
1560 int (*load_ucode) (struct il_priv *il);
1562 void (*dump_nic_error_log) (struct il_priv *il);
1563 int (*dump_fh) (struct il_priv *il, char **buf, bool display);
1564 int (*set_channel_switch) (struct il_priv *il,
1567 int (*apm_init) (struct il_priv *il);
1570 int (*send_tx_power) (struct il_priv *il);
1571 void (*update_chain_flags) (struct il_priv *il);
1574 int (*eeprom_acquire_semaphore) (struct il_priv *il);
1575 void (*eeprom_release_semaphore) (struct il_priv *il);
1577 int (*rxon_assoc) (struct il_priv *il);
1578 int (*commit_rxon) (struct il_priv *il);
1579 void (*set_rxon_chain) (struct il_priv *il);
1584 int (*request_scan) (struct il_priv *il, struct ieee80211_vif *vif);
1585 void (*post_scan) (struct il_priv *il);
1586 void (*post_associate) (struct il_priv *il);
1587 void (*config_ap) (struct il_priv *il);
1589 int (*update_bcast_stations) (struct il_priv *il);
1590 int (*manage_ibss_station) (struct il_priv *il,
1593 int (*send_led_cmd) (struct il_priv *il, struct il_led_cmd *led_cmd);
1626 void il_leds_init(struct il_priv *il);
1627 void il_leds_exit(struct il_priv *il);
1647 * if (IL_UCODE_API(il->ucode_ver) >= 2) {
1706 void il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt);
1707 int il_check_rxon_cmd(struct il_priv *il);
1708 int il_full_rxon_required(struct il_priv *il);
1709 int il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch);
1710 void il_set_flags_for_band(struct il_priv *il, enum ieee80211_band band,
1712 u8 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band);
1713 void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf);
1714 bool il_is_ht40_tx_allowed(struct il_priv *il,
1716 void il_connection_init_rx_config(struct il_priv *il);
1717 void il_set_rate(struct il_priv *il);
1718 int il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
1720 void il_irq_handle_error(struct il_priv *il);
1728 int il_alloc_txq_mem(struct il_priv *il);
1729 void il_free_txq_mem(struct il_priv *il);
1732 void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len);
1735 il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len) il_update_stats() argument
1743 void il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb);
1744 void il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb);
1745 void il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb);
1746 void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb);
1751 void il_cmd_queue_unmap(struct il_priv *il);
1752 void il_cmd_queue_free(struct il_priv *il);
1753 int il_rx_queue_alloc(struct il_priv *il);
1754 void il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q);
1756 void il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb);
1758 void il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb);
1759 void il_recover_from_stats(struct il_priv *il, struct il_rx_pkt *pkt);
1760 void il_chswitch_done(struct il_priv *il, bool is_success);
1765 void il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq);
1766 int il_tx_queue_init(struct il_priv *il, u32 txq_id);
1767 void il_tx_queue_reset(struct il_priv *il, u32 txq_id);
1768 void il_tx_queue_unmap(struct il_priv *il, int txq_id);
1769 void il_tx_queue_free(struct il_priv *il, int txq_id);
1770 void il_setup_watchdog(struct il_priv *il);
1774 int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force);
1780 u8 il_get_lowest_plcp(struct il_priv *il);
1785 void il_init_scan_params(struct il_priv *il);
1786 int il_scan_cancel(struct il_priv *il);
1787 int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms);
1788 void il_force_scan_end(struct il_priv *il);
1791 void il_internal_short_hw_scan(struct il_priv *il);
1792 int il_force_reset(struct il_priv *il, bool external);
1793 u16 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1795 void il_setup_rx_scan_handlers(struct il_priv *il);
1796 u16 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
1798 u16 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
1800 void il_setup_scan_deferred_work(struct il_priv *il);
1801 void il_cancel_scan_deferred_work(struct il_priv *il);
1819 int __must_check il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd);
1820 int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd);
1821 int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len,
1823 int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
1824 void (*callback) (struct il_priv *il,
1828 int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd);
1835 u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval);
1836 __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
1853 void il4965_dump_nic_error_log(struct il_priv *il);
1855 void il_print_rx_config_cmd(struct il_priv *il);
1858 il_print_rx_config_cmd(struct il_priv *il) il_print_rx_config_cmd() argument
1863 void il_clear_isr_stats(struct il_priv *il);
1868 int il_init_geos(struct il_priv *il);
1869 void il_free_geos(struct il_priv *il);
1893 il_is_ready(struct il_priv *il) il_is_ready() argument
1897 return test_bit(S_READY, &il->status) && il_is_ready()
1898 test_bit(S_GEO_CONFIGURED, &il->status) && il_is_ready()
1899 !test_bit(S_EXIT_PENDING, &il->status); il_is_ready()
1903 il_is_alive(struct il_priv *il) il_is_alive() argument
1905 return test_bit(S_ALIVE, &il->status); il_is_alive()
1909 il_is_init(struct il_priv *il) il_is_init() argument
1911 return test_bit(S_INIT, &il->status); il_is_init()
1915 il_is_rfkill(struct il_priv *il) il_is_rfkill() argument
1917 return test_bit(S_RFKILL, &il->status); il_is_rfkill()
1921 il_is_ctkill(struct il_priv *il) il_is_ctkill() argument
1923 return test_bit(S_CT_KILL, &il->status); il_is_ctkill()
1927 il_is_ready_rf(struct il_priv *il) il_is_ready_rf() argument
1930 if (il_is_rfkill(il)) il_is_ready_rf()
1933 return il_is_ready(il); il_is_ready_rf()
1936 void il_send_bt_config(struct il_priv *il);
1937 int il_send_stats_request(struct il_priv *il, u8 flags, bool clear);
1938 void il_apm_stop(struct il_priv *il);
1939 void _il_apm_stop(struct il_priv *il);
1941 int il_apm_init(struct il_priv *il);
1943 int il_send_rxon_timing(struct il_priv *il);
1946 il_send_rxon_assoc(struct il_priv *il) il_send_rxon_assoc() argument
1948 return il->ops->rxon_assoc(il); il_send_rxon_assoc()
1952 il_commit_rxon(struct il_priv *il) il_commit_rxon() argument
1954 return il->ops->commit_rxon(il); il_commit_rxon()
1958 il_get_hw_mode(struct il_priv *il, enum ieee80211_band band) il_get_hw_mode() argument
1960 return il->hw->wiphy->bands[band]; il_get_hw_mode()
1968 void il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
1975 bool _il_grab_nic_access(struct il_priv *il);
1976 int _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout);
1977 int il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout);
1978 u32 il_rd_prph(struct il_priv *il, u32 reg);
1979 void il_wr_prph(struct il_priv *il, u32 addr, u32 val);
1980 u32 il_read_targ_mem(struct il_priv *il, u32 addr);
1981 void il_write_targ_mem(struct il_priv *il, u32 addr, u32 val);
1983 static inline bool il_need_reclaim(struct il_priv *il, struct il_rx_pkt *pkt) il_need_reclaim() argument
1998 _il_write8(struct il_priv *il, u32 ofs, u8 val) _il_write8() argument
2000 writeb(val, il->hw_base + ofs); _il_write8()
2002 #define il_write8(il, ofs, val) _il_write8(il, ofs, val)
2005 _il_wr(struct il_priv *il, u32 ofs, u32 val) _il_wr() argument
2007 writel(val, il->hw_base + ofs); _il_wr()
2011 _il_rd(struct il_priv *il, u32 ofs) _il_rd() argument
2013 return readl(il->hw_base + ofs); _il_rd()
2017 _il_clear_bit(struct il_priv *il, u32 reg, u32 mask) _il_clear_bit() argument
2019 _il_wr(il, reg, _il_rd(il, reg) & ~mask); _il_clear_bit()
2023 _il_set_bit(struct il_priv *il, u32 reg, u32 mask) _il_set_bit() argument
2025 _il_wr(il, reg, _il_rd(il, reg) | mask); _il_set_bit()
2029 _il_release_nic_access(struct il_priv *il) _il_release_nic_access() argument
2031 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); _il_release_nic_access()
2042 il_rd(struct il_priv *il, u32 reg) il_rd() argument
2047 spin_lock_irqsave(&il->reg_lock, reg_flags); il_rd()
2048 _il_grab_nic_access(il); il_rd()
2049 value = _il_rd(il, reg); il_rd()
2050 _il_release_nic_access(il); il_rd()
2051 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_rd()
2056 il_wr(struct il_priv *il, u32 reg, u32 value) il_wr() argument
2060 spin_lock_irqsave(&il->reg_lock, reg_flags); il_wr()
2061 if (likely(_il_grab_nic_access(il))) { il_wr()
2062 _il_wr(il, reg, value); il_wr()
2063 _il_release_nic_access(il); il_wr()
2065 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_wr()
2069 _il_rd_prph(struct il_priv *il, u32 reg) _il_rd_prph() argument
2071 _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); _il_rd_prph()
2072 return _il_rd(il, HBUS_TARG_PRPH_RDAT); _il_rd_prph()
2076 _il_wr_prph(struct il_priv *il, u32 addr, u32 val) _il_wr_prph() argument
2078 _il_wr(il, HBUS_TARG_PRPH_WADDR, ((addr & 0x0000FFFF) | (3 << 24))); _il_wr_prph()
2079 _il_wr(il, HBUS_TARG_PRPH_WDAT, val); _il_wr_prph()
2083 il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask) il_set_bits_prph() argument
2087 spin_lock_irqsave(&il->reg_lock, reg_flags); il_set_bits_prph()
2088 if (likely(_il_grab_nic_access(il))) { il_set_bits_prph()
2089 _il_wr_prph(il, reg, (_il_rd_prph(il, reg) | mask)); il_set_bits_prph()
2090 _il_release_nic_access(il); il_set_bits_prph()
2092 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_set_bits_prph()
2096 il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask) il_set_bits_mask_prph() argument
2100 spin_lock_irqsave(&il->reg_lock, reg_flags); il_set_bits_mask_prph()
2101 if (likely(_il_grab_nic_access(il))) { il_set_bits_mask_prph()
2102 _il_wr_prph(il, reg, ((_il_rd_prph(il, reg) & mask) | bits)); il_set_bits_mask_prph()
2103 _il_release_nic_access(il); il_set_bits_mask_prph()
2105 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_set_bits_mask_prph()
2109 il_clear_bits_prph(struct il_priv *il, u32 reg, u32 mask) il_clear_bits_prph() argument
2114 spin_lock_irqsave(&il->reg_lock, reg_flags); il_clear_bits_prph()
2115 if (likely(_il_grab_nic_access(il))) { il_clear_bits_prph()
2116 val = _il_rd_prph(il, reg); il_clear_bits_prph()
2117 _il_wr_prph(il, reg, (val & ~mask)); il_clear_bits_prph()
2118 _il_release_nic_access(il); il_clear_bits_prph()
2120 spin_unlock_irqrestore(&il->reg_lock, reg_flags); il_clear_bits_prph()
2134 void il_restore_stations(struct il_priv *il);
2135 void il_clear_ucode_stations(struct il_priv *il);
2136 void il_dealloc_bcast_stations(struct il_priv *il);
2137 int il_get_free_ucode_key_idx(struct il_priv *il);
2138 int il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags);
2139 int il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
2141 int il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr);
2145 u8 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
2148 int il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
2153 * @il: iwl il struct
2161 il_clear_driver_stations(struct il_priv *il) il_clear_driver_stations() argument
2165 spin_lock_irqsave(&il->sta_lock, flags); il_clear_driver_stations()
2166 memset(il->stations, 0, sizeof(il->stations)); il_clear_driver_stations()
2167 il->num_stations = 0; il_clear_driver_stations()
2168 il->ucode_key_table = 0; il_clear_driver_stations()
2169 spin_unlock_irqrestore(&il->sta_lock, flags); il_clear_driver_stations()
2183 * @il: iwl il
2193 il_sta_id_or_broadcast(struct il_priv *il, struct ieee80211_sta *sta) il_sta_id_or_broadcast() argument
2198 return il->hw_params.bcast_id; il_sta_id_or_broadcast()
2278 _il_wake_queue(struct il_priv *il, u8 ac) _il_wake_queue() argument
2280 if (atomic_dec_return(&il->queue_stop_count[ac]) <= 0) _il_wake_queue()
2281 ieee80211_wake_queue(il->hw, ac); _il_wake_queue()
2285 _il_stop_queue(struct il_priv *il, u8 ac) _il_stop_queue() argument
2287 if (atomic_inc_return(&il->queue_stop_count[ac]) > 0) _il_stop_queue()
2288 ieee80211_stop_queue(il->hw, ac); _il_stop_queue()
2291 il_wake_queue(struct il_priv *il, struct il_tx_queue *txq) il_wake_queue() argument
2297 if (test_and_clear_bit(hwq, il->queue_stopped)) il_wake_queue()
2298 _il_wake_queue(il, ac); il_wake_queue()
2302 il_stop_queue(struct il_priv *il, struct il_tx_queue *txq) il_stop_queue() argument
2308 if (!test_and_set_bit(hwq, il->queue_stopped)) il_stop_queue()
2309 _il_stop_queue(il, ac); il_stop_queue()
2313 il_wake_queues_by_reason(struct il_priv *il, int reason) il_wake_queues_by_reason() argument
2317 if (test_and_clear_bit(reason, &il->stop_reason)) il_wake_queues_by_reason()
2319 _il_wake_queue(il, ac); il_wake_queues_by_reason()
2323 il_stop_queues_by_reason(struct il_priv *il, int reason) il_stop_queues_by_reason() argument
2327 if (!test_and_set_bit(reason, &il->stop_reason)) il_stop_queues_by_reason()
2329 _il_stop_queue(il, ac); il_stop_queues_by_reason()
2345 il_disable_interrupts(struct il_priv *il) il_disable_interrupts() argument
2347 clear_bit(S_INT_ENABLED, &il->status); il_disable_interrupts()
2350 _il_wr(il, CSR_INT_MASK, 0x00000000); il_disable_interrupts()
2354 _il_wr(il, CSR_INT, 0xffffffff); il_disable_interrupts()
2355 _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff); il_disable_interrupts()
2359 il_enable_rfkill_int(struct il_priv *il) il_enable_rfkill_int() argument
2361 _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL); il_enable_rfkill_int()
2365 il_enable_interrupts(struct il_priv *il) il_enable_interrupts() argument
2367 set_bit(S_INT_ENABLED, &il->status); il_enable_interrupts()
2368 _il_wr(il, CSR_INT_MASK, il->inta_mask); il_enable_interrupts()
2373 * @il -- pointer to il_priv data structure
2377 il_beacon_time_mask_low(struct il_priv *il, u16 tsf_bits) il_beacon_time_mask_low() argument
2384 * @il -- pointer to il_priv data structure
2388 il_beacon_time_mask_high(struct il_priv *il, u16 tsf_bits) il_beacon_time_mask_high() argument
2890 void il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
2892 void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
2917 int il_power_update_mode(struct il_priv *il, bool force);
2918 void il_power_initialize(struct il_priv *il);
2931 il_get_debug_level(struct il_priv *il) il_get_debug_level() argument
2933 if (il->debug_level) il_get_debug_level()
2934 return il->debug_level; il_get_debug_level()
2940 il_get_debug_level(struct il_priv *il) il_get_debug_level() argument
2946 #define il_print_hex_error(il, p, len) \
2955 if (il_get_debug_level(il) & level) \
2956 dev_err(&il->hw->wiphy->dev, "%c %s " fmt, \
2960 #define il_print_hex_dump(il, level, p, len) \
2962 if (il_get_debug_level(il) & level) \
2970 il_print_hex_dump(struct il_priv *il, int level, const void *p, u32 len) il_print_hex_dump() argument
2976 int il_dbgfs_register(struct il_priv *il, const char *name);
2977 void il_dbgfs_unregister(struct il_priv *il);
2980 il_dbgfs_register(struct il_priv *il, const char *name) il_dbgfs_register() argument
2986 il_dbgfs_unregister(struct il_priv *il) il_dbgfs_unregister() argument
|
| H A D | 3945-debug.c | 33 il3945_stats_flag(struct il_priv *il, char *buf, int bufsz) il3945_stats_flag() argument
38 le32_to_cpu(il->_3945.stats.flag)); il3945_stats_flag()
39 if (le32_to_cpu(il->_3945.stats.flag) & UCODE_STATS_CLEAR_MSK) il3945_stats_flag()
43 (le32_to_cpu(il->_3945.stats.flag) & il3945_stats_flag()
46 (le32_to_cpu(il->_3945.stats.flag) & il3945_stats_flag()
55 struct il_priv *il = file->private_data; il3945_ucode_rx_stats_read() local
67 if (!il_is_alive(il)) il3945_ucode_rx_stats_read()
81 ofdm = &il->_3945.stats.rx.ofdm; il3945_ucode_rx_stats_read()
82 cck = &il->_3945.stats.rx.cck; il3945_ucode_rx_stats_read()
83 general = &il->_3945.stats.rx.general; il3945_ucode_rx_stats_read()
84 accum_ofdm = &il->_3945.accum_stats.rx.ofdm; il3945_ucode_rx_stats_read()
85 accum_cck = &il->_3945.accum_stats.rx.cck; il3945_ucode_rx_stats_read()
86 accum_general = &il->_3945.accum_stats.rx.general; il3945_ucode_rx_stats_read()
87 delta_ofdm = &il->_3945.delta_stats.rx.ofdm; il3945_ucode_rx_stats_read()
88 delta_cck = &il->_3945.delta_stats.rx.cck; il3945_ucode_rx_stats_read()
89 delta_general = &il->_3945.delta_stats.rx.general; il3945_ucode_rx_stats_read()
90 max_ofdm = &il->_3945.max_delta.rx.ofdm; il3945_ucode_rx_stats_read()
91 max_cck = &il->_3945.max_delta.rx.cck; il3945_ucode_rx_stats_read()
92 max_general = &il->_3945.max_delta.rx.general; il3945_ucode_rx_stats_read()
94 pos += il3945_stats_flag(il, buf, bufsz); il3945_ucode_rx_stats_read()
320 struct il_priv *il = file->private_data; il3945_ucode_tx_stats_read() local
327 if (!il_is_alive(il)) il3945_ucode_tx_stats_read()
341 tx = &il->_3945.stats.tx; il3945_ucode_tx_stats_read()
342 accum_tx = &il->_3945.accum_stats.tx; il3945_ucode_tx_stats_read()
343 delta_tx = &il->_3945.delta_stats.tx; il3945_ucode_tx_stats_read()
344 max_tx = &il->_3945.max_delta.tx; il3945_ucode_tx_stats_read()
345 pos += il3945_stats_flag(il, buf, bufsz); il3945_ucode_tx_stats_read()
410 struct il_priv *il = file->private_data; il3945_ucode_general_stats_read() local
420 if (!il_is_alive(il)) il3945_ucode_general_stats_read()
434 general = &il->_3945.stats.general; il3945_ucode_general_stats_read()
435 dbg = &il->_3945.stats.general.dbg; il3945_ucode_general_stats_read()
436 div = &il->_3945.stats.general.div; il3945_ucode_general_stats_read()
437 accum_general = &il->_3945.accum_stats.general; il3945_ucode_general_stats_read()
438 delta_general = &il->_3945.delta_stats.general; il3945_ucode_general_stats_read()
439 max_general = &il->_3945.max_delta.general; il3945_ucode_general_stats_read()
440 accum_dbg = &il->_3945.accum_stats.general.dbg; il3945_ucode_general_stats_read()
441 delta_dbg = &il->_3945.delta_stats.general.dbg; il3945_ucode_general_stats_read()
442 max_dbg = &il->_3945.max_delta.general.dbg; il3945_ucode_general_stats_read()
443 accum_div = &il->_3945.accum_stats.general.div; il3945_ucode_general_stats_read()
444 delta_div = &il->_3945.delta_stats.general.div; il3945_ucode_general_stats_read()
445 max_div = &il->_3945.max_delta.general.div; il3945_ucode_general_stats_read()
446 pos += il3945_stats_flag(il, buf, bufsz); il3945_ucode_general_stats_read()
|
| H A D | 4965-calib.c | 95 il4965_sens_energy_cck(struct il_priv *il, u32 norm_fa, u32 rx_enable_time, il4965_sens_energy_cck() argument
120 const struct il_sensitivity_ranges *ranges = il->hw_params.sens; il4965_sens_energy_cck()
122 data = &(il->sensitivity_data); il4965_sens_energy_cck()
292 il4965_sens_auto_corr_ofdm(struct il_priv *il, u32 norm_fa, u32 rx_enable_time) il4965_sens_auto_corr_ofdm() argument
299 const struct il_sensitivity_ranges *ranges = il->hw_params.sens; il4965_sens_auto_corr_ofdm()
301 data = &(il->sensitivity_data); il4965_sens_auto_corr_ofdm()
355 il4965_prepare_legacy_sensitivity_tbl(struct il_priv *il, il4965_prepare_legacy_sensitivity_tbl() argument
393 il4965_sensitivity_write(struct il_priv *il) il4965_sensitivity_write() argument
404 data = &(il->sensitivity_data); il4965_sensitivity_write()
408 il4965_prepare_legacy_sensitivity_tbl(il, data, &cmd.table[0]); il4965_sensitivity_write()
415 (&cmd.table[0], &(il->sensitivity_tbl[0]), il4965_sensitivity_write()
422 memcpy(&(il->sensitivity_tbl[0]), &(cmd.table[0]), il4965_sensitivity_write()
425 return il_send_cmd(il, &cmd_out); il4965_sensitivity_write()
429 il4965_init_sensitivity(struct il_priv *il) il4965_init_sensitivity() argument
434 const struct il_sensitivity_ranges *ranges = il->hw_params.sens; il4965_init_sensitivity()
436 if (il->disable_sens_cal) il4965_init_sensitivity()
442 data = &(il->sensitivity_data); il4965_init_sensitivity()
479 ret |= il4965_sensitivity_write(il); il4965_init_sensitivity()
484 il4965_sensitivity_calibration(struct il_priv *il, void *resp) il4965_sensitivity_calibration() argument
499 if (il->disable_sens_cal) il4965_sensitivity_calibration()
502 data = &(il->sensitivity_data); il4965_sensitivity_calibration()
504 if (!il_is_any_associated(il)) { il4965_sensitivity_calibration()
509 spin_lock_irqsave(&il->lock, flags); il4965_sensitivity_calibration()
517 spin_unlock_irqrestore(&il->lock, flags); il4965_sensitivity_calibration()
538 spin_unlock_irqrestore(&il->lock, flags); il4965_sensitivity_calibration()
585 il4965_sens_auto_corr_ofdm(il, norm_fa_ofdm, rx_enable_time); il4965_sensitivity_calibration()
586 il4965_sens_energy_cck(il, norm_fa_cck, rx_enable_time, &statis); il4965_sensitivity_calibration()
588 il4965_sensitivity_write(il); il4965_sensitivity_calibration()
606 il4965_find_disconn_antenna(struct il_priv *il, u32 * average_sig, il4965_find_disconn_antenna() argument
618 il->cfg->chain_noise_num_beacons; il4965_find_disconn_antenna()
621 il->cfg->chain_noise_num_beacons; il4965_find_disconn_antenna()
624 il->cfg->chain_noise_num_beacons; il4965_find_disconn_antenna()
674 active_chains &= il->hw_params.valid_rx_ant; il4965_find_disconn_antenna()
679 * il->hw_setting.valid_tx_ant */ il4965_find_disconn_antenna()
681 if (!(il->hw_params.valid_tx_ant & ant_msk)) il4965_find_disconn_antenna()
688 if (num_tx_chains == il->hw_params.tx_chains_num && il4965_find_disconn_antenna()
695 il4965_find_first_chain(il->cfg->valid_tx_ant); il4965_find_disconn_antenna()
704 if (active_chains != il->hw_params.valid_rx_ant && il4965_find_disconn_antenna()
705 active_chains != il->chain_noise_data.active_chains) il4965_find_disconn_antenna()
708 il->hw_params.valid_rx_ant); il4965_find_disconn_antenna()
716 il4965_gain_computation(struct il_priv *il, u32 * average_noise, il4965_gain_computation() argument
721 struct il_chain_noise_data *data = &il->chain_noise_data; il4965_gain_computation()
756 ret = il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd); il4965_gain_computation()
775 il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) il4965_chain_noise_calibration() argument
797 if (il->disable_chain_noise_cal) il4965_chain_noise_calibration()
800 data = &(il->chain_noise_data); il4965_chain_noise_calibration()
812 spin_lock_irqsave(&il->lock, flags); il4965_chain_noise_calibration()
818 spin_unlock_irqrestore(&il->lock, flags); il4965_chain_noise_calibration()
822 rxon_band24 = !!(il->staging.flags & RXON_FLG_BAND_24G_MSK); il4965_chain_noise_calibration()
823 rxon_chnum = le16_to_cpu(il->staging.channel); il4965_chain_noise_calibration()
836 spin_unlock_irqrestore(&il->lock, flags); il4965_chain_noise_calibration()
855 spin_unlock_irqrestore(&il->lock, flags); il4965_chain_noise_calibration()
877 if (data->beacon_count != il->cfg->chain_noise_num_beacons) il4965_chain_noise_calibration()
881 il4965_find_disconn_antenna(il, average_sig, data); il4965_chain_noise_calibration()
885 data->chain_noise_a / il->cfg->chain_noise_num_beacons; il4965_chain_noise_calibration()
887 data->chain_noise_b / il->cfg->chain_noise_num_beacons; il4965_chain_noise_calibration()
889 data->chain_noise_c / il->cfg->chain_noise_num_beacons; il4965_chain_noise_calibration()
907 il4965_gain_computation(il, average_noise, min_average_noise_antenna_i, il4965_chain_noise_calibration()
909 il4965_find_first_chain(il->cfg->valid_rx_ant)); il4965_chain_noise_calibration()
914 if (il->ops->update_chain_flags) il4965_chain_noise_calibration()
915 il->ops->update_chain_flags(il); il4965_chain_noise_calibration()
918 il_power_update_mode(il, false); il4965_chain_noise_calibration()
922 il4965_reset_run_time_calib(struct il_priv *il) il4965_reset_run_time_calib() argument
925 memset(&(il->sensitivity_data), 0, sizeof(struct il_sensitivity_data)); il4965_reset_run_time_calib()
926 memset(&(il->chain_noise_data), 0, sizeof(struct il_chain_noise_data)); il4965_reset_run_time_calib()
928 il->chain_noise_data.delta_gain_code[i] = il4965_reset_run_time_calib()
933 il_send_stats_request(il, CMD_ASYNC, true); il4965_reset_run_time_calib()
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| H A D | 3945-rs.c | 155 struct il_priv *il __maybe_unused = rs_sta->il; il3945_rate_scale_flush_wins()
187 struct il_priv *il __maybe_unused = rs_sta->il; il3945_bg_rate_scale_flush()
261 struct il_priv *il __maybe_unused = rs_sta->il; il3945_collect_tx_data()
334 il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, u8 sta_id) il3945_rs_rate_init() argument
336 struct ieee80211_hw *hw = il->hw; il3945_rs_rate_init()
337 struct ieee80211_conf *conf = &il->hw->conf; il3945_rs_rate_init()
344 if (sta_id == il->hw_params.bcast_id) il3945_rs_rate_init()
351 rs_sta->il = il; il3945_rs_rate_init()
381 il->_3945.sta_supp_rates = sta->supp_rates[sband->band]; il3945_rs_rate_init()
385 il->_3945.sta_supp_rates <<= IL_FIRST_OFDM_RATE; il3945_rs_rate_init()
389 il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS; il3945_rs_rate_init()
402 il3945_rs_free(void *il) il3945_rs_free() argument
411 struct il_priv *il __maybe_unused = il_priv; il3945_rs_alloc_sta()
452 struct il_priv *il = (struct il_priv *)il_rate; il3945_rs_tx_status() local
470 D_RATE("leave: No STA il data to update!\n"); il3945_rs_tx_status()
475 if (!rs_sta->il) { il3945_rs_tx_status()
476 D_RATE("leave: STA il data uninitialized!\n"); il3945_rs_tx_status()
489 * il value 'retry_rate' vs. rate specific il3945_rs_tx_status()
496 if ((retries - 1) < il->retry_rate) { il3945_rs_tx_status()
500 current_count = il->retry_rate; il3945_rs_tx_status()
501 last_idx = il3945_rs_next_rate(il, scale_rate_idx); il3945_rs_tx_status()
548 struct il_priv *il __maybe_unused = rs_sta->il; il3945_get_adjacent_rate()
642 struct il_priv *il __maybe_unused = (struct il_priv *)il_r; il3945_rs_get_rate()
648 if (rs_sta && !rs_sta->il) { il3945_rs_get_rate()
864 il3945_add_debugfs(void *il, void *il_sta, struct dentry *dir) il3945_add_debugfs() argument
875 il3945_remove_debugfs(void *il, void *il_sta) il3945_remove_debugfs() argument
913 struct il_priv *il = hw->priv; il3945_rate_scale_init() local
924 sta = ieee80211_find_sta(il->vif, il->stations[sta_id].sta.sta.addr); il3945_rate_scale_init()
937 switch (il->band) { il3945_rate_scale_init()
940 if (il->active.flags & RXON_FLG_TGG_PROTECT_MSK) { il3945_rate_scale_init()
956 rssi = il->_3945.last_rx_rssi; il3945_rate_scale_init()
962 rs_sta->start_rate = il3945_get_rate_idx_by_rssi(rssi, il->band); il3945_rate_scale_init()
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| H A D | 3945.h | 78 struct il_priv *il; member in struct:il3945_rs_sta
194 void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq);
195 unsigned int il3945_fill_beacon_frame(struct il_priv *il,
197 int il3945_dump_nic_event_log(struct il_priv *il, bool full_log, char **buf,
199 void il3945_dump_nic_error_log(struct il_priv *il);
217 void il3945_hw_handler_setup(struct il_priv *il);
218 void il3945_hw_setup_deferred_work(struct il_priv *il);
219 void il3945_hw_cancel_deferred_work(struct il_priv *il);
220 int il3945_hw_rxq_stop(struct il_priv *il);
221 int il3945_hw_set_hw_params(struct il_priv *il);
222 int il3945_hw_nic_init(struct il_priv *il);
223 int il3945_hw_nic_stop_master(struct il_priv *il);
224 void il3945_hw_txq_ctx_free(struct il_priv *il);
225 void il3945_hw_txq_ctx_stop(struct il_priv *il);
226 int il3945_hw_nic_reset(struct il_priv *il);
227 int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq,
229 void il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq);
230 int il3945_hw_get_temperature(struct il_priv *il);
231 int il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq);
232 unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il,
234 void il3945_hw_build_tx_cmd_rate(struct il_priv *il, struct il_device_cmd *cmd,
237 int il3945_hw_reg_send_txpower(struct il_priv *il);
238 int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power);
239 void il3945_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb);
240 void il3945_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb);
241 void il3945_disable_events(struct il_priv *il);
242 int il4965_get_temperature(const struct il_priv *il);
243 void il3945_post_associate(struct il_priv *il);
244 void il3945_config_ap(struct il_priv *il);
246 int il3945_commit_rxon(struct il_priv *il);
256 u8 il3945_hw_find_station(struct il_priv *il, const u8 *bssid);
258 __le32 il3945_get_antenna_flags(const struct il_priv *il);
259 int il3945_init_hw_rate_table(struct il_priv *il);
260 void il3945_reg_txpower_periodic(struct il_priv *il);
261 int il3945_txpower_set_from_eeprom(struct il_priv *il);
263 int il3945_rs_next_rate(struct il_priv *il, int rate);
266 int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif);
267 void il3945_post_scan(struct il_priv *il);
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| H A D | 4965.h | 46 void il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid,
50 void il4965_set_rxon_chain(struct il_priv *il);
53 int il4965_verify_ucode(struct il_priv *il);
56 void il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status);
58 void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq);
59 int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq);
60 int il4965_hw_nic_init(struct il_priv *il);
61 int il4965_dump_fh(struct il_priv *il, char **buf, bool display);
63 void il4965_nic_config(struct il_priv *il);
66 void il4965_rx_queue_restock(struct il_priv *il);
67 void il4965_rx_replenish(struct il_priv *il);
68 void il4965_rx_replenish_now(struct il_priv *il);
69 void il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq);
70 int il4965_rxq_stop(struct il_priv *il);
72 void il4965_rx_handle(struct il_priv *il);
75 void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq);
76 int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq,
78 int il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq);
79 void il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags,
81 int il4965_tx_skb(struct il_priv *il,
84 int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
86 int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif,
88 int il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id);
89 int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx);
90 void il4965_hw_txq_ctx_free(struct il_priv *il);
91 int il4965_txq_ctx_alloc(struct il_priv *il);
92 void il4965_txq_ctx_reset(struct il_priv *il);
93 void il4965_txq_ctx_stop(struct il_priv *il);
94 void il4965_txq_set_sched(struct il_priv *il, u32 mask);
97 * Acquire il->lock before calling this function !
99 void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx);
105 * NOTE: Acquire il->lock before calling this function !
107 void il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq,
111 int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif);
114 int il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif,
118 int il4965_send_beacon_cmd(struct il_priv *il);
131 int il4965_alloc_bcast_station(struct il_priv *il);
132 int il4965_add_bssid_station(struct il_priv *il, const u8 *addr, u8 *sta_id_r);
133 int il4965_remove_default_wep_key(struct il_priv *il,
135 int il4965_set_default_wep_key(struct il_priv *il,
137 int il4965_restore_default_wep_keys(struct il_priv *il);
138 int il4965_set_dynamic_key(struct il_priv *il,
140 int il4965_remove_dynamic_key(struct il_priv *il,
142 void il4965_update_tkip_key(struct il_priv *il,
146 int il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid);
147 int il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta,
149 int il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta,
151 void il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt);
152 int il4965_update_bcast_stations(struct il_priv *il);
162 void il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac);
163 int il4965_eeprom_acquire_semaphore(struct il_priv *il);
164 void il4965_eeprom_release_semaphore(struct il_priv *il);
165 int il4965_eeprom_check_version(struct il_priv *il);
194 void il4965_led_enable(struct il_priv *il);
276 void il4965_temperature_calib(struct il_priv *il);
927 void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp);
928 void il4965_sensitivity_calibration(struct il_priv *il, void *resp);
929 void il4965_init_sensitivity(struct il_priv *il);
930 void il4965_reset_run_time_calib(struct il_priv *il);
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| H A D | 4965-debug.c | 37 il4965_stats_flag(struct il_priv *il, char *buf, int bufsz) il4965_stats_flag() argument
42 flag = le32_to_cpu(il->_4965.stats.flag); il4965_stats_flag()
62 struct il_priv *il = file->private_data; il4965_ucode_rx_stats_read() local
76 if (!il_is_alive(il)) il4965_ucode_rx_stats_read()
90 ofdm = &il->_4965.stats.rx.ofdm; il4965_ucode_rx_stats_read()
91 cck = &il->_4965.stats.rx.cck; il4965_ucode_rx_stats_read()
92 general = &il->_4965.stats.rx.general; il4965_ucode_rx_stats_read()
93 ht = &il->_4965.stats.rx.ofdm_ht; il4965_ucode_rx_stats_read()
94 accum_ofdm = &il->_4965.accum_stats.rx.ofdm; il4965_ucode_rx_stats_read()
95 accum_cck = &il->_4965.accum_stats.rx.cck; il4965_ucode_rx_stats_read()
96 accum_general = &il->_4965.accum_stats.rx.general; il4965_ucode_rx_stats_read()
97 accum_ht = &il->_4965.accum_stats.rx.ofdm_ht; il4965_ucode_rx_stats_read()
98 delta_ofdm = &il->_4965.delta_stats.rx.ofdm; il4965_ucode_rx_stats_read()
99 delta_cck = &il->_4965.delta_stats.rx.cck; il4965_ucode_rx_stats_read()
100 delta_general = &il->_4965.delta_stats.rx.general; il4965_ucode_rx_stats_read()
101 delta_ht = &il->_4965.delta_stats.rx.ofdm_ht; il4965_ucode_rx_stats_read()
102 max_ofdm = &il->_4965.max_delta.rx.ofdm; il4965_ucode_rx_stats_read()
103 max_cck = &il->_4965.max_delta.rx.cck; il4965_ucode_rx_stats_read()
104 max_general = &il->_4965.max_delta.rx.general; il4965_ucode_rx_stats_read()
105 max_ht = &il->_4965.max_delta.rx.ofdm_ht; il4965_ucode_rx_stats_read()
107 pos += il4965_stats_flag(il, buf, bufsz); il4965_ucode_rx_stats_read()
474 struct il_priv *il = file->private_data; il4965_ucode_tx_stats_read() local
481 if (!il_is_alive(il)) il4965_ucode_tx_stats_read()
494 tx = &il->_4965.stats.tx; il4965_ucode_tx_stats_read()
495 accum_tx = &il->_4965.accum_stats.tx; il4965_ucode_tx_stats_read()
496 delta_tx = &il->_4965.delta_stats.tx; il4965_ucode_tx_stats_read()
497 max_tx = &il->_4965.max_delta.tx; il4965_ucode_tx_stats_read()
499 pos += il4965_stats_flag(il, buf, bufsz); il4965_ucode_tx_stats_read()
640 struct il_priv *il = file->private_data; il4965_ucode_general_stats_read() local
650 if (!il_is_alive(il)) il4965_ucode_general_stats_read()
663 general = &il->_4965.stats.general.common; il4965_ucode_general_stats_read()
664 dbg = &il->_4965.stats.general.common.dbg; il4965_ucode_general_stats_read()
665 div = &il->_4965.stats.general.common.div; il4965_ucode_general_stats_read()
666 accum_general = &il->_4965.accum_stats.general.common; il4965_ucode_general_stats_read()
667 accum_dbg = &il->_4965.accum_stats.general.common.dbg; il4965_ucode_general_stats_read()
668 accum_div = &il->_4965.accum_stats.general.common.div; il4965_ucode_general_stats_read()
669 delta_general = &il->_4965.delta_stats.general.common; il4965_ucode_general_stats_read()
670 max_general = &il->_4965.max_delta.general.common; il4965_ucode_general_stats_read()
671 delta_dbg = &il->_4965.delta_stats.general.common.dbg; il4965_ucode_general_stats_read()
672 max_dbg = &il->_4965.max_delta.general.common.dbg; il4965_ucode_general_stats_read()
673 delta_div = &il->_4965.delta_stats.general.common.div; il4965_ucode_general_stats_read()
674 max_div = &il->_4965.max_delta.general.common.div; il4965_ucode_general_stats_read()
676 pos += il4965_stats_flag(il, buf, bufsz); il4965_ucode_general_stats_read()
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| H A D | 4965-rs.c | 141 static void il4965_rs_rate_scale_perform(struct il_priv *il,
145 static void il4965_rs_fill_link_cmd(struct il_priv *il,
353 il4965_rs_tl_turn_on_agg_for_tid(struct il_priv *il, struct il_lq_sta *lq_data, il4965_rs_tl_turn_on_agg_for_tid() argument
381 il4965_rs_tl_turn_on_agg(struct il_priv *il, u8 tid, struct il_lq_sta *lq_data, il4965_rs_tl_turn_on_agg() argument
385 il4965_rs_tl_turn_on_agg_for_tid(il, lq_data, tid, sta); il4965_rs_tl_turn_on_agg()
497 il4965_rate_n_flags_from_tbl(struct il_priv *il, struct il_scale_tbl_info *tbl, il4965_rate_n_flags_from_tbl() argument
643 il4965_rs_use_green(struct il_priv *il, struct ieee80211_sta *sta) il4965_rs_use_green() argument
646 !il->ht.non_gf_sta_present; il4965_rs_use_green()
672 il4965_rs_get_adjacent_rate(struct il_priv *il, u8 idx, u16 rate_mask, il4965_rs_get_adjacent_rate() argument
738 struct il_priv *il = lq_sta->drv; il4965_rs_get_lower_rate() local
753 il4965_first_antenna(il->hw_params.valid_tx_ant); il4965_rs_get_lower_rate()
816 struct il_priv *il = (struct il_priv *)il_r; il4965_rs_tx_status() local
853 il4965_rs_get_tbl_info_from_mcs(tx_rate, il->band, &tbl_type, &rs_idx); il4965_rs_tx_status()
854 if (il->band == IEEE80211_BAND_5GHZ) il4965_rs_tx_status()
867 if (il->band == IEEE80211_BAND_2GHZ) il4965_rs_tx_status()
889 il_send_lq_cmd(il, &lq_sta->lq, CMD_ASYNC, false); il4965_rs_tx_status()
934 il4965_rs_get_tbl_info_from_mcs(tx_rate, il->band, &tbl_type, il4965_rs_tx_status()
960 il4965_rs_get_tbl_info_from_mcs(tx_rate, il->band, il4965_rs_tx_status()
989 il4965_rs_rate_scale_perform(il, skb, sta, lq_sta); il4965_rs_tx_status()
1001 il4965_rs_set_stay_in_table(struct il_priv *il, u8 is_legacy, il4965_rs_set_stay_in_table() argument
1079 il4965_rs_get_best_rate(struct il_priv *il, struct il_lq_sta *lq_sta, il4965_rs_get_best_rate() argument
1100 il4965_rs_get_adjacent_rate(il, rate, rate_mask, il4965_rs_get_best_rate()
1173 il4965_rs_switch_to_mimo2(struct il_priv *il, struct il_lq_sta *lq_sta, il4965_rs_switch_to_mimo2() argument
1189 if (il->hw_params.tx_chains_num < 2) il4965_rs_switch_to_mimo2()
1200 if (il_is_ht40_tx_allowed(il, &sta->ht_cap)) il4965_rs_switch_to_mimo2()
1207 rate = il4965_rs_get_best_rate(il, lq_sta, tbl, rate_mask, idx); il4965_rs_switch_to_mimo2()
1216 il4965_rate_n_flags_from_tbl(il, tbl, rate, is_green); il4965_rs_switch_to_mimo2()
1227 il4965_rs_switch_to_siso(struct il_priv *il, struct il_lq_sta *lq_sta, il4965_rs_switch_to_siso() argument
1246 if (il_is_ht40_tx_allowed(il, &sta->ht_cap)) il4965_rs_switch_to_siso()
1255 rate = il4965_rs_get_best_rate(il, lq_sta, tbl, rate_mask, idx); il4965_rs_switch_to_siso()
1264 il4965_rate_n_flags_from_tbl(il, tbl, rate, is_green); il4965_rs_switch_to_siso()
1274 il4965_rs_move_legacy_other(struct il_priv *il, struct il_lq_sta *lq_sta, il4965_rs_move_legacy_other() argument
1286 u8 valid_tx_ant = il->hw_params.valid_tx_ant; il4965_rs_move_legacy_other()
1287 u8 tx_chains_num = il->hw_params.tx_chains_num; il4965_rs_move_legacy_other()
1330 il4965_rs_switch_to_siso(il, lq_sta, conf, sta, il4965_rs_move_legacy_other()
1359 il4965_rs_switch_to_mimo2(il, lq_sta, conf, sta, il4965_rs_move_legacy_other()
1393 il4965_rs_move_siso_to_other(struct il_priv *il, struct il_lq_sta *lq_sta, il4965_rs_move_siso_to_other() argument
1407 u8 valid_tx_ant = il->hw_params.valid_tx_ant; il4965_rs_move_siso_to_other()
1408 u8 tx_chains_num = il->hw_params.tx_chains_num; il4965_rs_move_siso_to_other()
1456 il4965_rs_switch_to_mimo2(il, lq_sta, conf, sta, il4965_rs_move_siso_to_other()
1486 il4965_rate_n_flags_from_tbl(il, search_tbl, idx, il4965_rs_move_siso_to_other()
1516 il4965_rs_move_mimo2_to_other(struct il_priv *il, struct il_lq_sta *lq_sta, il4965_rs_move_mimo2_to_other() argument
1530 u8 valid_tx_ant = il->hw_params.valid_tx_ant; il4965_rs_move_mimo2_to_other()
1531 u8 tx_chains_num = il->hw_params.tx_chains_num; il4965_rs_move_mimo2_to_other()
1577 il4965_rs_switch_to_siso(il, lq_sta, conf, sta, il4965_rs_move_mimo2_to_other()
1610 il4965_rate_n_flags_from_tbl(il, search_tbl, idx, il4965_rs_move_mimo2_to_other()
1651 struct il_priv *il; il4965_rs_stay_in_table() local
1653 il = lq_sta->drv; il4965_rs_stay_in_table()
1725 il4965_rs_update_rate_tbl(struct il_priv *il, struct il_lq_sta *lq_sta, il4965_rs_update_rate_tbl() argument
1731 rate = il4965_rate_n_flags_from_tbl(il, tbl, idx, is_green); il4965_rs_update_rate_tbl()
1732 il4965_rs_fill_link_cmd(il, lq_sta, rate); il4965_rs_update_rate_tbl()
1733 il_send_lq_cmd(il, &lq_sta->lq, CMD_ASYNC, false); il4965_rs_update_rate_tbl()
1740 il4965_rs_rate_scale_perform(struct il_priv *il, struct sk_buff *skb, il4965_rs_rate_scale_perform() argument
1744 struct ieee80211_hw *hw = il->hw; il4965_rs_rate_scale_perform()
1782 tid_data = &il->stations[lq_sta->lq.sta_id].tid[tid]; il4965_rs_rate_scale_perform()
1804 lq_sta->is_green = il4965_rs_use_green(il, sta); il4965_rs_rate_scale_perform()
1843 il4965_rs_update_rate_tbl(il, lq_sta, tbl, idx, il4965_rs_rate_scale_perform()
1948 il4965_rs_get_adjacent_rate(il, idx, rate_scale_idx_msk, il4965_rs_rate_scale_perform()
2046 il4965_rs_update_rate_tbl(il, lq_sta, tbl, idx, is_green); il4965_rs_rate_scale_perform()
2065 il4965_rs_move_legacy_other(il, lq_sta, conf, sta, idx); il4965_rs_rate_scale_perform()
2067 il4965_rs_move_siso_to_other(il, lq_sta, conf, sta, il4965_rs_rate_scale_perform()
2070 il4965_rs_move_mimo2_to_other(il, lq_sta, conf, sta, il4965_rs_rate_scale_perform()
2085 il4965_rs_fill_link_cmd(il, lq_sta, tbl->current_rate); il4965_rs_rate_scale_perform()
2086 il_send_lq_cmd(il, &lq_sta->lq, CMD_ASYNC, false); il4965_rs_rate_scale_perform()
2101 il4965_rs_set_stay_in_table(il, 1, lq_sta); il4965_rs_rate_scale_perform()
2113 &il->stations[lq_sta->lq.sta_id].tid[tid]; il4965_rs_rate_scale_perform()
2117 il4965_rs_tl_turn_on_agg(il, tid, il4965_rs_rate_scale_perform()
2121 il4965_rs_set_stay_in_table(il, 0, lq_sta); il4965_rs_rate_scale_perform()
2127 il4965_rate_n_flags_from_tbl(il, tbl, idx, is_green); il4965_rs_rate_scale_perform()
2147 il4965_rs_initialize_lq(struct il_priv *il, struct ieee80211_conf *conf, il4965_rs_initialize_lq() argument
2162 use_green = il4965_rs_use_green(il, sta); il4965_rs_initialize_lq()
2167 valid_tx_ant = il->hw_params.valid_tx_ant; il4965_rs_initialize_lq()
2186 il4965_rs_get_tbl_info_from_mcs(rate, il->band, tbl, &rate_idx); il4965_rs_initialize_lq()
2190 rate = il4965_rate_n_flags_from_tbl(il, tbl, rate_idx, use_green); il4965_rs_initialize_lq()
2194 il->stations[lq_sta->lq.sta_id].lq = &lq_sta->lq; il4965_rs_initialize_lq()
2195 il_send_lq_cmd(il, &lq_sta->lq, CMD_SYNC, true); il4965_rs_initialize_lq()
2205 struct il_priv *il __maybe_unused = (struct il_priv *)il_r; il4965_rs_get_rate()
2278 struct il_priv *il; il4965_rs_alloc_sta() local
2280 il = (struct il_priv *)il_rate; il4965_rs_alloc_sta()
2290 il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, u8 sta_id) il4965_rs_rate_init() argument
2293 struct ieee80211_hw *hw = il->hw; il4965_rs_rate_init()
2294 struct ieee80211_conf *conf = &il->hw->conf; il4965_rs_rate_init()
2328 lq_sta->is_green = il4965_rs_use_green(il, sta); il4965_rs_rate_init()
2329 lq_sta->active_legacy_rate = il->active_rate & ~(0x1000); il4965_rs_rate_init()
2330 lq_sta->band = il->band; il4965_rs_rate_init()
2348 il4965_first_antenna(il->hw_params.valid_tx_ant); il4965_rs_rate_init()
2350 il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params. il4965_rs_rate_init()
2354 } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) { il4965_rs_rate_init()
2356 il->hw_params.valid_tx_ant; il4965_rs_rate_init()
2361 lq_sta->drv = il; il4965_rs_rate_init()
2373 il4965_rs_initialize_lq(il, conf, sta, lq_sta); il4965_rs_rate_init()
2377 il4965_rs_fill_link_cmd(struct il_priv *il, struct il_lq_sta *lq_sta, il4965_rs_fill_link_cmd() argument
2419 if (il) il4965_rs_fill_link_cmd()
2420 valid_tx_ant = il->hw_params.valid_tx_ant; il4965_rs_fill_link_cmd()
2431 else if (il && il4965_rs_fill_link_cmd()
2466 else if (il && il4965_rs_fill_link_cmd()
2513 struct il_priv *il __maybe_unused = il_r; il4965_rs_free_sta()
2524 struct il_priv *il; il4965_rs_dbgfs_set_mcs() local
2528 il = lq_sta->drv; il4965_rs_dbgfs_set_mcs()
2529 valid_tx_ant = il->hw_params.valid_tx_ant; il4965_rs_dbgfs_set_mcs()
2556 struct il_priv *il; il4965_rs_sta_dbgfs_scale_table_write() local
2561 il = lq_sta->drv; il4965_rs_sta_dbgfs_scale_table_write()
2598 struct il_priv *il; il4965_rs_sta_dbgfs_scale_table_read() local
2601 il = lq_sta->drv; il4965_rs_sta_dbgfs_scale_table_read()
2615 (il->hw_params.valid_tx_ant & ANT_A) ? "ANT_A," : "", il4965_rs_sta_dbgfs_scale_table_read()
2616 (il->hw_params.valid_tx_ant & ANT_B) ? "ANT_B," : "", il4965_rs_sta_dbgfs_scale_table_read()
2617 (il->hw_params.valid_tx_ant & ANT_C) ? "ANT_C" : ""); il4965_rs_sta_dbgfs_scale_table_read()
2769 il4965_rs_add_debugfs(void *il, void *il_sta, struct dentry *dir) il4965_rs_add_debugfs() argument
2788 il4965_rs_remove_debugfs(void *il, void *il_sta) il4965_rs_remove_debugfs() argument
|
| /linux-4.1.27/drivers/pcmcia/ |
| H A D | pxa2xx_cm_x2xx.c | 9 * Mike Rapoport <mike@compulab.co.il>
47 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| H A D | pxa2xx_cm_x270.c | 9 * Mike Rapoport <mike@compulab.co.il>
|
| H A D | pxa2xx_cm_x255.c | 9 * Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/include/linux/ |
| H A D | fec.h | 4 * Baruch Siach <baruch@tkos.co.il>
|
| H A D | sctp.h | 38 * Karl Knutson <karl@athena.chicago.il.us>
41 * randall@sctp.chicago.il.us
|
| H A D | genhd.h | 484 * BSD disklabel support by Yossi Gottlieb <yogo@math.tau.ac.il>
|
| /linux-4.1.27/crypto/ |
| H A D | camellia_generic.c | 357 #define CAMELLIA_F(xl, xr, kl, kr, yl, yr, il, ir, t0, t1) ({ \
358 il = xl ^ kl; \
360 t0 = il >> 16; \
368 ^ camellia_sp3033[(u8)(il >> 8)] \
369 ^ camellia_sp4404[(u8)(il)]; \
561 u32 il, ir, t0, t1, w0, w1; camellia_setup128() local
618 w0, w1, il, ir, t0, t1); camellia_setup128()
622 kll, klr, il, ir, t0, t1); camellia_setup128()
626 krl, krr, il, ir, t0, t1); camellia_setup128()
630 w0, w1, il, ir, t0, t1); camellia_setup128()
668 u32 il, ir, t0, t1, w0, w1; /* temporary variables */ camellia_setup256() local
739 w0, w1, il, ir, t0, t1); camellia_setup256()
743 kll, klr, il, ir, t0, t1); camellia_setup256()
747 krl, krr, il, ir, t0, t1); camellia_setup256()
751 w0, w1, il, ir, t0, t1); camellia_setup256()
759 w0, w1, il, ir, t0, t1); camellia_setup256()
763 w0, w1, il, ir, t0, t1); camellia_setup256()
847 #define CAMELLIA_ROUNDSM(xl, xr, kl, kr, yl, yr, il, ir) ({ \
851 il = camellia_sp1110[(u8)(xl >> 24)]; \
853 il ^= camellia_sp0222[(u8)(xl >> 16)]; \
855 il ^= camellia_sp3033[(u8)(xl >> 8)]; \
857 il ^= camellia_sp4404[(u8)xl]; \
858 ir ^= il; \
860 yr ^= ror32(il, 8) ^ ir; \
866 u32 il, ir, t0, t1; /* temporary variables */ camellia_do_encrypt() local
876 io[2], io[3], il, ir); \ camellia_do_encrypt()
879 io[0], io[1], il, ir); \ camellia_do_encrypt()
882 io[2], io[3], il, ir); \ camellia_do_encrypt()
885 io[0], io[1], il, ir); \ camellia_do_encrypt()
888 io[2], io[3], il, ir); \ camellia_do_encrypt()
891 io[0], io[1], il, ir); \ camellia_do_encrypt()
897 t0, t1, il, ir); \ camellia_do_encrypt()
921 u32 il, ir, t0, t1; /* temporary variables */ camellia_do_decrypt() local
931 io[2], io[3], il, ir); \ camellia_do_decrypt()
934 io[0], io[1], il, ir); \ camellia_do_decrypt()
937 io[2], io[3], il, ir); \ camellia_do_decrypt()
940 io[0], io[1], il, ir); \ camellia_do_decrypt()
943 io[2], io[3], il, ir); \ camellia_do_decrypt()
946 io[0], io[1], il, ir); \ camellia_do_decrypt()
952 t0, t1, il, ir); \ camellia_do_decrypt()
|
| H A D | vmac.c | 66 #define ADD128(rh, rl, ih, il) \
68 u64 _il = (il); \
|
| /linux-4.1.27/include/linux/platform_data/ |
| H A D | usb-pxa3xx-ulpi.h | 6 * Igor Grinberg <grinberg@compulab.co.il>
|
| H A D | camera-mx2.h | 6 * Copyright (C) 2010, Baruch Siach <baruch@tkos.co.il>
|
| /linux-4.1.27/sound/usb/usx2y/ |
| H A D | usb_stream.c | 378 int il, ol, l, p; loop_back() local
395 il = id[p].actual_length; loop_back()
396 if (l + il > s->period_size) loop_back()
397 il = s->period_size - l; loop_back()
398 if (il <= ol) { loop_back()
399 memcpy(o, i, il); loop_back()
400 o += il; loop_back()
401 ol -= il; loop_back()
406 memcpy(o, i + ol, il - ol); loop_back()
407 o += il - ol; loop_back()
410 l += il; loop_back()
|
| /linux-4.1.27/arch/powerpc/platforms/cell/spufs/ |
| H A D | spu_save_crt0.S | 76 il $0, 0
77 il $SP, 16368
|
| H A D | spu_restore_crt0.S | 42 il $0, 0
43 il $SP, 16368
|
| /linux-4.1.27/drivers/leds/ |
| H A D | leds-da903x.c | 5 * Mike Rapoport <mike@compulab.co.il>
156 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| H A D | leds-adp5520.c | 8 * Mike Rapoport <mike@compulab.co.il>
|
| H A D | leds-mc13783.c | 8 * Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/drivers/mmc/host/ |
| H A D | sdhci-dove.c | 5 * Mike Rapoport <mike@compulab.co.il>
131 "Mike Rapoport <mike@compulab.co.il>");
|
| /linux-4.1.27/drivers/rtc/ |
| H A D | rtc-em3027.c | 5 * Author: Mike Rapoport <mike@compulab.co.il>
160 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| H A D | rtc-digicolor.c | 6 * Author: Baruch Siach <baruch@tkos.co.il>
225 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
| H A D | rtc-imxdi.c | 546 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
| /linux-4.1.27/drivers/video/backlight/ |
| H A D | da903x_bl.c | 5 * Mike Rapoport <mike@compulab.co.il>
173 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| /linux-4.1.27/arch/x86/include/asm/ |
| H A D | tce.h | 6 * Author: Muli Ben-Yehuda <muli@il.ibm.com>
|
| H A D | calgary.h | 7 * Author: Muli Ben-Yehuda <muli@il.ibm.com>
|
| /linux-4.1.27/arch/arm/mach-dove/ |
| H A D | cm-a510.c | 5 * Konstantin Sinyuk <kostyas@compulab.co.il>
|
| /linux-4.1.27/sound/soc/pxa/ |
| H A D | em-x270.c | 6 * Author: Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/net/bluetooth/bnep/ |
| H A D | core.c | 427 int len = 0, il = 0; bnep_tx_frame() local
437 iv[il++] = (struct kvec) { &type, 1 }; bnep_tx_frame()
452 iv[il++] = (struct kvec) { eh->h_source, ETH_ALEN }; bnep_tx_frame()
457 iv[il++] = (struct kvec) { eh->h_dest, ETH_ALEN }; bnep_tx_frame()
463 iv[il++] = (struct kvec) { skb->data, skb->len }; bnep_tx_frame()
468 len = kernel_sendmsg(sock, &s->msg, iv, il, len); bnep_tx_frame()
|
| /linux-4.1.27/drivers/mtd/nand/ |
| H A D | cmx270_nand.c | 5 * Mike Rapoport <mike@compulab.co.il>
249 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| /linux-4.1.27/drivers/mfd/ |
| H A D | lpc_sch.c | 11 * Author: Denis Turischev <denis@compulab.co.il>
214 MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
|
| H A D | tps6586x.c | 5 * Mike Rapoport <mike@compulab.co.il>
9 * Mike Rapoport <mike@compulab.co.il>
634 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| H A D | da903x.c | 5 * Mike Rapoport <mike@compulab.co.il>
574 "Mike Rapoport <mike@compulab.co.il>");
|
| H A D | adp5520.c | 12 * Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/drivers/regulator/ |
| H A D | userspace-consumer.c | 6 * Author: Mike Rapoport <mike@compulab.co.il>
184 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| H A D | tps6586x-regulator.c | 5 * Author: Mike Rapoport <mike@compulab.co.il>
542 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| H A D | da903x.c | 496 "Mike Rapoport <mike@compulab.co.il>");
|
| /linux-4.1.27/drivers/gpio/ |
| H A D | gpio-it8761e.c | 4 * Author: Denis Turischev <denis@compulab.co.il>
228 MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
|
| H A D | gpio-xtensa.c | 3 * Author: Baruch Siach <baruch@tkos.co.il>
176 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
| H A D | gpio-sch.c | 5 * Author: Denis Turischev <denis@compulab.co.il>
241 MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
|
| H A D | gpio-tps6586x.c | 9 * Mike Rapoport <mike@compulab.co.il>
|
| H A D | gpio-pl061.c | 406 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
| /linux-4.1.27/drivers/watchdog/ |
| H A D | sbc_fitpc2_wdt.c | 4 * Author: Denis Turischev <denis@compulab.co.il>
256 MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
|
| /linux-4.1.27/sound/soc/tegra/ |
| H A D | trimslice.c | 5 * Author: Mike Rapoport <mike@compulab.co.il>
203 MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
| /linux-4.1.27/drivers/irqchip/ |
| H A D | irq-digicolor.c | 4 * Author: Baruch Siach <baruch@tkos.co.il>
|
| /linux-4.1.27/arch/xtensa/include/asm/ |
| H A D | futex.h | 12 * Baruch Siach <baruch@tkos.co.il>
|
| /linux-4.1.27/include/uapi/asm-generic/ |
| H A D | mman-common.h | 5 Author: Michael S. Tsirkin <mst@mellanox.co.il>, Mellanox Technologies Ltd.
|
| /linux-4.1.27/arch/arm/mach-omap2/ |
| H A D | common-board-devices.c | 5 * Author: Mike Rapoport <mike@compulab.co.il>
|
| H A D | board-cm-t35.c | 5 * Authors: Mike Rapoport <mike@compulab.co.il>
6 * Igor Grinberg <grinberg@compulab.co.il>
|
| /linux-4.1.27/arch/arm/include/asm/hardware/ |
| H A D | it8152.h | 5 * Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/drivers/cpufreq/ |
| H A D | pmac64-cpufreq.c | 485 u64 max_freq, min_freq, ih, il; g5_pm72_cpufreq_init() local
582 il = *((u32 *)(eeprom + 0x20)); g5_pm72_cpufreq_init()
585 if (il == ih) { g5_pm72_cpufreq_init()
593 if (ih != 0 && il != 0) g5_pm72_cpufreq_init()
594 min_freq = (max_freq * il) / ih; g5_pm72_cpufreq_init()
|
| /linux-4.1.27/arch/arm/mach-pxa/ |
| H A D | cm-x255.c | 5 * Mike Rapoport <mike@compulab.co.il>
|
| H A D | cm-x2xx-pci.c | 9 * Mike Rapoport <mike@compulab.co.il>
|
| H A D | cm-x300.c | 8 * Mike Rapoport <mike@compulab.co.il>
9 * Igor Grinberg <grinberg@compulab.co.il>
|
| H A D | cm-x270.c | 5 * Mike Rapoport <mike@compulab.co.il>
|
| H A D | cm-x2xx.c | 5 * Mike Rapoport <mike@compulab.co.il>
|
| H A D | pxa3xx-ulpi.c | 8 * 2010-13-07: Igor Grinberg <grinberg@compulab.co.il>
|
| H A D | em-x270.c | 5 * Author: Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/net/sctp/ |
| H A D | debug.c | 34 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | inqueue.c | 36 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | primitive.c | 36 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | tsnmap.c | 34 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | bind_addr.c | 33 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | endpointola.c | 35 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | sm_statetable.c | 34 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | transport.c | 36 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | input.c | 35 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | output.c | 32 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | protocol.c | 35 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | sm_sideeffect.c | 34 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | associola.c | 34 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | outqueue.c | 34 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | sm_make_chunk.c | 35 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | sm_statefuns.c | 34 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | socket.c | 41 * Karl Knutson <karl@athena.chicago.il.us>
|
| /linux-4.1.27/drivers/i2c/busses/ |
| H A D | i2c-digicolor.c | 4 * Author: Baruch Siach <baruch@tkos.co.il>
382 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
| H A D | i2c-designware-pcidrv.c | 343 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
| H A D | i2c-designware-platdrv.c | 377 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
| /linux-4.1.27/drivers/clocksource/ |
| H A D | timer-digicolor.c | 4 * Author: Baruch Siach <baruch@tkos.co.il>
|
| /linux-4.1.27/arch/x86/kernel/ |
| H A D | tce_64.c | 9 * Author: Muli Ben-Yehuda <muli@il.ibm.com>
|
| H A D | setup.c | 7 * David Parsons <orc@pell.chi.il.us>, July-August 1999
|
| H A D | pci-calgary_64.c | 8 * Author: Muli Ben-Yehuda <muli@il.ibm.com>
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| /linux-4.1.27/include/net/sctp/ |
| H A D | ulpevent.h | 38 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | constants.h | 31 * Karl Knutson <karl@athena.chicago.il.us>
32 * Randall Stewart <randall@stewart.chicago.il.us>
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| H A D | command.h | 31 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | tsnmap.h | 35 * Karl Knutson <karl@athena.chicago.il.us>
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| H A D | sm.h | 33 * Karl Knutson <karl@athena.chicago.il.us>
|
| H A D | structs.h | 30 * Randall Stewart <randall@sctp.chicago.il.us>
34 * Karl Knutson <karl@athena.chicago.il.us>
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| /linux-4.1.27/drivers/scsi/ |
| H A D | u14-34f.c | 1579 unsigned int ihdlr, unsigned int il[], unsigned int n_ready) { reorder()
1604 k = il[n]; cpp = &HD(j)->cp[k]; SCpnt = cpp->SCpnt; reorder()
1638 if (!((rev && r) || (!rev && s))) sort(sl, il, n_ready, rev); reorder()
1641 k = il[n]; cpp = &HD(j)->cp[k]; SCpnt = cpp->SCpnt; reorder()
1650 if (overlap) sort(pl, il, n_ready, FALSE); reorder()
1665 k = il[n]; cpp = &HD(j)->cp[k]; SCpnt = cpp->SCpnt; reorder()
1682 unsigned int k, n, n_ready = 0, il[MAX_MAILBOXES]; flush_dev() local
1694 il[n_ready++] = k; flush_dev()
1697 if (reorder(j, cursec, ihdlr, il, n_ready)) n_ready = 1; flush_dev()
1700 k = il[n]; cpp = &HD(j)->cp[k]; SCpnt = cpp->SCpnt; flush_dev()
1578 reorder(unsigned int j, unsigned long cursec, unsigned int ihdlr, unsigned int il[], unsigned int n_ready) reorder() argument
|
| H A D | eata.c | 2099 unsigned int ihdlr, unsigned int il[], unsigned int n_ready) reorder()
2126 k = il[n]; reorder()
2172 sort(sl, il, n_ready, rev); reorder()
2176 k = il[n]; reorder()
2192 sort(pl, il, n_ready, 0); reorder()
2221 k = il[n]; reorder()
2243 unsigned int k, n, n_ready = 0, il[MAX_MAILBOXES]; flush_dev() local
2259 il[n_ready++] = k; flush_dev()
2262 if (reorder(ha, cursec, ihdlr, il, n_ready)) flush_dev()
2266 k = il[n]; flush_dev()
2098 reorder(struct hostdata *ha, unsigned long cursec, unsigned int ihdlr, unsigned int il[], unsigned int n_ready) reorder() argument
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| /linux-4.1.27/drivers/dma/ |
| H A D | ste_dma40.c | 495 * @il: the pointer to struct d40_interrupt_lookup
509 struct d40_interrupt_lookup *il; member in struct:d40_gen_dmac
1671 struct d40_interrupt_lookup *il = base->gen_dmac.il; d40_handle_interrupt() local
1678 regs[i] = readl(base->virtbase + il[i].src); d40_handle_interrupt()
1692 if (il[row].offset == D40_PHY_CHAN) d40_handle_interrupt()
1695 d40c = base->lookup_log_chans[il[row].offset + idx]; d40_handle_interrupt()
1706 writel(BIT(idx), base->virtbase + il[row].clr); d40_handle_interrupt()
1710 if (!il[row].is_error) d40_handle_interrupt()
1714 chan, il[row].offset, idx); d40_handle_interrupt()
3267 base->gen_dmac.il = il_v4b; d40_hw_detect_init()
3282 base->gen_dmac.il = il_v4a; d40_hw_detect_init()
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| /linux-4.1.27/drivers/net/ethernet/dec/tulip/ |
| H A D | de2104x.c | 1792 struct de_srom_info_leaf *il; de21041_get_srom_info() local
1822 il = (struct de_srom_info_leaf *) &ee_data[ofs]; de21041_get_srom_info()
1825 if (il->n_blocks == 0) de21041_get_srom_info()
1828 (sizeof(struct de_srom_info_leaf) + (sizeof(struct de_srom_media_block) * il->n_blocks))) de21041_get_srom_info()
1832 switch (get_unaligned(&il->default_media)) { de21041_get_srom_info()
1854 bufp = ((void *)il) + sizeof(*il); de21041_get_srom_info()
1855 for (i = 0; i < il->n_blocks; i++) { de21041_get_srom_info()
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| /linux-4.1.27/drivers/input/mouse/ |
| H A D | synaptics_i2c.c | 5 * Mike Rapoport <mike@compulab.co.il>
6 * Igor Grinberg <grinberg@compulab.co.il>
|
| /linux-4.1.27/drivers/tty/serial/ |
| H A D | digicolor-usart.c | 4 * Author: Baruch Siach <baruch@tkos.co.il>
558 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
|
| /linux-4.1.27/drivers/net/wireless/ath/ath5k/ |
| H A D | led.c | 85 /* Dell Vostro A860 (shahar@shahar-or.co.il) */
|
| /linux-4.1.27/drivers/staging/media/lirc/ |
| H A D | lirc_bt829.c | 4 * by Leonid Froenchenko <lfroen@galileo.co.il>
|
| /linux-4.1.27/arch/x86/kvm/ |
| H A D | iommu.c | 23 * Author: Ben-Ami Yassour <benami@il.ibm.com>
|
| H A D | x86.c | 15 * Ben-Ami Yassour <benami@il.ibm.com>
|
| /linux-4.1.27/arch/mips/pci/ |
| H A D | ops-tx3927.c | 187 tx3927_pcicptr->il = TX3927_IR_PCI; tx3927_pcic_setup()
|
| /linux-4.1.27/arch/arm/common/ |
| H A D | it8152.c | 5 * Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/drivers/ide/ |
| H A D | ide.c | 8 * and Gadi Oxman <gadio@netvision.net.il>
|
| H A D | ide-floppy.c | 4 * Copyright (C) 1996-1999 Gadi Oxman <gadio@netvision.net.il>
|
| H A D | cmd640.c | 26 * flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
|
| H A D | ide-disk.c | 11 * and Gadi Oxman <gadio@netvision.net.il>
|
| H A D | ide-probe.c | 8 * and Gadi Oxman <gadio@netvision.net.il>
|
| H A D | ide-tape.c | 4 * Copyright (C) 1995-1999 Gadi Oxman <gadio@netvision.net.il>
|
| /linux-4.1.27/drivers/power/ |
| H A D | ds2782_battery.c | 8 * DS2786 added by Yulia Vilensky <vilensky@compulab.co.il>
|
| H A D | da9030_battery.c | 5 * Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/arch/mips/include/asm/txx9/ |
| H A D | tx3927.h | 87 endian_def_b4(ml, mg, ip, il);
|
| /linux-4.1.27/include/uapi/linux/ |
| H A D | sctp.h | 37 * R. Stewart <randall@sctp.chicago.il.us>
40 * Karl Knutson <karl@athena.chicago.il.us>
|
| /linux-4.1.27/drivers/video/fbdev/mbx/ |
| H A D | mbxfb.c | 10 * Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/arch/mips/include/asm/octeon/ |
| H A D | cvmx-pci-defs.h | 530 uint32_t il:8; member in struct:cvmx_pci_cfg15::cvmx_pci_cfg15_s
532 uint32_t il:8;
|
| H A D | cvmx-pciercx-defs.h | 577 uint32_t il:8; member in struct:cvmx_pciercx_cfg015::cvmx_pciercx_cfg015_s
579 uint32_t il:8;
|
| /linux-4.1.27/drivers/block/ |
| H A D | floppy.c | 2091 int il; setup_format_params() local
2127 il = 1; setup_format_params()
2129 il++; setup_format_params()
2141 n = (n + il) % F_SECT_PER_TRACK; setup_format_params()
|
| /linux-4.1.27/arch/powerpc/xmon/ |
| H A D | spu-insns.h | 208 APUOP(M_IL, RI16, 0x204, "il", _A2(A_T,A_S16), 00002, FX2) /* ImmLoad RT<-sxt(I16) */
|
| /linux-4.1.27/drivers/pci/host/ |
| H A D | pci-tegra.c | 5 * Author: Mike Rapoport <mike@compulab.co.il>
|
| /linux-4.1.27/drivers/usb/storage/ |
| H A D | unusual_devs.h | 798 /* Reported by Avi Kivity <avi@argo.co.il> */
|
| /linux-4.1.27/drivers/net/ethernet/marvell/ |
| H A D | mv643xx_eth.c | 6 * Copyright (C) 2002 Rabeeh Khoury <rabeeh@galileo.co.il>
|