Searched refs:VA (Results 1 - 200 of 221) sorted by relevance

12

/linux-4.1.27/arch/sparc/include/asm/
H A Dsfafsr.h6 /* Spitfire Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
39 /* UDB Error Register, ASI=0x7f VA<63:0>=0x0(High),0x18(Low) for read
40 * ASI=0x77 VA<63:0>=0x0(High),0x18(Low) for write
69 /* ESTATE Error Enable Register, ASI=0x4b VA<63:0>=0x0 */
H A Ddcu.h17 #define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */
20 #define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
21 #define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
H A Decc.h53 * | MID | S | RSV | VA | BM |AT| C| SZ |TYP| PADDR |
59 * VA: Bits 19-12 of the virtual faulting address, these are the
H A Dpage_64.h109 * enforce, wherein we use a 4GB red zone on each side of the VA hole.
H A Dchafsr.h4 /* Cheetah Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
H A Dpgtable_32.h444 /* We provide our own get_unmapped_area to cope with VA holes for userland */
H A Dpgtable_64.h990 /* We provide our own get_unmapped_area to cope with VA holes and
/linux-4.1.27/drivers/gpu/drm/tdfx/
H A Dtdfx_drv.h5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
37 #define DRIVER_AUTHOR "VA Linux Systems Inc."
H A Dtdfx_drv.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
/linux-4.1.27/arch/tile/include/asm/
H A Dcacheflush.h78 /* Flush a VA range; pads to L2 cacheline boundaries. */ __flush_buffer()
89 /* Flush & invalidate a VA range; pads to L2 cacheline boundaries. */ __finv_buffer()
102 * Flush a locally-homecached VA range and wait for the evicted
112 * Flush and invalidate a locally-homecached VA range and wait for the
122 /* Invalidate a VA range; pads to L2 cacheline boundaries. */ __inv_buffer()
133 /* Invalidate a VA range and wait for it to be complete. */ inv_buffer()
142 * Flush and invalidate a VA range that is homed remotely, waiting
H A Dpage.h145 /* Allow overriding how much VA or PA the kernel will use. */
160 * upper half, which takes a quarter of our VA space. Then we have
174 # error Too much PA to map with the VA available!
H A Dprocessor.h348 # error Too many VA bits!
H A Dio.h129 * The on-chip I/O hardware on tilegx is configured with VA=PA for the
H A Dpgtable.h242 /* Return PA and protection info for a given kernel VA. */
/linux-4.1.27/drivers/misc/vmw_vmci/
H A Dvmci_queue_pair.h43 u64 ppn_va; /* Start VA of queue pair PPNs. */
52 u64 va; /* Start VA of queue pair PPNs. */
62 * pass down the VA of the mapped file. Before host support was added
67 * provide the VA of the mapped files.
88 u64 produce_page_file; /* User VA. */
89 u64 consume_page_file; /* User VA. */
94 u64 produce_va; /* User VA of the mapped file. */
95 u64 consume_va; /* User VA of the mapped file. */
109 * this is a list of PPNs, and on hosted, it is a user VA where the
H A Dvmci_host.c74 u64 produce_page_file; /* User VA. */
75 u64 consume_page_file; /* User VA. */
222 * boolean in user VA into kernel space.
243 * Lock physical page backing a given user VA. vmci_host_setup_notify()
544 * VMX is passing down a new VA for the queue vmci_host_do_queuepair_setva()
H A Dvmci_queue_pair.c268 * Frees kernel VA space for a given queue and its queue header, and
618 * Allocates kernel VA space of specified size plus space for the queue
2460 * memory with a possibly new user VA. vmci_qp_broker_unmap()
/linux-4.1.27/drivers/rtc/
H A Drtc-efi-platform.c8 * Copyright (C) 1999-2000 VA Linux Systems
/linux-4.1.27/arch/ia64/kernel/
H A Dirq_lsapic.c8 * Copyright (C) 1999 VA Linux Systems
H A Dparavirt_patchlist.c3 * VA Linux Systems Japan K.K.
H A Dparavirtentry.S5 * VA Linux Systems Japan K.K.
H A Dparavirt_patch.c5 * VA Linux Systems Japan K.K.
H A Dsal.c6 * Copyright (C) 1999 VA Linux Systems
H A Dtime.c8 * Copyright (C) 1999-2000 VA Linux Systems
H A Dentry.S13 * Copyright (C) 1999 VA Linux Systems
27 * VA Linux Systems Japan K.K.
216 MOV_TO_IFA(in0, r8) // VA of next task...
H A Dacpi.c4 * Copyright (C) 1999 VA Linux Systems
H A Dparavirt.c5 * VA Linux Systems Japan K.K.
H A Defi.c7 * Copyright (C) 1999 VA Linux Systems
H A Diosapic.c9 * Copyright (C) 1999 VA Linux Systems
H A Dsetup.c11 * Copyright (C) 1999 VA Linux Systems
/linux-4.1.27/include/uapi/linux/
H A Dif_eql.h15 * McLean VA 22101
H A Dpersonality.h12 ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */
/linux-4.1.27/arch/ia64/include/asm/native/
H A Dirq.h5 * VA Linux Systems Japan K.K.
H A Dpatchlist.h5 * VA Linux Systems Japan K.K.
H A Dinst.h5 * VA Linux Systems Japan K.K.
H A Dpvchk_inst.h12 * VA Linux Systems Japan K.K.
/linux-4.1.27/include/linux/
H A Dif_eql.h15 * McLean VA 22101
/linux-4.1.27/arch/mips/sgi-ip22/
H A Dip28-berr.c71 tag[0].lo = read_c0_taglo(); /* PA[35:18], VA[13:12] */ save_cache_tags()
74 tag[1].lo = read_c0_taglo(); /* PA[35:18], VA[13:12] */ save_cache_tags()
79 * Save all primary data cache (indexed by VA[13:5]) tags which save_cache_tags()
80 * might fit to this bus-address, knowing that VA[11:0] == PA[11:0]. save_cache_tags()
82 * than relying on VA[13:12] from the secondary cache tags to pick save_cache_tags()
98 * Save primary instruction cache (indexed by VA[13:6]) tags save_cache_tags()
177 for (i = 0; i < 4; ++i) { /* for each possible VA[13:12] value */ print_cache_tags()
182 "D: 0: %08x %08x, 1: %08x %08x (VA[13:5] %04x)\n", print_cache_tags()
188 for (i = 0; i < 4; ++i) { /* for each possible VA[13:12] value */ print_cache_tags()
193 "I: 0: %08x %08x, 1: %08x %08x (VA[13:6] %04x)\n", print_cache_tags()
/linux-4.1.27/arch/powerpc/xmon/
H A Dppc-opc.c514 /* The VA field in a VA, VX or VXR form instruction. */
515 #define VA UI + 1
519 /* The VB field in a VA, VX or VXR form instruction. */
520 #define VB VA + 1
524 /* The VC field in a VA form instruction. */
529 /* The VD or VS field in a VA, VX, VXR or X form instruction. */
543 /* The SHB field in a VA form instruction. */
1652 /* An VA form instruction. */
1655 /* The mask for an VA form instruction. */
2109 { "vaddcuw", VX(4, 384), VX_MASK, PPCVEC, { VD, VA, VB } },
2110 { "vaddfp", VX(4, 10), VX_MASK, PPCVEC, { VD, VA, VB } },
2111 { "vaddsbs", VX(4, 768), VX_MASK, PPCVEC, { VD, VA, VB } },
2112 { "vaddshs", VX(4, 832), VX_MASK, PPCVEC, { VD, VA, VB } },
2113 { "vaddsws", VX(4, 896), VX_MASK, PPCVEC, { VD, VA, VB } },
2114 { "vaddubm", VX(4, 0), VX_MASK, PPCVEC, { VD, VA, VB } },
2115 { "vaddubs", VX(4, 512), VX_MASK, PPCVEC, { VD, VA, VB } },
2116 { "vadduhm", VX(4, 64), VX_MASK, PPCVEC, { VD, VA, VB } },
2117 { "vadduhs", VX(4, 576), VX_MASK, PPCVEC, { VD, VA, VB } },
2118 { "vadduwm", VX(4, 128), VX_MASK, PPCVEC, { VD, VA, VB } },
2119 { "vadduws", VX(4, 640), VX_MASK, PPCVEC, { VD, VA, VB } },
2120 { "vand", VX(4, 1028), VX_MASK, PPCVEC, { VD, VA, VB } },
2121 { "vandc", VX(4, 1092), VX_MASK, PPCVEC, { VD, VA, VB } },
2122 { "vavgsb", VX(4, 1282), VX_MASK, PPCVEC, { VD, VA, VB } },
2123 { "vavgsh", VX(4, 1346), VX_MASK, PPCVEC, { VD, VA, VB } },
2124 { "vavgsw", VX(4, 1410), VX_MASK, PPCVEC, { VD, VA, VB } },
2125 { "vavgub", VX(4, 1026), VX_MASK, PPCVEC, { VD, VA, VB } },
2126 { "vavguh", VX(4, 1090), VX_MASK, PPCVEC, { VD, VA, VB } },
2127 { "vavguw", VX(4, 1154), VX_MASK, PPCVEC, { VD, VA, VB } },
2130 { "vcmpbfp", VXR(4, 966, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2131 { "vcmpbfp.", VXR(4, 966, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2132 { "vcmpeqfp", VXR(4, 198, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2133 { "vcmpeqfp.", VXR(4, 198, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2134 { "vcmpequb", VXR(4, 6, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2135 { "vcmpequb.", VXR(4, 6, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2136 { "vcmpequh", VXR(4, 70, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2137 { "vcmpequh.", VXR(4, 70, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2138 { "vcmpequw", VXR(4, 134, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2139 { "vcmpequw.", VXR(4, 134, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2140 { "vcmpgefp", VXR(4, 454, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2141 { "vcmpgefp.", VXR(4, 454, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2142 { "vcmpgtfp", VXR(4, 710, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2143 { "vcmpgtfp.", VXR(4, 710, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2144 { "vcmpgtsb", VXR(4, 774, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2145 { "vcmpgtsb.", VXR(4, 774, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2146 { "vcmpgtsh", VXR(4, 838, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2147 { "vcmpgtsh.", VXR(4, 838, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2148 { "vcmpgtsw", VXR(4, 902, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2149 { "vcmpgtsw.", VXR(4, 902, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2150 { "vcmpgtub", VXR(4, 518, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2151 { "vcmpgtub.", VXR(4, 518, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2152 { "vcmpgtuh", VXR(4, 582, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2153 { "vcmpgtuh.", VXR(4, 582, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2154 { "vcmpgtuw", VXR(4, 646, 0), VXR_MASK, PPCVEC, { VD, VA, VB } },
2155 { "vcmpgtuw.", VXR(4, 646, 1), VXR_MASK, PPCVEC, { VD, VA, VB } },
2160 { "vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, { VD, VA, VC, VB } },
2161 { "vmaxfp", VX(4, 1034), VX_MASK, PPCVEC, { VD, VA, VB } },
2162 { "vmaxsb", VX(4, 258), VX_MASK, PPCVEC, { VD, VA, VB } },
2163 { "vmaxsh", VX(4, 322), VX_MASK, PPCVEC, { VD, VA, VB } },
2164 { "vmaxsw", VX(4, 386), VX_MASK, PPCVEC, { VD, VA, VB } },
2165 { "vmaxub", VX(4, 2), VX_MASK, PPCVEC, { VD, VA, VB } },
2166 { "vmaxuh", VX(4, 66), VX_MASK, PPCVEC, { VD, VA, VB } },
2167 { "vmaxuw", VX(4, 130), VX_MASK, PPCVEC, { VD, VA, VB } },
2168 { "vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2169 { "vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2170 { "vminfp", VX(4, 1098), VX_MASK, PPCVEC, { VD, VA, VB } },
2171 { "vminsb", VX(4, 770), VX_MASK, PPCVEC, { VD, VA, VB } },
2172 { "vminsh", VX(4, 834), VX_MASK, PPCVEC, { VD, VA, VB } },
2173 { "vminsw", VX(4, 898), VX_MASK, PPCVEC, { VD, VA, VB } },
2174 { "vminub", VX(4, 514), VX_MASK, PPCVEC, { VD, VA, VB } },
2175 { "vminuh", VX(4, 578), VX_MASK, PPCVEC, { VD, VA, VB } },
2176 { "vminuw", VX(4, 642), VX_MASK, PPCVEC, { VD, VA, VB } },
2177 { "vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2178 { "vmrghb", VX(4, 12), VX_MASK, PPCVEC, { VD, VA, VB } },
2179 { "vmrghh", VX(4, 76), VX_MASK, PPCVEC, { VD, VA, VB } },
2180 { "vmrghw", VX(4, 140), VX_MASK, PPCVEC, { VD, VA, VB } },
2181 { "vmrglb", VX(4, 268), VX_MASK, PPCVEC, { VD, VA, VB } },
2182 { "vmrglh", VX(4, 332), VX_MASK, PPCVEC, { VD, VA, VB } },
2183 { "vmrglw", VX(4, 396), VX_MASK, PPCVEC, { VD, VA, VB } },
2184 { "vmsummbm", VXA(4, 37), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2185 { "vmsumshm", VXA(4, 40), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2186 { "vmsumshs", VXA(4, 41), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2187 { "vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2188 { "vmsumuhm", VXA(4, 38), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2189 { "vmsumuhs", VXA(4, 39), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2190 { "vmulesb", VX(4, 776), VX_MASK, PPCVEC, { VD, VA, VB } },
2191 { "vmulesh", VX(4, 840), VX_MASK, PPCVEC, { VD, VA, VB } },
2192 { "vmuleub", VX(4, 520), VX_MASK, PPCVEC, { VD, VA, VB } },
2193 { "vmuleuh", VX(4, 584), VX_MASK, PPCVEC, { VD, VA, VB } },
2194 { "vmulosb", VX(4, 264), VX_MASK, PPCVEC, { VD, VA, VB } },
2195 { "vmulosh", VX(4, 328), VX_MASK, PPCVEC, { VD, VA, VB } },
2196 { "vmuloub", VX(4, 8), VX_MASK, PPCVEC, { VD, VA, VB } },
2197 { "vmulouh", VX(4, 72), VX_MASK, PPCVEC, { VD, VA, VB } },
2198 { "vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC, { VD, VA, VC, VB } },
2199 { "vnor", VX(4, 1284), VX_MASK, PPCVEC, { VD, VA, VB } },
2200 { "vor", VX(4, 1156), VX_MASK, PPCVEC, { VD, VA, VB } },
2201 { "vperm", VXA(4, 43), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2202 { "vpkpx", VX(4, 782), VX_MASK, PPCVEC, { VD, VA, VB } },
2203 { "vpkshss", VX(4, 398), VX_MASK, PPCVEC, { VD, VA, VB } },
2204 { "vpkshus", VX(4, 270), VX_MASK, PPCVEC, { VD, VA, VB } },
2205 { "vpkswss", VX(4, 462), VX_MASK, PPCVEC, { VD, VA, VB } },
2206 { "vpkswus", VX(4, 334), VX_MASK, PPCVEC, { VD, VA, VB } },
2207 { "vpkuhum", VX(4, 14), VX_MASK, PPCVEC, { VD, VA, VB } },
2208 { "vpkuhus", VX(4, 142), VX_MASK, PPCVEC, { VD, VA, VB } },
2209 { "vpkuwum", VX(4, 78), VX_MASK, PPCVEC, { VD, VA, VB } },
2210 { "vpkuwus", VX(4, 206), VX_MASK, PPCVEC, { VD, VA, VB } },
2216 { "vrlb", VX(4, 4), VX_MASK, PPCVEC, { VD, VA, VB } },
2217 { "vrlh", VX(4, 68), VX_MASK, PPCVEC, { VD, VA, VB } },
2218 { "vrlw", VX(4, 132), VX_MASK, PPCVEC, { VD, VA, VB } },
2220 { "vsel", VXA(4, 42), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
2221 { "vsl", VX(4, 452), VX_MASK, PPCVEC, { VD, VA, VB } },
2222 { "vslb", VX(4, 260), VX_MASK, PPCVEC, { VD, VA, VB } },
2223 { "vsldoi", VXA(4, 44), VXA_MASK, PPCVEC, { VD, VA, VB, SHB } },
2224 { "vslh", VX(4, 324), VX_MASK, PPCVEC, { VD, VA, VB } },
2225 { "vslo", VX(4, 1036), VX_MASK, PPCVEC, { VD, VA, VB } },
2226 { "vslw", VX(4, 388), VX_MASK, PPCVEC, { VD, VA, VB } },
2233 { "vsr", VX(4, 708), VX_MASK, PPCVEC, { VD, VA, VB } },
2234 { "vsrab", VX(4, 772), VX_MASK, PPCVEC, { VD, VA, VB } },
2235 { "vsrah", VX(4, 836), VX_MASK, PPCVEC, { VD, VA, VB } },
2236 { "vsraw", VX(4, 900), VX_MASK, PPCVEC, { VD, VA, VB } },
2237 { "vsrb", VX(4, 516), VX_MASK, PPCVEC, { VD, VA, VB } },
2238 { "vsrh", VX(4, 580), VX_MASK, PPCVEC, { VD, VA, VB } },
2239 { "vsro", VX(4, 1100), VX_MASK, PPCVEC, { VD, VA, VB } },
2240 { "vsrw", VX(4, 644), VX_MASK, PPCVEC, { VD, VA, VB } },
2241 { "vsubcuw", VX(4, 1408), VX_MASK, PPCVEC, { VD, VA, VB } },
2242 { "vsubfp", VX(4, 74), VX_MASK, PPCVEC, { VD, VA, VB } },
2243 { "vsubsbs", VX(4, 1792), VX_MASK, PPCVEC, { VD, VA, VB } },
2244 { "vsubshs", VX(4, 1856), VX_MASK, PPCVEC, { VD, VA, VB } },
2245 { "vsubsws", VX(4, 1920), VX_MASK, PPCVEC, { VD, VA, VB } },
2246 { "vsububm", VX(4, 1024), VX_MASK, PPCVEC, { VD, VA, VB } },
2247 { "vsububs", VX(4, 1536), VX_MASK, PPCVEC, { VD, VA, VB } },
2248 { "vsubuhm", VX(4, 1088), VX_MASK, PPCVEC, { VD, VA, VB } },
2249 { "vsubuhs", VX(4, 1600), VX_MASK, PPCVEC, { VD, VA, VB } },
2250 { "vsubuwm", VX(4, 1152), VX_MASK, PPCVEC, { VD, VA, VB } },
2251 { "vsubuws", VX(4, 1664), VX_MASK, PPCVEC, { VD, VA, VB } },
2252 { "vsumsws", VX(4, 1928), VX_MASK, PPCVEC, { VD, VA, VB } },
2253 { "vsum2sws", VX(4, 1672), VX_MASK, PPCVEC, { VD, VA, VB } },
2254 { "vsum4sbs", VX(4, 1800), VX_MASK, PPCVEC, { VD, VA, VB } },
2255 { "vsum4shs", VX(4, 1608), VX_MASK, PPCVEC, { VD, VA, VB } },
2256 { "vsum4ubs", VX(4, 1544), VX_MASK, PPCVEC, { VD, VA, VB } },
2263 { "vxor", VX(4, 1220), VX_MASK, PPCVEC, { VD, VA, VB } },
513 #define VA global() macro
/linux-4.1.27/arch/tile/kernel/
H A Dhead_32.S155 * VA = PA + PAGE_OFFSET. We remap things with more precise access
165 /* The true text VAs are mapped as VA = PA + MEM_SV_START */
173 * starting up will read it using VA-is-PA and local homing.
H A Dvmlinux.lds.S22 /* Text is loaded with a different VA than data; start with text. */
H A Dhead_64.S242 * VA = PA + PAGE_OFFSET. We remap things with more precise access
257 * VA = PA + PAGE_OFFSET. We remap things with more precise access
270 * starting up will read it using VA-is-PA and local homing.
H A Dmachine_kexec.c245 * setup VA is PA, at least up to QUASI_VA_IS_PA_ADDR_RANGE. setup_quasi_va_is_pa()
H A Dpci_gx.c1004 * The region's base VA is set to the base CPA. The for_each_online_node()
1077 /* Map a PCI MMIO bus address into VA space. */ ioremap()
1123 /* We need to keep the PCI bus address's in-page offset in the VA. */ ioremap()
1130 /* Map a PCI I/O address into VA space. */ ioport_map()
1176 /* We need to keep the PCI bus address's in-page offset in the VA. */ ioport_map()
H A Dsetup.c280 * The VA/PA mapping demands that we align our decisions at 16 MB
281 * boundaries so that we can rapidly convert VA to PA.
699 * Translate initrd_start & initrd_end from PA to VA for setup_bootmem_allocator()
1256 early_panic("Hypervisor max VA %#lx smaller than %#lx\n", validate_va()
H A Dbacktrace.c624 /* Handle the case where the register holds more bits than the VA. */ valid_addr_reg()
H A Dprocess.c91 * We should either assign a kernel VA to this buffer arch_release_thread_info()
/linux-4.1.27/arch/hexagon/kernel/
H A Dvm_init_segtable.S29 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
59 /* VA 0x00000000 */
72 /* VA 0x40000000 */
81 /* VA 0x80000000 */
103 /* VA 0xC0000000 */
H A Dhead.S70 * Get number of VA=PA entries; only really needed for jump
148 * Tear down VA=PA translation now that we are running
H A Ddma.c71 * mm/init.c to create DMA coherent space. Use that as the VA hexagon_dma_alloc_coherent()
/linux-4.1.27/drivers/gpu/drm/i810/
H A Di810_drv.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Di810_drv.h5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
40 #define DRIVER_AUTHOR "VA Linux Systems Inc."
H A Di810_dma.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
/linux-4.1.27/arch/tile/include/gxio/
H A Dtrio.h75 * dequeue of the current buffer VA, thus swapping in a new buffer.
101 * use gxio_trio_map_pio_region() to create MMIO mappings from its VA
160 /* The VA at which the MAC MMIO registers are mapped. */
163 /* The VA at which the PIO config space are mapped for each PCIe MAC.
175 /* The VA at which the push DMA MMIO registers are mapped. */
178 /* The VA at which the pull DMA MMIO registers are mapped. */
209 * registers into the the caller's VA space.
238 * @param target_mem VA of backing memory, should be registered via
H A Duart.h39 /* The VA at which our MMIO registers are mapped. */
H A Dusb_host.h39 /* The VA at which our MMIO registers are mapped. */
H A Dmpipe.h324 /* The VA at which configuration registers are mapped. */
327 /* The VA at which IDMA, EDMA, and buffer manager are mapped. */
341 * registers into the caller's VA space.
353 * registers from the caller's VA space.
/linux-4.1.27/drivers/gpu/drm/r128/
H A Dr128_drv.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dr128_drv.h6 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
43 #define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
H A Dr128_cce.c6 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
H A Dr128_state.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
/linux-4.1.27/arch/tile/gxio/
H A Dkiorpc.c29 /* Create kernel-VA-space MMIO mapping for an on-chip IO device. */ iorpc_ioremap()
/linux-4.1.27/arch/arm64/include/asm/
H A Dkvm_mmu.h29 * Instead, give the HYP mode its own VA region at a fixed offset from
59 * Convert a kernel VA into a HYP VA.
60 * reg: VA to be converted.
H A Dpage.h38 * VA range, so 3 pages are reserved in all cases.
H A Delf.h150 /* 1GB of VA */
H A Dkvm_arm.h74 * AMO: Override CPSR.A and enable signaling with VA
H A Dpgtable.h38 * VMALLOC_START: beginning of the kernel VA space
/linux-4.1.27/arch/ia64/dig/
H A Dsetup.c7 * Copyright (C) 1999 VA Linux Systems
/linux-4.1.27/arch/ia64/include/asm/
H A Ddelay.h9 * Copyright (C) 1999 VA Linux Systems
H A Dacpi.h2 * Copyright (C) 1999 VA Linux Systems
H A Dparavirt_patch.h3 * VA Linux Systems Japan K.K.
H A Dsmp.h4 * Copyright (C) 1999 VA Linux Systems
H A Dparavirt.h3 * VA Linux Systems Japan K.K.
H A Dparavirt_privop.h3 * VA Linux Systems Japan K.K.
H A Dpgtable.h489 /* We provide our own get_unmapped_area to cope with VA holes for userland */
/linux-4.1.27/arch/arm/plat-samsung/include/plat/
H A Dmap-base.h18 * little of the VA space as possible so vmalloc and friends have a
H A Dmap-s3c.h37 * the calculation for the VA of this must ensure that
/linux-4.1.27/arch/arm/mach-omap1/
H A Dfpga.h26 #define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
/linux-4.1.27/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_flat_memory.c43 * Access to ATC/IOMMU mapped memory w/ associated extension of VA to 48b
61 * address (VA) range for GPUVM is 40b.
84 * (VA[63:47] == 0x1FFFF) and low area (VA[63:47 == 0) of the address space
85 * so the actual VA carried to translation is 48b. There is a “hole” in
86 * the middle of the 64b VA space.
143 * 0 : <client>_MC_rdreq_addr is a GPUVM VA
145 * 1 : <client>_MC_rdreq_addr is a ATC VA
/linux-4.1.27/drivers/gpu/drm/
H A Ddrm_dma.c13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_memory.c13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_auth.c13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_info.c12 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dati_pcigart.c11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
H A Ddrm_scatter.c11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
H A Ddrm_lock.c13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_agpsupport.c11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
28 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_context.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
25 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_fops.c14 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
31 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_ioctl.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
25 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_vm.c13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_debugfs.c27 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_drv.c4 * Copyright 2001 VA Linux Systems, Inc., Sunnyvale, California.
H A Ddrm_bufs.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
25 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_irq.c12 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
29 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
/linux-4.1.27/drivers/gpu/drm/mga/
H A Dmga_drv.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dmga_warp.c4 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
21 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dmga_drv.h5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
39 #define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
H A Dmga_state.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dmga_dma.c5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
/linux-4.1.27/arch/frv/mm/
H A Ddma-alloc.c58 /* Use upper 10 bits of VA to index the first level map */ map_page()
63 /* Use middle 10 bits of VA to index the second-level map */ map_page()
/linux-4.1.27/arch/arm/kvm/
H A Dinit.S30 * r0 = top of Hyp stack (kernel VA)
40 * - Now switch to the runtime pgd (same VA, and still the same physical
H A Dmmu.c621 * @from: The kernel start VA of the range
622 * @to: The kernel end VA of the range (exclusive)
625 * The resulting HYP VA is the same as the kernel VA, modulo
1440 * faulting VA. This is always 12 bits, irrespective kvm_handle_guest_abort()
1696 /* Map the very same page at the trampoline VA */ kvm_mmu_init()
1875 * S/W ops to VA ops. Because the guest is not allowed to infer the
/linux-4.1.27/arch/x86/platform/efi/
H A Defi_32.c6 * Copyright (C) 1999 VA Linux Systems
H A Defi_64.c46 * 0xffff_ffff_0000_0000 and limit EFI VA mapping space to 64G.
213 pr_warn("Error mapping PA 0x%llx -> VA 0x%llx!\n", __map_region()
259 pr_warn(FW_WARN "VA address range overflow!\n"); efi_map_region()
263 /* Do the VA map */ efi_map_region()
H A Defi.c5 * Copyright (C) 1999 VA Linux Systems
16 * Borislav Petkov <bp@suse.de> - runtime services VA mapping
846 * ->trampoline_pgd page table using a top-down VA allocation scheme.
951 * new_memmap's VA comes from that direct mapping and thus clearing it, __efi_enter_virtual_mode()
/linux-4.1.27/arch/tile/include/arch/
H A Dtrio.h30 * Tile memory space and thus no IO VA translation is required if the last
H A Dtrio_shm.h57 * 1 : Chained buffer pointer. Next buffer descriptor (e.g. VA) stored
H A Dmpipe_shm.h78 * VA indicate the offset within the first buffer (e.g. 127 bytes is the
/linux-4.1.27/drivers/gpu/drm/sis/
H A Dsis_drv.h4 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
H A Dsis_drv.c4 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
/linux-4.1.27/arch/mips/include/asm/octeon/
H A Docteon.h224 * VA<48>==0 */
227 * can use XKPHYS addresses with VA<48>==0 */
231 * VA<48>==1 */
234 * can use XKPHYS addresses with VA<48>==1 */
/linux-4.1.27/arch/alpha/lib/
H A Dcallback_srm.S44 ldq $27,16($2) # VA of FIXUP procedure descriptor
/linux-4.1.27/drivers/rapidio/devices/
H A Dtsi721.h698 /* VA/PA of data buffers for incoming messages */
701 /* VA/PA of circular free buffer list */
704 /* VA/PA of Inbound message descriptors */
719 /* VA/PA of OB Msg descriptors */
722 /* VA/PA of OB Msg data buffers */
725 /* VA/PA of OB Msg descriptor status FIFO */
/linux-4.1.27/arch/mips/fw/cfe/
H A Dcfe_api_int.h107 s64 fwi_bootarea_va; /* VA of boot area */
/linux-4.1.27/include/uapi/drm/
H A Dnouveau_drm.h19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dmga_drm.h5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_fourcc.h18 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dr128_drm.h6 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
H A Ddrm.h13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dradeon_drm.h4 * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
/linux-4.1.27/arch/arm64/kernel/
H A Defi-entry.S86 * entries for the VA range of the current image, so no maintenance is
H A Dsuspend.c31 * off. VA primitives ensure the flush is applied to all __cpu_suspend_save()
H A Dcpuinfo.c56 * VIPT caches are non-aliasing if the VA always equals the PA cpuinfo_detect_icache_policy()
/linux-4.1.27/arch/m68k/include/asm/
H A Dmcfmmu.h70 #define MMUTR_VAMASK 0xfffffc00 /* VA mask */
/linux-4.1.27/arch/arm/mach-s3c64xx/include/mach/
H A Dmap.h46 /* See notes on UART VA mapping in debug-macro.S */
/linux-4.1.27/arch/alpha/include/asm/
H A Dmce.h40 unsigned long va; /* Effective VA of fault or miss. */
H A Dcore_apecs.h350 unsigned long va; /* Effective VA of fault or miss. */
H A Dcore_t2.h195 unsigned long elfmc_va; /* Effective VA of fault or miss. */
/linux-4.1.27/arch/microblaze/mm/
H A Dpgtable.c143 /* Use upper 10 bits of VA to index the first level map */ map_page()
145 /* Use middle 10 bits of VA to index the second-level map */ map_page()
/linux-4.1.27/arch/powerpc/mm/
H A Dfsl_booke_mmu.c76 * Return PA for this VA if it is mapped by a CAM, or 0
88 * Return VA for a given PA or 0 if not mapped
H A Dppc_mmu_32.c50 * Return PA for this VA if it is mapped by a BAT, or 0
62 * Return VA for a given PA or 0 if not mapped
H A Dpgtable_32.c294 /* Use upper 10 bits of VA to index the first level map */ map_page()
296 /* Use middle 10 bits of VA to index the second-level map */ map_page()
H A Dhash_native_64.c478 * instruction compares entry_VA in tlb with the VA specified native_hugepage_invalidate()
/linux-4.1.27/arch/arm/mach-integrator/
H A Dintegrator_ap.c63 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
66 * Setup a VA for the Integrator interrupt controller (for header #0,
H A Dhardware.h27 #define IO_BASE 0xF0000000 // VA of IO
/linux-4.1.27/include/drm/
H A Ddrm_gem.h8 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
31 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Ddrm_legacy.h8 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
31 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A DdrmP.h5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
/linux-4.1.27/arch/tile/include/hv/
H A Ddrv_xgbe_impl.h213 /** First VA available for packets. */
215 /** First VA in second range available for packets. */
267 uint32_t va; /**< VA of start of packet */
H A Ddrv_trio_intf.h99 * will require the kernel to allocate 4GB VA space
H A Dhypervisor.h668 * @param va VA of memory that is mapped.
851 * The supplied VA need not be aligned; it may be anywhere in the
870 * The supplied VA need not be aligned; it may be anywhere in the
2483 /** Index in L0 for a specific VA */
2489 /** Index in L1 for a specific VA */
2534 /** Index in L1 for a specific VA */
2540 /** Index in L1 for a specific VA */
2546 /** Index in level-2 page table for a specific VA */
2555 /** Index in L1 for a specific VA */
2562 /** Index in L1 for a specific VA */
2568 /** Index in level-2 page table for a specific VA */
H A Ddrv_xgbe_intf.h53 * Write-only; takes a uint32_t specifying the VA address. */
59 * Write-only; takes a uint32_t specifying the VA size. */
H A Diorpc.h188 * buffer VA and CPA as the data passes up to the hypervisor. Unlike
271 /** Prefix struct contains user VA and size. */
/linux-4.1.27/drivers/iommu/
H A Dipmmu-vmsa.c350 * the whole 32-bit VA space to TTBR0. ipmmu_domain_init_context()
433 * TODO: We need to look up the faulty device based on the I/O VA. Use ipmmu_domain_irq()
708 /* Attach the ARM VA mapping to the device. */ ipmmu_add_device()
711 dev_err(dev, "Failed to attach device to VA mapping\n"); ipmmu_add_device()
H A Dmsm_iommu.h73 * @base: IOMMU config port base address (VA)
H A Dmsm_iommu.c592 else /* Upper 20 bits from PAR, lower 12 from VA */ msm_iommu_iova_to_phys()
/linux-4.1.27/arch/x86/xen/
H A Dgrant-table.c10 * VA Linux Systems Japan. Split out x86 specific part.
H A Dsetup.c403 * If the PFNs are currently mapped, the VA mapping also needs xen_set_identity_and_remap_chunk()
/linux-4.1.27/arch/tile/mm/
H A Dpgtable.c393 * Convert a kernel VA to a PA and homing information.
508 /* Map an arbitrary MMIO address, homed according to pgprot, into VA space. */ ioremap_prot()
522 /* Create a read/write, MMIO VA mapping homed at the requested shim. */ ioremap_prot()
551 /* Unmap an MMIO VA mapping. */ iounmap()
H A Dinit.c223 * For a given kernel data VA, how should it be cached?
606 * VA-is-PA mappings, which cache everything locally. At that kernel_physical_mapping_init()
/linux-4.1.27/arch/x86/include/asm/
H A Defi.h14 * This is the main reason why we're doing stable VA mappings for RT
/linux-4.1.27/arch/mips/include/asm/fw/cfe/
H A Dcfe_api.h83 int64_t fwi_bootarea_va; /* VA of boot area */
/linux-4.1.27/drivers/usb/host/
H A Dehci-tilegx.c128 * we ought to set it to something, so we use the register VA. ehci_hcd_tilegx_drv_probe()
H A Dohci-tilegx.c122 * we ought to set it to something, so we use the register VA. ohci_hcd_tilegx_drv_probe()
/linux-4.1.27/arch/parisc/include/asm/
H A Dpage.h138 # define VA(x) ((x)+__PAGE_OFFSET) macro
/linux-4.1.27/arch/hexagon/include/asm/
H A Dprocessor.h69 * via MAP_FIXED at the lower * addresses starting at VA=0x0.
/linux-4.1.27/arch/hexagon/mm/
H A Dvm_fault.c179 die("Bad Kernel VA", regs, SIGKILL); do_page_fault()
H A Dinit.c218 * VA=PA+PAGE_OFFSET mapping. We go in and invalidate entries setup_arch_memory()
/linux-4.1.27/arch/arm/mach-tegra/
H A Dsleep.S122 * called with VA=PA mapping
/linux-4.1.27/arch/arm/mach-omap1/include/mach/
H A Domap1510.h53 #define OMAP1510_FPGA_BASE 0xE8000000 /* VA */
/linux-4.1.27/sound/soc/codecs/
H A Dcs42l52.c224 "0.5 +VA", "0.6 +VA", "0.7 +VA",
225 "0.8 +VA", "0.83 +VA", "0.91 +VA"
H A Dcs35l32.c41 "VA",
H A Dcs42xx8.c27 "VA",
H A Dcs42l56.c41 "VA",
/linux-4.1.27/arch/arm/mach-versatile/
H A Dcore.c62 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
65 * Setup a VA for the Versatile Vectored Interrupt Controller.
785 * Where is the timer (VA)?
/linux-4.1.27/arch/sparc/kernel/
H A Dsys_sparc_64.c44 /* Does addr --> addr+len fall within 4GB of the VA-space hole or
74 * the spitfire/niagara VA-hole.
H A Dpsycho_common.c97 printk(KERN_ERR "%s: STC_TAG(%d)[PA(%016llx)VA(%08llx)" psycho_check_stc_error()
H A Dcherrs.S390 sllx %g2, 1, %g2 /* IC_addr[13:6]==VA[12:5] */
/linux-4.1.27/drivers/infiniband/hw/amso1100/
H A Dc2.c1105 /* Remap the adapter HRXDQ PA space to kernel VA space */ c2_probe()
1114 /* Remap the adapter HTXDQ PA space to kernel VA space */ c2_probe()
1126 /* Remap the PCI registers in adapter BAR0 to kernel VA space */ c2_probe()
1134 /* Remap the PCI registers in adapter BAR4 to kernel VA space */ c2_probe()
/linux-4.1.27/drivers/firmware/efi/
H A Druntime-wrappers.c8 * Copyright (C) 1999 VA Linux Systems
/linux-4.1.27/arch/tile/lib/
H A Dcacheflush.c35 * Flush and invalidate a VA range that is homed remotely on a single
/linux-4.1.27/arch/x86/ia32/
H A Dsys_ia32.c5 * Copyright (C) 2000 VA Linux Co
/linux-4.1.27/drivers/gpu/drm/qxl/
H A Dqxl_drv.c21 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
/linux-4.1.27/drivers/usb/dwc2/
H A Dplatform.c214 dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n", dwc2_driver_probe()
/linux-4.1.27/arch/ia64/mm/
H A Dcontig.c10 * Copyright (C) 1999 VA Linux Systems
/linux-4.1.27/arch/arm/mach-realview/
H A Dcore.c355 * Where is the timer (VA)?
/linux-4.1.27/arch/arm/include/asm/
H A Dkvm_arm.h65 * AMO: Override CPSR.A and enable signaling with VA
H A Dkvm_mmu.h26 * We directly use the kernel VA for the HYP, as we can directly share
/linux-4.1.27/sound/soc/davinci/
H A Ddavinci-mcasp.h137 #define VA BIT(2) macro
/linux-4.1.27/drivers/xen/
H A Defi.c4 * Copyright (C) 1999 VA Linux Systems
/linux-4.1.27/drivers/infiniband/ulp/iser/
H A Diser_initiator.c87 iser_dbg("Cmd itt:%d READ tags RKEY:%#.4X VA:%#llX\n", iser_prepare_read_cmd()
145 "VA:%#llX + unsol:%d\n", iser_prepare_write_cmd()
/linux-4.1.27/drivers/gpu/drm/radeon/
H A Dradeon_drv.c9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
H A Dradeon_mode.h3 * VA Linux Systems Inc., Fremont, California.
/linux-4.1.27/arch/powerpc/kvm/
H A Dbook3s_32_mmu.c358 /* flush this VA on all cpus */ kvmppc_mmu_book3s_32_tlbie()
H A Dbook3s_64_mmu.c562 /* flush this VA on all vcpus */ kvmppc_mmu_book3s_64_tlbie()
/linux-4.1.27/arch/mips/cavium-octeon/
H A Dsetup.c528 * XKPHYS addresses with VA<48>==0 */ octeon_user_io_init()
532 * use XKPHYS addresses with VA<48>==1 */ octeon_user_io_init()
536 * XKPHYS addresses with VA<48>==1 */ octeon_user_io_init()
/linux-4.1.27/drivers/net/
H A Deql.c16 * McLean VA 22101
/linux-4.1.27/drivers/net/ethernet/tile/
H A Dtilepro.c466 panic("Non-HFH ingress buffer! VA=%p Mode=%d PTE=%llx", tile_net_provide_needed_buffer()
778 "VA=%p, skb=%p, skb->data=%p\n", tile_net_poll_aux()
1898 panic("Non-HFH egress buffer! VA=%p Mode=%d PTE=%llx", tile_net_tx()
2269 * to be able to finv() with a VA if we don't have hash_default. tile_net_setup()
H A Dtilegx.c610 /* Get the VA (including NET_IP_ALIGN bytes of "headroom"). */ tile_net_handle_packet()
1629 /* Determine the VA for a fragment. */ tile_net_frag_buf()
/linux-4.1.27/arch/mips/mm/
H A Dcerr-sb1.c389 printk(" %d [VA %016llx] [Vld? %d] raw tags: %08X-%016llX\n", extract_ic()
/linux-4.1.27/arch/alpha/kernel/
H A Dcore_mcpcia.c495 printk(" Effective VA = %16lx\n", mcpcia_print_uncorrectable()
/linux-4.1.27/arch/arm64/kvm/
H A Dhyp.S1017 * We could do so much better if we had the VA as well.
1229 * Resolve the IPA the hard way using the guest VA.
/linux-4.1.27/ipc/
H A Dcompat.c7 * Copyright (C) 2000 VA Linux Co
/linux-4.1.27/arch/powerpc/include/asm/
H A Dmmu-hash64.h239 * The AVA field omits the low-order 23 bits of the 78 bits VA. hpte_encode_avpn()
/linux-4.1.27/arch/arm/mach-pxa/
H A Draumfeld.c601 ret = gpio_request(GPIO_TFT_VA_EN, "display VA enable"); raumfeld_lcd_init()
/linux-4.1.27/net/
H A Dcompat.c4 * Copyright (C) 2000 VA Linux Co
/linux-4.1.27/drivers/media/platform/omap3isp/
H A Disp.c2197 /* Attach the ARM VA mapping to the device. */ isp_attach_iommu()
2200 dev_err(isp->dev, "failed to attach device to VA mapping\n"); isp_attach_iommu()
/linux-4.1.27/drivers/infiniband/hw/nes/
H A Dnes.c544 /* Remap the PCI registers in adapter BAR0 to kernel VA space */ nes_probe()
/linux-4.1.27/arch/x86/mm/
H A Dfault.c300 * Did it hit the DOS screen memory VA from vm86 mode?

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