Searched refs:ctl (Results 1 - 200 of 507) sorted by relevance

123

/linux-4.1.27/drivers/thunderbolt/
H A DMakefile2 thunderbolt-objs := nhi.o ctl.o tb.o switch.o cap.o path.o tunnel_pci.o eeprom.o
H A Dctl.c14 #include "ctl.h"
18 struct tb_ctl *ctl; member in struct:ctl_pkg
43 #define tb_ctl_WARN(ctl, format, arg...) \
44 dev_WARN(&(ctl)->nhi->pdev->dev, format, ## arg)
46 #define tb_ctl_err(ctl, format, arg...) \
47 dev_err(&(ctl)->nhi->pdev->dev, format, ## arg)
49 #define tb_ctl_warn(ctl, format, arg...) \
50 dev_warn(&(ctl)->nhi->pdev->dev, format, ## arg)
52 #define tb_ctl_info(ctl, format, arg...) \
53 dev_info(&(ctl)->nhi->pdev->dev, format, ## arg)
237 static void tb_cfg_print_error(struct tb_ctl *ctl, tb_cfg_print_error() argument
251 tb_ctl_WARN(ctl, tb_cfg_print_error()
261 tb_ctl_WARN(ctl, "CFG_ERROR(%llx:%x): Invalid port\n", tb_cfg_print_error()
265 tb_ctl_WARN(ctl, "CFG_ERROR(%llx:%x): Route contains a loop\n", tb_cfg_print_error()
270 tb_ctl_WARN(ctl, "CFG_ERROR(%llx:%x): Unknown error\n", tb_cfg_print_error()
298 dma_pool_free(pkg->ctl->frame_pool, tb_ctl_pkg_free()
304 static struct ctl_pkg *tb_ctl_pkg_alloc(struct tb_ctl *ctl) tb_ctl_pkg_alloc() argument
309 pkg->ctl = ctl; tb_ctl_pkg_alloc()
310 pkg->buffer = dma_pool_alloc(ctl->frame_pool, GFP_KERNEL, tb_ctl_pkg_alloc()
336 static int tb_ctl_tx(struct tb_ctl *ctl, void *data, size_t len, tb_ctl_tx() argument
342 tb_ctl_WARN(ctl, "TX: invalid size: %zu\n", len); tb_ctl_tx()
346 tb_ctl_WARN(ctl, "TX: packet too large: %zu/%d\n", tb_ctl_tx()
350 pkg = tb_ctl_pkg_alloc(ctl); tb_ctl_tx()
360 res = ring_tx(ctl->tx, &pkg->frame); tb_ctl_tx()
367 * tb_ctl_handle_plug_event() - acknowledge a plug event, invoke ctl->callback
369 static void tb_ctl_handle_plug_event(struct tb_ctl *ctl, tb_ctl_handle_plug_event() argument
376 tb_ctl_warn(ctl, "malformed TB_CFG_PKG_EVENT\n"); tb_ctl_handle_plug_event()
380 if (tb_cfg_error(ctl, route, pkg->port, TB_CFG_ERROR_ACK_PLUG_EVENT)) tb_ctl_handle_plug_event()
381 tb_ctl_warn(ctl, "could not ack plug event on %llx:%x\n", tb_ctl_handle_plug_event()
384 ctl->callback(ctl->callback_data, route, pkg->port, pkg->unplug); tb_ctl_handle_plug_event()
389 ring_rx(pkg->ctl->rx, &pkg->frame); /* tb_ctl_rx_submit()
392 * from ctl->rx_packets, so we do tb_ctl_rx_submit()
405 * ctl->rx_packets. tb_ctl_rx_callback()
409 tb_ctl_err(pkg->ctl, "RX: invalid size %#x, dropping packet\n", tb_ctl_rx_callback()
417 tb_ctl_err(pkg->ctl, tb_ctl_rx_callback()
424 tb_ctl_handle_plug_event(pkg->ctl, pkg); tb_ctl_rx_callback()
427 if (!kfifo_put(&pkg->ctl->response_fifo, pkg)) { tb_ctl_rx_callback()
428 tb_ctl_err(pkg->ctl, "RX: fifo is full\n"); tb_ctl_rx_callback()
431 complete(&pkg->ctl->response_ready); tb_ctl_rx_callback()
440 static struct tb_cfg_result tb_ctl_rx(struct tb_ctl *ctl, void *buffer, tb_ctl_rx() argument
447 if (!wait_for_completion_timeout(&ctl->response_ready, tb_ctl_rx()
449 tb_ctl_WARN(ctl, "RX: timeout\n"); tb_ctl_rx()
452 if (!kfifo_get(&ctl->response_fifo, &pkg)) { tb_ctl_rx()
453 tb_ctl_WARN(ctl, "empty kfifo\n"); tb_ctl_rx()
477 struct tb_ctl *ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); tb_ctl_alloc() local
478 if (!ctl) tb_ctl_alloc()
480 ctl->nhi = nhi; tb_ctl_alloc()
481 ctl->callback = cb; tb_ctl_alloc()
482 ctl->callback_data = cb_data; tb_ctl_alloc()
484 init_completion(&ctl->response_ready); tb_ctl_alloc()
485 INIT_KFIFO(ctl->response_fifo); tb_ctl_alloc()
486 ctl->frame_pool = dma_pool_create("thunderbolt_ctl", &nhi->pdev->dev, tb_ctl_alloc()
488 if (!ctl->frame_pool) tb_ctl_alloc()
491 ctl->tx = ring_alloc_tx(nhi, 0, 10); tb_ctl_alloc()
492 if (!ctl->tx) tb_ctl_alloc()
495 ctl->rx = ring_alloc_rx(nhi, 0, 10); tb_ctl_alloc()
496 if (!ctl->rx) tb_ctl_alloc()
500 ctl->rx_packets[i] = tb_ctl_pkg_alloc(ctl); tb_ctl_alloc()
501 if (!ctl->rx_packets[i]) tb_ctl_alloc()
503 ctl->rx_packets[i]->frame.callback = tb_ctl_rx_callback; tb_ctl_alloc()
506 tb_ctl_info(ctl, "control channel created\n"); tb_ctl_alloc()
507 return ctl; tb_ctl_alloc()
509 tb_ctl_free(ctl); tb_ctl_alloc()
518 * Must NOT be called from ctl->callback.
520 void tb_ctl_free(struct tb_ctl *ctl) tb_ctl_free() argument
523 if (ctl->rx) tb_ctl_free()
524 ring_free(ctl->rx); tb_ctl_free()
525 if (ctl->tx) tb_ctl_free()
526 ring_free(ctl->tx); tb_ctl_free()
530 tb_ctl_pkg_free(ctl->rx_packets[i]); tb_ctl_free()
533 if (ctl->frame_pool) tb_ctl_free()
534 dma_pool_destroy(ctl->frame_pool); tb_ctl_free()
535 kfree(ctl); tb_ctl_free()
541 void tb_ctl_start(struct tb_ctl *ctl) tb_ctl_start() argument
544 tb_ctl_info(ctl, "control channel starting...\n"); tb_ctl_start()
545 ring_start(ctl->tx); /* is used to ack hotplug packets, start first */ tb_ctl_start()
546 ring_start(ctl->rx); tb_ctl_start()
548 tb_ctl_rx_submit(ctl->rx_packets[i]); tb_ctl_start()
554 * All invocations of ctl->callback will have finished after this method
557 * Must NOT be called from ctl->callback.
559 void tb_ctl_stop(struct tb_ctl *ctl) tb_ctl_stop() argument
561 ring_stop(ctl->rx); tb_ctl_stop()
562 ring_stop(ctl->tx); tb_ctl_stop()
564 if (!kfifo_is_empty(&ctl->response_fifo)) tb_ctl_stop()
565 tb_ctl_WARN(ctl, "dangling response in response_fifo\n"); tb_ctl_stop()
566 kfifo_reset(&ctl->response_fifo); tb_ctl_stop()
567 tb_ctl_info(ctl, "control channel stopped\n"); tb_ctl_stop()
577 int tb_cfg_error(struct tb_ctl *ctl, u64 route, u32 port, tb_cfg_error() argument
585 tb_ctl_info(ctl, "resetting error on %llx:%x.\n", route, port); tb_cfg_error()
586 return tb_ctl_tx(ctl, &pkg, sizeof(pkg), TB_CFG_PKG_ERROR); tb_cfg_error()
596 struct tb_cfg_result tb_cfg_reset(struct tb_ctl *ctl, u64 route, tb_cfg_reset() argument
603 err = tb_ctl_tx(ctl, &request, sizeof(request), TB_CFG_PKG_RESET); tb_cfg_reset()
607 return tb_ctl_rx(ctl, &reply, sizeof(reply), timeout_msec, route, tb_cfg_reset()
616 struct tb_cfg_result tb_cfg_read_raw(struct tb_ctl *ctl, void *buffer, tb_cfg_read_raw() argument
632 res.err = tb_ctl_tx(ctl, &request, sizeof(request), TB_CFG_PKG_READ); tb_cfg_read_raw()
636 res = tb_ctl_rx(ctl, &reply, 12 + 4 * length, timeout_msec, route, tb_cfg_read_raw()
653 struct tb_cfg_result tb_cfg_write_raw(struct tb_ctl *ctl, void *buffer, tb_cfg_write_raw() argument
671 res.err = tb_ctl_tx(ctl, &request, 12 + 4 * length, TB_CFG_PKG_WRITE); tb_cfg_write_raw()
675 res = tb_ctl_rx(ctl, &reply, sizeof(reply), timeout_msec, route, tb_cfg_write_raw()
685 int tb_cfg_read(struct tb_ctl *ctl, void *buffer, u64 route, u32 port, tb_cfg_read() argument
688 struct tb_cfg_result res = tb_cfg_read_raw(ctl, buffer, route, port, tb_cfg_read()
691 tb_cfg_print_error(ctl, &res); tb_cfg_read()
698 int tb_cfg_write(struct tb_ctl *ctl, void *buffer, u64 route, u32 port, tb_cfg_write() argument
701 struct tb_cfg_result res = tb_cfg_write_raw(ctl, buffer, route, port, tb_cfg_write()
704 tb_cfg_print_error(ctl, &res); tb_cfg_write()
720 int tb_cfg_get_upstream_port(struct tb_ctl *ctl, u64 route) tb_cfg_get_upstream_port() argument
723 struct tb_cfg_result res = tb_cfg_read_raw(ctl, &dummy, route, 0, tb_cfg_get_upstream_port()
H A Dctl.h18 void tb_ctl_start(struct tb_ctl *ctl);
19 void tb_ctl_stop(struct tb_ctl *ctl);
20 void tb_ctl_free(struct tb_ctl *ctl);
56 int tb_cfg_error(struct tb_ctl *ctl, u64 route, u32 port,
58 struct tb_cfg_result tb_cfg_reset(struct tb_ctl *ctl, u64 route,
60 struct tb_cfg_result tb_cfg_read_raw(struct tb_ctl *ctl, void *buffer,
64 struct tb_cfg_result tb_cfg_write_raw(struct tb_ctl *ctl, void *buffer,
68 int tb_cfg_read(struct tb_ctl *ctl, void *buffer, u64 route, u32 port,
70 int tb_cfg_write(struct tb_ctl *ctl, void *buffer, u64 route, u32 port,
72 int tb_cfg_get_upstream_port(struct tb_ctl *ctl, u64 route);
H A Deeprom.c14 static int tb_eeprom_ctl_write(struct tb_switch *sw, struct tb_eeprom_ctl *ctl) tb_eeprom_ctl_write() argument
16 return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1); tb_eeprom_ctl_write()
22 static int tb_eeprom_ctl_read(struct tb_switch *sw, struct tb_eeprom_ctl *ctl) tb_eeprom_ctl_read() argument
24 return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1); tb_eeprom_ctl_read()
40 struct tb_eeprom_ctl ctl; tb_eeprom_active() local
41 int res = tb_eeprom_ctl_read(sw, &ctl); tb_eeprom_active()
45 ctl.access_high = 1; tb_eeprom_active()
46 res = tb_eeprom_ctl_write(sw, &ctl); tb_eeprom_active()
49 ctl.access_low = 0; tb_eeprom_active()
50 return tb_eeprom_ctl_write(sw, &ctl); tb_eeprom_active()
52 ctl.access_low = 1; tb_eeprom_active()
53 res = tb_eeprom_ctl_write(sw, &ctl); tb_eeprom_active()
56 ctl.access_high = 0; tb_eeprom_active()
57 return tb_eeprom_ctl_write(sw, &ctl); tb_eeprom_active()
64 * If TB_EEPROM_IN is passed, then the bit can be retrieved from ctl->data_in.
65 * If TB_EEPROM_OUT is passed, then ctl->data_out will be written.
67 static int tb_eeprom_transfer(struct tb_switch *sw, struct tb_eeprom_ctl *ctl, tb_eeprom_transfer() argument
72 res = tb_eeprom_ctl_write(sw, ctl); tb_eeprom_transfer()
76 ctl->clock = 1; tb_eeprom_transfer()
77 res = tb_eeprom_ctl_write(sw, ctl); tb_eeprom_transfer()
81 res = tb_eeprom_ctl_read(sw, ctl); tb_eeprom_transfer()
85 ctl->clock = 0; tb_eeprom_transfer()
86 return tb_eeprom_ctl_write(sw, ctl); tb_eeprom_transfer()
94 struct tb_eeprom_ctl ctl; tb_eeprom_out() local
96 int res = tb_eeprom_ctl_read(sw, &ctl); tb_eeprom_out()
100 ctl.data_out = val & 0x80; tb_eeprom_out()
101 res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_OUT); tb_eeprom_out()
114 struct tb_eeprom_ctl ctl; tb_eeprom_in() local
116 int res = tb_eeprom_ctl_read(sw, &ctl); tb_eeprom_in()
122 res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_IN); tb_eeprom_in()
125 *val |= ctl.data_in; tb_eeprom_in()
H A Dtb.c323 if (tb->ctl) { thunderbolt_shutdown_and_free()
324 tb_ctl_stop(tb->ctl); thunderbolt_shutdown_and_free()
325 tb_ctl_free(tb->ctl); thunderbolt_shutdown_and_free()
327 tb->ctl = NULL; thunderbolt_shutdown_and_free()
370 tb->ctl = tb_ctl_alloc(tb->nhi, tb_schedule_hotplug_handler, tb); thunderbolt_alloc_and_start()
371 if (!tb->ctl) thunderbolt_alloc_and_start()
377 tb_ctl_start(tb->ctl); thunderbolt_alloc_and_start()
403 tb_ctl_stop(tb->ctl); thunderbolt_suspend()
414 tb_ctl_start(tb->ctl); thunderbolt_resume()
H A Dtb.h13 #include "ctl.h"
105 struct tb_ctl *ctl; member in struct:tb
143 return tb_cfg_read(sw->tb->ctl, tb_sw_read()
155 return tb_cfg_write(sw->tb->ctl, tb_sw_write()
167 return tb_cfg_read(port->sw->tb->ctl, tb_port_read()
179 return tb_cfg_write(port->sw->tb->ctl, tb_port_write()
H A Dswitch.c244 res.err = tb_cfg_write(tb->ctl, ((u32 *) &header) + 2, route, tb_switch_reset()
248 res = tb_cfg_reset(tb->ctl, route, TB_CFG_DEFAULT_TIMEOUT); tb_switch_reset()
344 int upstream_port = tb_cfg_get_upstream_port(tb->ctl, route); tb_switch_alloc()
353 if (tb_cfg_read(tb->ctl, &sw->config, route, 0, 2, 0, 5)) tb_switch_alloc()
/linux-4.1.27/sound/pci/ice1712/
H A Dwm8766.c161 memcpy(wm->ctl, snd_wm8766_default_ctl, sizeof(wm->ctl)); snd_wm8766_init()
202 uinfo->count = (wm->ctl[n].flags & WM8766_FLAG_STEREO) ? 2 : 1; snd_wm8766_volume_info()
203 uinfo->value.integer.min = wm->ctl[n].min; snd_wm8766_volume_info()
204 uinfo->value.integer.max = wm->ctl[n].max; snd_wm8766_volume_info()
215 return snd_ctl_enum_info(uinfo, 1, wm->ctl[n].max, snd_wm8766_enum_info()
216 wm->ctl[n].enum_names); snd_wm8766_enum_info()
226 if (wm->ctl[n].get) snd_wm8766_ctl_get()
227 wm->ctl[n].get(wm, &val1, &val2); snd_wm8766_ctl_get()
229 val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1; snd_wm8766_ctl_get()
230 val1 >>= __ffs(wm->ctl[n].mask1); snd_wm8766_ctl_get()
231 if (wm->ctl[n].flags & WM8766_FLAG_STEREO) { snd_wm8766_ctl_get()
232 val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2; snd_wm8766_ctl_get()
233 val2 >>= __ffs(wm->ctl[n].mask2); snd_wm8766_ctl_get()
234 if (wm->ctl[n].flags & WM8766_FLAG_VOL_UPDATE) snd_wm8766_ctl_get()
238 if (wm->ctl[n].flags & WM8766_FLAG_INVERT) { snd_wm8766_ctl_get()
239 val1 = wm->ctl[n].max - (val1 - wm->ctl[n].min); snd_wm8766_ctl_get()
240 if (wm->ctl[n].flags & WM8766_FLAG_STEREO) snd_wm8766_ctl_get()
241 val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min); snd_wm8766_ctl_get()
244 if (wm->ctl[n].flags & WM8766_FLAG_STEREO) snd_wm8766_ctl_get()
260 if (wm->ctl[n].flags & WM8766_FLAG_INVERT) { snd_wm8766_ctl_put()
261 regval1 = wm->ctl[n].max - (regval1 - wm->ctl[n].min); snd_wm8766_ctl_put()
262 regval2 = wm->ctl[n].max - (regval2 - wm->ctl[n].min); snd_wm8766_ctl_put()
264 if (wm->ctl[n].set) snd_wm8766_ctl_put()
265 wm->ctl[n].set(wm, regval1, regval2); snd_wm8766_ctl_put()
267 val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1; snd_wm8766_ctl_put()
268 val |= regval1 << __ffs(wm->ctl[n].mask1); snd_wm8766_ctl_put()
270 if (wm->ctl[n].flags & WM8766_FLAG_STEREO && snd_wm8766_ctl_put()
271 wm->ctl[n].reg1 == wm->ctl[n].reg2) { snd_wm8766_ctl_put()
272 val &= ~wm->ctl[n].mask2; snd_wm8766_ctl_put()
273 val |= regval2 << __ffs(wm->ctl[n].mask2); snd_wm8766_ctl_put()
275 snd_wm8766_write(wm, wm->ctl[n].reg1, val); snd_wm8766_ctl_put()
277 if (wm->ctl[n].flags & WM8766_FLAG_STEREO && snd_wm8766_ctl_put()
278 wm->ctl[n].reg1 != wm->ctl[n].reg2) { snd_wm8766_ctl_put()
279 val = wm->regs[wm->ctl[n].reg2] & ~wm->ctl[n].mask2; snd_wm8766_ctl_put()
280 val |= regval2 << __ffs(wm->ctl[n].mask2); snd_wm8766_ctl_put()
281 if (wm->ctl[n].flags & WM8766_FLAG_VOL_UPDATE) snd_wm8766_ctl_put()
283 snd_wm8766_write(wm, wm->ctl[n].reg2, val); snd_wm8766_ctl_put()
293 struct snd_kcontrol *ctl; snd_wm8766_add_control() local
298 cont.name = wm->ctl[num].name; snd_wm8766_add_control()
300 if (wm->ctl[num].flags & WM8766_FLAG_LIM || snd_wm8766_add_control()
301 wm->ctl[num].flags & WM8766_FLAG_ALC) snd_wm8766_add_control()
307 switch (wm->ctl[num].type) { snd_wm8766_add_control()
311 cont.tlv.p = wm->ctl[num].tlv; snd_wm8766_add_control()
314 wm->ctl[num].max = 1; snd_wm8766_add_control()
315 if (wm->ctl[num].flags & WM8766_FLAG_STEREO) snd_wm8766_add_control()
326 ctl = snd_ctl_new1(&cont, wm); snd_wm8766_add_control()
327 if (!ctl) snd_wm8766_add_control()
329 wm->ctl[num].kctl = ctl; snd_wm8766_add_control()
331 return snd_ctl_add(wm->card, ctl); snd_wm8766_add_control()
339 if (wm->ctl[i].name) { snd_wm8766_build_controls()
H A Dwm8776.c90 if (wm->ctl[i].flags & flags_off) snd_wm8776_update_agc_ctl()
91 snd_wm8776_activate_ctl(wm, wm->ctl[i].name, false); snd_wm8776_update_agc_ctl()
92 else if (wm->ctl[i].flags & flags_on) snd_wm8776_update_agc_ctl()
93 snd_wm8776_activate_ctl(wm, wm->ctl[i].name, true); snd_wm8776_update_agc_ctl()
438 memcpy(wm->ctl, snd_wm8776_default_ctl, sizeof(wm->ctl)); snd_wm8776_init()
476 uinfo->count = (wm->ctl[n].flags & WM8776_FLAG_STEREO) ? 2 : 1; snd_wm8776_volume_info()
477 uinfo->value.integer.min = wm->ctl[n].min; snd_wm8776_volume_info()
478 uinfo->value.integer.max = wm->ctl[n].max; snd_wm8776_volume_info()
489 return snd_ctl_enum_info(uinfo, 1, wm->ctl[n].max, snd_wm8776_enum_info()
490 wm->ctl[n].enum_names); snd_wm8776_enum_info()
500 if (wm->ctl[n].get) snd_wm8776_ctl_get()
501 wm->ctl[n].get(wm, &val1, &val2); snd_wm8776_ctl_get()
503 val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1; snd_wm8776_ctl_get()
504 val1 >>= __ffs(wm->ctl[n].mask1); snd_wm8776_ctl_get()
505 if (wm->ctl[n].flags & WM8776_FLAG_STEREO) { snd_wm8776_ctl_get()
506 val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2; snd_wm8776_ctl_get()
507 val2 >>= __ffs(wm->ctl[n].mask2); snd_wm8776_ctl_get()
508 if (wm->ctl[n].flags & WM8776_FLAG_VOL_UPDATE) snd_wm8776_ctl_get()
512 if (wm->ctl[n].flags & WM8776_FLAG_INVERT) { snd_wm8776_ctl_get()
513 val1 = wm->ctl[n].max - (val1 - wm->ctl[n].min); snd_wm8776_ctl_get()
514 if (wm->ctl[n].flags & WM8776_FLAG_STEREO) snd_wm8776_ctl_get()
515 val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min); snd_wm8776_ctl_get()
518 if (wm->ctl[n].flags & WM8776_FLAG_STEREO) snd_wm8776_ctl_get()
534 if (wm->ctl[n].flags & WM8776_FLAG_INVERT) { snd_wm8776_ctl_put()
535 regval1 = wm->ctl[n].max - (regval1 - wm->ctl[n].min); snd_wm8776_ctl_put()
536 regval2 = wm->ctl[n].max - (regval2 - wm->ctl[n].min); snd_wm8776_ctl_put()
538 if (wm->ctl[n].set) snd_wm8776_ctl_put()
539 wm->ctl[n].set(wm, regval1, regval2); snd_wm8776_ctl_put()
541 val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1; snd_wm8776_ctl_put()
542 val |= regval1 << __ffs(wm->ctl[n].mask1); snd_wm8776_ctl_put()
544 if (wm->ctl[n].flags & WM8776_FLAG_STEREO && snd_wm8776_ctl_put()
545 wm->ctl[n].reg1 == wm->ctl[n].reg2) { snd_wm8776_ctl_put()
546 val &= ~wm->ctl[n].mask2; snd_wm8776_ctl_put()
547 val |= regval2 << __ffs(wm->ctl[n].mask2); snd_wm8776_ctl_put()
549 snd_wm8776_write(wm, wm->ctl[n].reg1, val); snd_wm8776_ctl_put()
551 if (wm->ctl[n].flags & WM8776_FLAG_STEREO && snd_wm8776_ctl_put()
552 wm->ctl[n].reg1 != wm->ctl[n].reg2) { snd_wm8776_ctl_put()
553 val = wm->regs[wm->ctl[n].reg2] & ~wm->ctl[n].mask2; snd_wm8776_ctl_put()
554 val |= regval2 << __ffs(wm->ctl[n].mask2); snd_wm8776_ctl_put()
555 if (wm->ctl[n].flags & WM8776_FLAG_VOL_UPDATE) snd_wm8776_ctl_put()
557 snd_wm8776_write(wm, wm->ctl[n].reg2, val); snd_wm8776_ctl_put()
567 struct snd_kcontrol *ctl; snd_wm8776_add_control() local
572 cont.name = wm->ctl[num].name; snd_wm8776_add_control()
574 if (wm->ctl[num].flags & WM8776_FLAG_LIM || snd_wm8776_add_control()
575 wm->ctl[num].flags & WM8776_FLAG_ALC) snd_wm8776_add_control()
581 switch (wm->ctl[num].type) { snd_wm8776_add_control()
585 cont.tlv.p = wm->ctl[num].tlv; snd_wm8776_add_control()
588 wm->ctl[num].max = 1; snd_wm8776_add_control()
589 if (wm->ctl[num].flags & WM8776_FLAG_STEREO) snd_wm8776_add_control()
600 ctl = snd_ctl_new1(&cont, wm); snd_wm8776_add_control()
601 if (!ctl) snd_wm8776_add_control()
604 return snd_ctl_add(wm->card, ctl); snd_wm8776_add_control()
612 if (wm->ctl[i].name) { snd_wm8776_build_controls()
H A Dpsc724.c211 strlcpy(elem_id.name, spec->wm8776.ctl[WM8776_CTL_HP_SW].name, psc724_set_jack_state()
322 struct snd_kcontrol *ctl; psc724_add_controls() local
326 spec->wm8776.ctl[WM8776_CTL_DAC_VOL].name = front_volume; psc724_add_controls()
327 spec->wm8776.ctl[WM8776_CTL_DAC_SW].name = front_switch; psc724_add_controls()
328 spec->wm8776.ctl[WM8776_CTL_DAC_ZC_SW].name = front_zc; psc724_add_controls()
329 spec->wm8776.ctl[WM8776_CTL_AUX_SW].name = NULL; psc724_add_controls()
330 spec->wm8776.ctl[WM8776_CTL_DAC_IZD_SW].name = front_izd; psc724_add_controls()
331 spec->wm8776.ctl[WM8776_CTL_PHASE_SW].name = front_phase; psc724_add_controls()
332 spec->wm8776.ctl[WM8776_CTL_DEEMPH_SW].name = front_deemph; psc724_add_controls()
333 spec->wm8776.ctl[WM8776_CTL_INPUT1_SW].name = ain1_switch; psc724_add_controls()
334 spec->wm8776.ctl[WM8776_CTL_INPUT2_SW].name = ain2_switch; psc724_add_controls()
335 spec->wm8776.ctl[WM8776_CTL_INPUT3_SW].name = ain3_switch; psc724_add_controls()
336 spec->wm8776.ctl[WM8776_CTL_INPUT4_SW].name = ain4_switch; psc724_add_controls()
337 spec->wm8776.ctl[WM8776_CTL_INPUT5_SW].name = ain5_switch; psc724_add_controls()
339 spec->wm8766.ctl[WM8766_CTL_CH1_VOL].name = rear_volume; psc724_add_controls()
340 spec->wm8766.ctl[WM8766_CTL_CH2_VOL].name = clfe_volume; psc724_add_controls()
341 spec->wm8766.ctl[WM8766_CTL_CH3_VOL].name = NULL; psc724_add_controls()
342 spec->wm8766.ctl[WM8766_CTL_CH1_SW].name = rear_switch; psc724_add_controls()
343 spec->wm8766.ctl[WM8766_CTL_CH2_SW].name = clfe_switch; psc724_add_controls()
344 spec->wm8766.ctl[WM8766_CTL_CH3_SW].name = NULL; psc724_add_controls()
345 spec->wm8766.ctl[WM8766_CTL_PHASE1_SW].name = rear_phase; psc724_add_controls()
346 spec->wm8766.ctl[WM8766_CTL_PHASE2_SW].name = clfe_phase; psc724_add_controls()
347 spec->wm8766.ctl[WM8766_CTL_PHASE3_SW].name = NULL; psc724_add_controls()
348 spec->wm8766.ctl[WM8766_CTL_DEEMPH1_SW].name = rear_deemph; psc724_add_controls()
349 spec->wm8766.ctl[WM8766_CTL_DEEMPH2_SW].name = clfe_deemph; psc724_add_controls()
350 spec->wm8766.ctl[WM8766_CTL_DEEMPH3_SW].name = NULL; psc724_add_controls()
351 spec->wm8766.ctl[WM8766_CTL_IZD_SW].name = rear_clfe_izd; psc724_add_controls()
352 spec->wm8766.ctl[WM8766_CTL_ZC_SW].name = rear_clfe_zc; psc724_add_controls()
364 ctl = snd_ctl_new1(&cont, ice); psc724_add_controls()
365 if (!ctl) psc724_add_controls()
367 err = snd_ctl_add(ice->card, ctl); psc724_add_controls()
/linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp5/
H A Dmdp5_ctl.c91 void ctl_write(struct mdp5_ctl *ctl, u32 reg, u32 data) ctl_write() argument
93 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); ctl_write()
95 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ ctl_write()
100 u32 ctl_read(struct mdp5_ctl *ctl, u32 reg) ctl_read() argument
102 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); ctl_read()
104 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ ctl_read()
143 static void set_ctl_op(struct mdp5_ctl *ctl, struct mdp5_interface *intf) set_ctl_op() argument
166 spin_lock_irqsave(&ctl->hw_lock, flags); set_ctl_op()
167 ctl_write(ctl, REG_MDP5_CTL_OP(ctl->id), ctl_op); set_ctl_op()
168 spin_unlock_irqrestore(&ctl->hw_lock, flags); set_ctl_op()
171 int mdp5_ctl_set_intf(struct mdp5_ctl *ctl, struct mdp5_interface *intf) mdp5_ctl_set_intf() argument
173 struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm; mdp5_ctl_set_intf()
176 memcpy(&ctl->pipeline.intf, intf, sizeof(*intf)); mdp5_ctl_set_intf()
178 ctl->pipeline.start_mask = mdp_ctl_flush_mask_lm(ctl->lm) | mdp5_ctl_set_intf()
185 set_ctl_op(ctl, intf); mdp5_ctl_set_intf()
190 static bool start_signal_needed(struct mdp5_ctl *ctl) start_signal_needed() argument
192 struct op_mode *pipeline = &ctl->pipeline; start_signal_needed()
214 static void send_start_signal(struct mdp5_ctl *ctl) send_start_signal() argument
218 spin_lock_irqsave(&ctl->hw_lock, flags); send_start_signal()
219 ctl_write(ctl, REG_MDP5_CTL_START(ctl->id), 1); send_start_signal()
220 spin_unlock_irqrestore(&ctl->hw_lock, flags); send_start_signal()
223 static void refill_start_mask(struct mdp5_ctl *ctl) refill_start_mask() argument
225 struct op_mode *pipeline = &ctl->pipeline; refill_start_mask()
226 struct mdp5_interface *intf = &ctl->pipeline.intf; refill_start_mask()
228 pipeline->start_mask = mdp_ctl_flush_mask_lm(ctl->lm); refill_start_mask()
246 int mdp5_ctl_set_encoder_state(struct mdp5_ctl *ctl, bool enabled) mdp5_ctl_set_encoder_state() argument
248 if (WARN_ON(!ctl)) mdp5_ctl_set_encoder_state()
251 ctl->pipeline.encoder_enabled = enabled; mdp5_ctl_set_encoder_state()
252 DBG("intf_%d: %s", ctl->pipeline.intf.num, enabled ? "on" : "off"); mdp5_ctl_set_encoder_state()
254 if (start_signal_needed(ctl)) { mdp5_ctl_set_encoder_state()
255 send_start_signal(ctl); mdp5_ctl_set_encoder_state()
256 refill_start_mask(ctl); mdp5_ctl_set_encoder_state()
267 int mdp5_ctl_set_cursor(struct mdp5_ctl *ctl, int cursor_id, bool enable) mdp5_ctl_set_cursor() argument
269 struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm; mdp5_ctl_set_cursor()
272 int lm = ctl->lm; mdp5_ctl_set_cursor()
276 ctl->id, lm); mdp5_ctl_set_cursor()
280 spin_lock_irqsave(&ctl->hw_lock, flags); mdp5_ctl_set_cursor()
282 blend_cfg = ctl_read(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, lm)); mdp5_ctl_set_cursor()
289 ctl_write(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, lm), blend_cfg); mdp5_ctl_set_cursor()
291 spin_unlock_irqrestore(&ctl->hw_lock, flags); mdp5_ctl_set_cursor()
293 ctl->pending_ctl_trigger = mdp_ctl_flush_mask_cursor(cursor_id); mdp5_ctl_set_cursor()
294 ctl->cursor_on = enable; mdp5_ctl_set_cursor()
299 int mdp5_ctl_blend(struct mdp5_ctl *ctl, u32 lm, u32 blend_cfg) mdp5_ctl_blend() argument
303 if (ctl->cursor_on) mdp5_ctl_blend()
308 spin_lock_irqsave(&ctl->hw_lock, flags); mdp5_ctl_blend()
309 ctl_write(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, lm), blend_cfg); mdp5_ctl_blend()
310 spin_unlock_irqrestore(&ctl->hw_lock, flags); mdp5_ctl_blend()
312 ctl->pending_ctl_trigger = mdp_ctl_flush_mask_lm(lm); mdp5_ctl_blend()
368 static u32 fix_sw_flush(struct mdp5_ctl *ctl, u32 flush_mask) fix_sw_flush() argument
370 struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm; fix_sw_flush()
377 sw_mask |= mdp_ctl_flush_mask_lm(ctl->lm); fix_sw_flush()
394 * ctl->pending_ctl_trigger.
396 int mdp5_ctl_commit(struct mdp5_ctl *ctl, u32 flush_mask) mdp5_ctl_commit() argument
398 struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm; mdp5_ctl_commit()
399 struct op_mode *pipeline = &ctl->pipeline; mdp5_ctl_commit()
405 pipeline->start_mask, ctl->pending_ctl_trigger); mdp5_ctl_commit()
407 if (ctl->pending_ctl_trigger & flush_mask) { mdp5_ctl_commit()
409 ctl->pending_ctl_trigger = 0; mdp5_ctl_commit()
412 flush_mask |= fix_sw_flush(ctl, flush_mask); mdp5_ctl_commit()
417 spin_lock_irqsave(&ctl->hw_lock, flags); mdp5_ctl_commit()
418 ctl_write(ctl, REG_MDP5_CTL_FLUSH(ctl->id), flush_mask); mdp5_ctl_commit()
419 spin_unlock_irqrestore(&ctl->hw_lock, flags); mdp5_ctl_commit()
422 if (start_signal_needed(ctl)) { mdp5_ctl_commit()
423 send_start_signal(ctl); mdp5_ctl_commit()
424 refill_start_mask(ctl); mdp5_ctl_commit()
430 void mdp5_ctl_release(struct mdp5_ctl *ctl) mdp5_ctl_release() argument
432 struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm; mdp5_ctl_release()
435 if (unlikely(WARN_ON(ctl->id >= MAX_CTL) || !ctl->busy)) { mdp5_ctl_release()
437 ctl->id, ctl->busy); mdp5_ctl_release()
442 ctl->busy = false; mdp5_ctl_release()
445 DBG("CTL %d released", ctl->id); mdp5_ctl_release()
448 int mdp5_ctl_get_ctl_id(struct mdp5_ctl *ctl) mdp5_ctl_get_ctl_id() argument
450 return WARN_ON(!ctl) ? -EINVAL : ctl->id; mdp5_ctl_get_ctl_id()
463 struct mdp5_ctl *ctl = NULL; mdp5_ctlm_request() local
478 ctl = &ctl_mgr->ctls[c]; mdp5_ctlm_request()
480 ctl->lm = mdp5_crtc_get_lm(crtc); mdp5_ctlm_request()
481 ctl->crtc = crtc; mdp5_ctlm_request()
482 ctl->busy = true; mdp5_ctlm_request()
483 ctl->pending_ctl_trigger = 0; mdp5_ctlm_request()
484 DBG("CTL %d allocated", ctl->id); mdp5_ctlm_request()
488 return ctl; mdp5_ctlm_request()
497 struct mdp5_ctl *ctl = &ctl_mgr->ctls[c]; mdp5_ctlm_hw_reset() local
499 spin_lock_irqsave(&ctl->hw_lock, flags); mdp5_ctlm_hw_reset()
500 ctl_write(ctl, REG_MDP5_CTL_OP(ctl->id), 0); mdp5_ctlm_hw_reset()
501 spin_unlock_irqrestore(&ctl->hw_lock, flags); mdp5_ctlm_hw_reset()
514 const struct mdp5_ctl_block *ctl_cfg = &hw_cfg->ctl; mdp5_ctlm_init()
542 struct mdp5_ctl *ctl = &ctl_mgr->ctls[c]; mdp5_ctlm_init() local
549 ctl->ctlm = ctl_mgr; mdp5_ctlm_init()
550 ctl->id = c; mdp5_ctlm_init()
551 ctl->reg_offset = ctl_cfg->base[c]; mdp5_ctlm_init()
552 ctl->busy = false; mdp5_ctlm_init()
553 spin_lock_init(&ctl->hw_lock); mdp5_ctlm_init()
H A Dmdp5_ctl.h32 * mdp5_ctl_request(ctlm, ...) returns a ctl (CTL resource) handler,
33 * which is then used to call the other mdp5_ctl_*(ctl, ...) functions.
36 int mdp5_ctl_get_ctl_id(struct mdp5_ctl *ctl);
39 int mdp5_ctl_set_intf(struct mdp5_ctl *ctl, struct mdp5_interface *intf);
40 int mdp5_ctl_set_encoder_state(struct mdp5_ctl *ctl, bool enabled);
42 int mdp5_ctl_set_cursor(struct mdp5_ctl *ctl, int cursor_id, bool enable);
77 int mdp5_ctl_blend(struct mdp5_ctl *ctl, u32 lm, u32 blend_cfg);
91 int mdp5_ctl_commit(struct mdp5_ctl *ctl, u32 flush_mask);
93 void mdp5_ctl_release(struct mdp5_ctl *ctl);
H A Dmdp5_crtc.c44 struct mdp5_ctl *ctl; member in struct:mdp5_crtc
90 mdp5_ctl_commit(mdp5_crtc->ctl, flush_mask); crtc_flush()
105 if (WARN_ON(!mdp5_crtc->ctl)) crtc_flush_all()
145 if (mdp5_crtc->ctl && !crtc->state->enable) {
146 mdp5_ctl_release(mdp5_crtc->ctl);
147 mdp5_crtc->ctl = NULL;
203 /* ctl could be released already when we are shutting down: */ blend_setup()
204 if (!mdp5_crtc->ctl) blend_setup()
233 mdp5_ctl_blend(mdp5_crtc->ctl, lm, blend_cfg);
278 mdp5_ctl_blend(mdp5_crtc->ctl, mdp5_crtc->lm, 0x00000000); mdp5_crtc_disable()
327 if (state->enable && !mdp5_crtc->ctl) { mdp5_crtc_atomic_check()
328 mdp5_crtc->ctl = mdp5_ctlm_request(mdp5_kms->ctlm, crtc); mdp5_crtc_atomic_check()
329 if (WARN_ON(!mdp5_crtc->ctl)) mdp5_crtc_atomic_check()
395 if (unlikely(!mdp5_crtc->ctl)) mdp5_crtc_atomic_flush()
458 if (NULL == mdp5_crtc->ctl) mdp5_crtc_cursor_set()
506 ret = mdp5_ctl_set_cursor(mdp5_crtc->ctl, 0, cursor_enable); mdp5_crtc_cursor_set()
637 mdp5_ctl_set_intf(mdp5_crtc->ctl, intf); mdp5_crtc_set_intf()
649 return WARN_ON(!crtc) ? NULL : mdp5_crtc->ctl; mdp5_crtc_get_ctl()
H A Dmdp5_cmd_encoder.c220 struct mdp5_ctl *ctl = mdp5_crtc_get_ctl(encoder->crtc); mdp5_cmd_encoder_disable() local
231 mdp5_ctl_set_encoder_state(ctl, false); mdp5_cmd_encoder_disable()
232 mdp5_ctl_commit(ctl, mdp_ctl_flush_mask_encoder(intf)); mdp5_cmd_encoder_disable()
242 struct mdp5_ctl *ctl = mdp5_crtc_get_ctl(encoder->crtc); mdp5_cmd_encoder_enable() local
252 mdp5_ctl_commit(ctl, mdp_ctl_flush_mask_encoder(intf)); mdp5_cmd_encoder_enable()
254 mdp5_ctl_set_encoder_state(ctl, true); mdp5_cmd_encoder_enable()
H A Dmdp5_encoder.c228 struct mdp5_ctl *ctl = mdp5_crtc_get_ctl(encoder->crtc); mdp5_encoder_disable() local
237 mdp5_ctl_set_encoder_state(ctl, false); mdp5_encoder_disable()
242 mdp5_ctl_commit(ctl, mdp_ctl_flush_mask_encoder(intf)); mdp5_encoder_disable()
263 struct mdp5_ctl *ctl = mdp5_crtc_get_ctl(encoder->crtc); mdp5_encoder_enable() local
275 mdp5_ctl_commit(ctl, mdp_ctl_flush_mask_encoder(intf)); mdp5_encoder_enable()
277 mdp5_ctl_set_encoder_state(ctl, true); mdp5_encoder_enable()
H A Dmdp5_cfg.c40 .ctl = {
108 .ctl = {
169 .ctl = {
H A Dmdp5_cfg.h72 struct mdp5_ctl_block ctl; member in struct:mdp5_cfg_hw
/linux-4.1.27/include/net/netns/
H A Dunix.h10 struct ctl_table_header *ctl; member in struct:netns_unix
H A Dmpls.h14 struct ctl_table_header *ctl; member in struct:netns_mpls
/linux-4.1.27/drivers/ide/
H A Dide-legacy.c9 unsigned long base, ctl; ide_legacy_init_one() local
14 ctl = 0x3f6; ide_legacy_init_one()
18 ctl = 0x376; ide_legacy_init_one()
28 if (!request_region(ctl, 1, d->name)) { ide_legacy_init_one()
30 d->name, ctl); ide_legacy_init_one()
35 ide_std_init_ports(hw, base, ctl); ide_legacy_init_one()
H A Dide-4drives.c33 unsigned long base = 0x1f0, ctl = 0x3f6; ide_4drives_init() local
45 if (!request_region(ctl, 1, DRV_NAME)) { ide_4drives_init()
47 DRV_NAME, ctl); ide_4drives_init()
54 ide_std_init_ports(&hw, base, ctl); ide_4drives_init()
H A Dide-pnp.c39 unsigned long base, ctl; idepnp_probe() local
49 ctl = pnp_port_start(dev, 1); idepnp_probe()
57 if (!request_region(ctl, 1, DRV_NAME)) { idepnp_probe()
59 DRV_NAME, ctl); idepnp_probe()
65 ide_std_init_ports(&hw, base, ctl); idepnp_probe()
76 release_region(ctl, 1); idepnp_probe()
H A Dtx4939ide.c152 u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl); tx4939ide_check_error_ints() local
154 if (ctl & TX4939IDE_INT_BUSERR) { tx4939ide_check_error_ints()
164 if (ctl & (TX4939IDE_INT_ADDRERR | tx4939ide_check_error_ints()
167 hwif->name, ctl, tx4939ide_check_error_ints()
168 ctl & TX4939IDE_INT_ADDRERR ? " Address-Error" : "", tx4939ide_check_error_ints()
169 ctl & TX4939IDE_INT_DEVTIMING ? " DEV-Timing" : "", tx4939ide_check_error_ints()
170 ctl & TX4939IDE_INT_BUSERR ? " Bus-Error" : ""); tx4939ide_check_error_ints()
171 return ctl; tx4939ide_check_error_ints()
178 u16 ctl; tx4939ide_clear_irq() local
188 ctl = tx4939ide_check_error_ints(hwif); tx4939ide_clear_irq()
189 tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl); tx4939ide_clear_irq()
320 u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl); tx4939ide_dma_end() local
334 (ctl & (TX4939IDE_INT_XFEREND | TX4939IDE_INT_HOST)) == tx4939ide_dma_end()
347 u16 ctl, ide_int; tx4939ide_dma_test_irq() local
351 ctl = tx4939ide_check_error_ints(hwif); tx4939ide_dma_test_irq()
352 ide_int = ctl & (TX4939IDE_INT_XFEREND | TX4939IDE_INT_HOST); tx4939ide_dma_test_irq()
361 ctl &= ~TX4939IDE_INT_XFEREND << 8; tx4939ide_dma_test_irq()
362 ctl |= ide_int << 8; tx4939ide_dma_test_irq()
369 hwif->name, dma_stat, ctl); tx4939ide_dma_test_irq()
377 ctl &= ~ide_int; tx4939ide_dma_test_irq()
378 tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl); tx4939ide_dma_test_irq()
H A Dbuddha.c122 unsigned long ctl, unsigned long irq_port) buddha_setup_ports()
133 hw->io_ports.ctl_addr = ctl; buddha_setup_ports()
212 unsigned long base, ctl, irq_port; buddha_init() local
216 ctl = base + BUDDHA_CONTROL; buddha_init()
221 ctl = 0; buddha_init()
225 buddha_setup_ports(&hw[i], base, ctl, irq_port); buddha_init()
121 buddha_setup_ports(struct ide_hw *hw, unsigned long base, unsigned long ctl, unsigned long irq_port) buddha_setup_ports() argument
H A Dtx4938ide.c162 unsigned long ctl = mapctl; tx4938ide_probe() local
167 ctl++; tx4938ide_probe()
172 hw.io_ports.ctl_addr = ctl; tx4938ide_probe()
178 pr_info("TX4938 IDE interface (base %#lx, ctl %#lx, irq %d)\n", tx4938ide_probe()
H A Dgayle.c80 unsigned long ctl, unsigned long irq_port) gayle_setup_ports()
91 hw->io_ports.ctl_addr = ctl; gayle_setup_ports()
79 gayle_setup_ports(struct ide_hw *hw, unsigned long base, unsigned long ctl, unsigned long irq_port) gayle_setup_ports() argument
H A Dide-cs.c115 static struct ide_host *idecs_register(unsigned long io, unsigned long ctl, idecs_register() argument
129 if (!request_region(ctl, 1, DRV_NAME)) { idecs_register()
131 DRV_NAME, ctl); idecs_register()
137 ide_std_init_ports(&hw, io, ctl); idecs_register()
161 release_region(ctl, 1); idecs_register()
H A Dide-io-std.c68 void ide_write_devctl(ide_hwif_t *hwif, u8 ctl) ide_write_devctl() argument
71 writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr); ide_write_devctl()
73 outb(ctl, hwif->io_ports.ctl_addr); ide_write_devctl()
/linux-4.1.27/tools/virtio/virtio-trace/
H A DMakefile9 trace-agent: trace-agent.o trace-agent-ctl.o trace-agent-rw.o
H A Dtrace-agent.h14 * @ctl_fd: fd of control path, /dev/virtio-ports/agent-ctl-path
H A Dtrace-agent-ctl.c110 pr_err("read data error in ctl thread\n"); rw_ctl_loop()
/linux-4.1.27/sound/pci/ctxfi/
H A Dcthw20k1.c92 u16 ctl:1; member in struct:src_dirty::__anon14459
105 unsigned int ctl; member in struct:src_rsc_ctrl_blk
188 struct src_rsc_ctrl_blk *ctl = blk; src_set_state() local
190 set_field(&ctl->ctl, SRCCTL_STATE, state); src_set_state()
191 ctl->dirty.bf.ctl = 1; src_set_state()
197 struct src_rsc_ctrl_blk *ctl = blk; src_set_bm() local
199 set_field(&ctl->ctl, SRCCTL_BM, bm); src_set_bm()
200 ctl->dirty.bf.ctl = 1; src_set_bm()
206 struct src_rsc_ctrl_blk *ctl = blk; src_set_rsr() local
208 set_field(&ctl->ctl, SRCCTL_RSR, rsr); src_set_rsr()
209 ctl->dirty.bf.ctl = 1; src_set_rsr()
215 struct src_rsc_ctrl_blk *ctl = blk; src_set_sf() local
217 set_field(&ctl->ctl, SRCCTL_SF, sf); src_set_sf()
218 ctl->dirty.bf.ctl = 1; src_set_sf()
224 struct src_rsc_ctrl_blk *ctl = blk; src_set_wr() local
226 set_field(&ctl->ctl, SRCCTL_WR, wr); src_set_wr()
227 ctl->dirty.bf.ctl = 1; src_set_wr()
233 struct src_rsc_ctrl_blk *ctl = blk; src_set_pm() local
235 set_field(&ctl->ctl, SRCCTL_PM, pm); src_set_pm()
236 ctl->dirty.bf.ctl = 1; src_set_pm()
242 struct src_rsc_ctrl_blk *ctl = blk; src_set_rom() local
244 set_field(&ctl->ctl, SRCCTL_ROM, rom); src_set_rom()
245 ctl->dirty.bf.ctl = 1; src_set_rom()
251 struct src_rsc_ctrl_blk *ctl = blk; src_set_vo() local
253 set_field(&ctl->ctl, SRCCTL_VO, vo); src_set_vo()
254 ctl->dirty.bf.ctl = 1; src_set_vo()
260 struct src_rsc_ctrl_blk *ctl = blk; src_set_st() local
262 set_field(&ctl->ctl, SRCCTL_ST, st); src_set_st()
263 ctl->dirty.bf.ctl = 1; src_set_st()
269 struct src_rsc_ctrl_blk *ctl = blk; src_set_ie() local
271 set_field(&ctl->ctl, SRCCTL_IE, ie); src_set_ie()
272 ctl->dirty.bf.ctl = 1; src_set_ie()
278 struct src_rsc_ctrl_blk *ctl = blk; src_set_ilsz() local
280 set_field(&ctl->ctl, SRCCTL_ILSZ, ilsz); src_set_ilsz()
281 ctl->dirty.bf.ctl = 1; src_set_ilsz()
287 struct src_rsc_ctrl_blk *ctl = blk; src_set_bp() local
289 set_field(&ctl->ctl, SRCCTL_BP, bp); src_set_bp()
290 ctl->dirty.bf.ctl = 1; src_set_bp()
296 struct src_rsc_ctrl_blk *ctl = blk; src_set_cisz() local
298 set_field(&ctl->ccr, SRCCCR_CISZ, cisz); src_set_cisz()
299 ctl->dirty.bf.ccr = 1; src_set_cisz()
305 struct src_rsc_ctrl_blk *ctl = blk; src_set_ca() local
307 set_field(&ctl->ca, SRCCA_CA, ca); src_set_ca()
308 ctl->dirty.bf.ca = 1; src_set_ca()
314 struct src_rsc_ctrl_blk *ctl = blk; src_set_sa() local
316 set_field(&ctl->sa, SRCSA_SA, sa); src_set_sa()
317 ctl->dirty.bf.sa = 1; src_set_sa()
323 struct src_rsc_ctrl_blk *ctl = blk; src_set_la() local
325 set_field(&ctl->la, SRCLA_LA, la); src_set_la()
326 ctl->dirty.bf.la = 1; src_set_la()
332 struct src_rsc_ctrl_blk *ctl = blk; src_set_pitch() local
334 set_field(&ctl->mpr, MPRLH_PITCH, pitch); src_set_pitch()
335 ctl->dirty.bf.mpr = 1; src_set_pitch()
371 struct src_rsc_ctrl_blk *ctl = blk; src_commit_write() local
374 if (ctl->dirty.bf.czbfs) { src_commit_write()
385 ctl->dirty.bf.czbfs = 0; src_commit_write()
387 if (ctl->dirty.bf.mpr) { src_commit_write()
393 hw_write_20kx(hw, PRING_LO_HI+4*pm_idx, ctl->mpr); src_commit_write()
396 ctl->dirty.bf.mpr = 0; src_commit_write()
398 if (ctl->dirty.bf.sa) { src_commit_write()
399 hw_write_20kx(hw, SRCSA+idx*0x100, ctl->sa); src_commit_write()
400 ctl->dirty.bf.sa = 0; src_commit_write()
402 if (ctl->dirty.bf.la) { src_commit_write()
403 hw_write_20kx(hw, SRCLA+idx*0x100, ctl->la); src_commit_write()
404 ctl->dirty.bf.la = 0; src_commit_write()
406 if (ctl->dirty.bf.ca) { src_commit_write()
407 hw_write_20kx(hw, SRCCA+idx*0x100, ctl->ca); src_commit_write()
408 ctl->dirty.bf.ca = 0; src_commit_write()
414 if (ctl->dirty.bf.ccr) { src_commit_write()
415 hw_write_20kx(hw, SRCCCR+idx*0x100, ctl->ccr); src_commit_write()
416 ctl->dirty.bf.ccr = 0; src_commit_write()
418 if (ctl->dirty.bf.ctl) { src_commit_write()
419 hw_write_20kx(hw, SRCCTL+idx*0x100, ctl->ctl); src_commit_write()
420 ctl->dirty.bf.ctl = 0; src_commit_write()
428 struct src_rsc_ctrl_blk *ctl = blk; src_get_ca() local
430 ctl->ca = hw_read_20kx(hw, SRCCA+idx*0x100); src_get_ca()
431 ctl->dirty.bf.ca = 0; src_get_ca()
433 return get_field(ctl->ca, SRCCA_CA); src_get_ca()
470 struct src_mgr_ctrl_blk *ctl = blk; src_mgr_commit_write() local
474 if (ctl->dirty.bf.enbsa) { src_mgr_commit_write()
478 hw_write_20kx(hw, SRCENBS, ctl->enbsa); src_mgr_commit_write()
479 ctl->dirty.bf.enbsa = 0; src_mgr_commit_write()
482 if ((ctl->dirty.data & (0x1 << i))) { src_mgr_commit_write()
483 hw_write_20kx(hw, SRCENB+(i*0x100), ctl->enb[i]); src_mgr_commit_write()
484 ctl->dirty.data &= ~(0x1 << i); src_mgr_commit_write()
535 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_set_imaparc() local
537 set_field(&ctl->srcimap.srcaim, SRCAIM_ARC, slot); srcimp_mgr_set_imaparc()
538 ctl->dirty.bf.srcimap = 1; srcimp_mgr_set_imaparc()
544 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_set_imapuser() local
546 set_field(&ctl->srcimap.srcaim, SRCAIM_SRC, user); srcimp_mgr_set_imapuser()
547 ctl->dirty.bf.srcimap = 1; srcimp_mgr_set_imapuser()
553 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_set_imapnxt() local
555 set_field(&ctl->srcimap.srcaim, SRCAIM_NXT, next); srcimp_mgr_set_imapnxt()
556 ctl->dirty.bf.srcimap = 1; srcimp_mgr_set_imapnxt()
562 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_set_imapaddr() local
564 ctl->srcimap.idx = addr; srcimp_mgr_set_imapaddr()
565 ctl->dirty.bf.srcimap = 1; srcimp_mgr_set_imapaddr()
571 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_commit_write() local
573 if (ctl->dirty.bf.srcimap) { srcimp_mgr_commit_write()
574 hw_write_20kx(hw, SRCIMAP+ctl->srcimap.idx*0x100, srcimp_mgr_commit_write()
575 ctl->srcimap.srcaim); srcimp_mgr_commit_write()
576 ctl->dirty.bf.srcimap = 0; srcimp_mgr_commit_write()
612 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_mode() local
614 set_field(&ctl->amoplo, AMOPLO_M, mode); amixer_set_mode()
615 ctl->dirty.bf.amoplo = 1; amixer_set_mode()
627 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_x() local
629 set_field(&ctl->amoplo, AMOPLO_X, x); amixer_set_x()
630 ctl->dirty.bf.amoplo = 1; amixer_set_x()
636 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_y() local
638 set_field(&ctl->amoplo, AMOPLO_Y, y); amixer_set_y()
639 ctl->dirty.bf.amoplo = 1; amixer_set_y()
645 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_sadr() local
647 set_field(&ctl->amophi, AMOPHI_SADR, sadr); amixer_set_sadr()
648 ctl->dirty.bf.amophi = 1; amixer_set_sadr()
654 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_se() local
656 set_field(&ctl->amophi, AMOPHI_SE, se); amixer_set_se()
657 ctl->dirty.bf.amophi = 1; amixer_set_se()
675 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_commit_write() local
677 if (ctl->dirty.bf.amoplo || ctl->dirty.bf.amophi) { amixer_commit_write()
678 hw_write_20kx(hw, AMOPLO+idx*8, ctl->amoplo); amixer_commit_write()
679 ctl->dirty.bf.amoplo = 0; amixer_commit_write()
680 hw_write_20kx(hw, AMOPHI+idx*8, ctl->amophi); amixer_commit_write()
681 ctl->dirty.bf.amophi = 0; amixer_commit_write()
689 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_get_y() local
691 return get_field(ctl->amoplo, AMOPLO_Y); amixer_get_y()
836 struct dai_ctrl_blk *ctl = blk; dai_srt_set_srcr() local
838 set_field(&ctl->srtctl, SRTCTL_SRCR, src); dai_srt_set_srcr()
839 ctl->dirty.bf.srtctl = 1; dai_srt_set_srcr()
845 struct dai_ctrl_blk *ctl = blk; dai_srt_set_srcl() local
847 set_field(&ctl->srtctl, SRTCTL_SRCL, src); dai_srt_set_srcl()
848 ctl->dirty.bf.srtctl = 1; dai_srt_set_srcl()
854 struct dai_ctrl_blk *ctl = blk; dai_srt_set_rsr() local
856 set_field(&ctl->srtctl, SRTCTL_RSR, rsr); dai_srt_set_rsr()
857 ctl->dirty.bf.srtctl = 1; dai_srt_set_rsr()
863 struct dai_ctrl_blk *ctl = blk; dai_srt_set_drat() local
865 set_field(&ctl->srtctl, SRTCTL_DRAT, drat); dai_srt_set_drat()
866 ctl->dirty.bf.srtctl = 1; dai_srt_set_drat()
872 struct dai_ctrl_blk *ctl = blk; dai_srt_set_ec() local
874 set_field(&ctl->srtctl, SRTCTL_EC, ec ? 1 : 0); dai_srt_set_ec()
875 ctl->dirty.bf.srtctl = 1; dai_srt_set_ec()
881 struct dai_ctrl_blk *ctl = blk; dai_srt_set_et() local
883 set_field(&ctl->srtctl, SRTCTL_ET, et ? 1 : 0); dai_srt_set_et()
884 ctl->dirty.bf.srtctl = 1; dai_srt_set_et()
890 struct dai_ctrl_blk *ctl = blk; dai_commit_write() local
892 if (ctl->dirty.bf.srtctl) { dai_commit_write()
895 hw_write_20kx(hw, SRTSCTL+0x4*idx, ctl->srtctl); dai_commit_write()
898 hw_write_20kx(hw, SRTICTL, ctl->srtctl); dai_commit_write()
900 ctl->dirty.bf.srtctl = 0; dai_commit_write()
936 struct dao_ctrl_blk *ctl = blk; dao_commit_write() local
938 if (ctl->dirty.bf.spos) { dao_commit_write()
941 hw_write_20kx(hw, SPOS+0x4*idx, ctl->spos); dao_commit_write()
943 ctl->dirty.bf.spos = 0; dao_commit_write()
978 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_enb_dai() local
982 set_field(&ctl->spictl, SPICTL_EN << (idx*8), 1); daio_mgr_enb_dai()
983 ctl->dirty.bf.spictl |= (0x1 << idx); daio_mgr_enb_dai()
987 set_field(&ctl->i2sctl, I2SCTL_EI << (idx*8), 1); daio_mgr_enb_dai()
988 ctl->dirty.bf.i2sictl |= (0x1 << idx); daio_mgr_enb_dai()
995 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_dsb_dai() local
999 set_field(&ctl->spictl, SPICTL_EN << (idx*8), 0); daio_mgr_dsb_dai()
1000 ctl->dirty.bf.spictl |= (0x1 << idx); daio_mgr_dsb_dai()
1004 set_field(&ctl->i2sctl, I2SCTL_EI << (idx*8), 0); daio_mgr_dsb_dai()
1005 ctl->dirty.bf.i2sictl |= (0x1 << idx); daio_mgr_dsb_dai()
1012 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_enb_dao() local
1016 set_field(&ctl->spoctl, SPOCTL_OE << (idx*8), 1); daio_mgr_enb_dao()
1017 ctl->dirty.bf.spoctl |= (0x1 << idx); daio_mgr_enb_dao()
1021 set_field(&ctl->i2sctl, I2SCTL_EA << (idx*8), 1); daio_mgr_enb_dao()
1022 ctl->dirty.bf.i2soctl |= (0x1 << idx); daio_mgr_enb_dao()
1029 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_dsb_dao() local
1033 set_field(&ctl->spoctl, SPOCTL_OE << (idx*8), 0); daio_mgr_dsb_dao()
1034 ctl->dirty.bf.spoctl |= (0x1 << idx); daio_mgr_dsb_dao()
1038 set_field(&ctl->i2sctl, I2SCTL_EA << (idx*8), 0); daio_mgr_dsb_dao()
1039 ctl->dirty.bf.i2soctl |= (0x1 << idx); daio_mgr_dsb_dao()
1046 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_dao_init() local
1052 set_field(&ctl->spoctl, SPOCTL_SR << (idx*8), 3); daio_mgr_dao_init()
1055 set_field(&ctl->spoctl, SPOCTL_SR << (idx*8), 0); daio_mgr_dao_init()
1058 set_field(&ctl->spoctl, SPOCTL_SR << (idx*8), 1); daio_mgr_dao_init()
1061 set_field(&ctl->spoctl, SPOCTL_SR << (idx*8), 2); daio_mgr_dao_init()
1066 set_field(&ctl->spoctl, SPOCTL_LIV << (idx*8), daio_mgr_dao_init()
1068 set_field(&ctl->spoctl, SPOCTL_RIV << (idx*8), daio_mgr_dao_init()
1070 set_field(&ctl->spoctl, SPOCTL_OS << (idx*8), daio_mgr_dao_init()
1073 ctl->dirty.bf.spoctl |= (0x1 << idx); daio_mgr_dao_init()
1083 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_set_imaparc() local
1085 set_field(&ctl->daoimap.aim, AIM_ARC, slot); daio_mgr_set_imaparc()
1086 ctl->dirty.bf.daoimap = 1; daio_mgr_set_imaparc()
1092 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_set_imapnxt() local
1094 set_field(&ctl->daoimap.aim, AIM_NXT, next); daio_mgr_set_imapnxt()
1095 ctl->dirty.bf.daoimap = 1; daio_mgr_set_imapnxt()
1101 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_set_imapaddr() local
1103 ctl->daoimap.idx = addr; daio_mgr_set_imapaddr()
1104 ctl->dirty.bf.daoimap = 1; daio_mgr_set_imapaddr()
1110 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_commit_write() local
1113 if (ctl->dirty.bf.i2sictl || ctl->dirty.bf.i2soctl) { daio_mgr_commit_write()
1115 if ((ctl->dirty.bf.i2sictl & (0x1 << i))) daio_mgr_commit_write()
1116 ctl->dirty.bf.i2sictl &= ~(0x1 << i); daio_mgr_commit_write()
1118 if ((ctl->dirty.bf.i2soctl & (0x1 << i))) daio_mgr_commit_write()
1119 ctl->dirty.bf.i2soctl &= ~(0x1 << i); daio_mgr_commit_write()
1121 hw_write_20kx(hw, I2SCTL, ctl->i2sctl); daio_mgr_commit_write()
1124 if (ctl->dirty.bf.spoctl) { daio_mgr_commit_write()
1126 if ((ctl->dirty.bf.spoctl & (0x1 << i))) daio_mgr_commit_write()
1127 ctl->dirty.bf.spoctl &= ~(0x1 << i); daio_mgr_commit_write()
1129 hw_write_20kx(hw, SPOCTL, ctl->spoctl); daio_mgr_commit_write()
1132 if (ctl->dirty.bf.spictl) { daio_mgr_commit_write()
1134 if ((ctl->dirty.bf.spictl & (0x1 << i))) daio_mgr_commit_write()
1135 ctl->dirty.bf.spictl &= ~(0x1 << i); daio_mgr_commit_write()
1137 hw_write_20kx(hw, SPICTL, ctl->spictl); daio_mgr_commit_write()
1140 if (ctl->dirty.bf.daoimap) { daio_mgr_commit_write()
1141 hw_write_20kx(hw, DAOIMAP+ctl->daoimap.idx*4, daio_mgr_commit_write()
1142 ctl->daoimap.aim); daio_mgr_commit_write()
1143 ctl->dirty.bf.daoimap = 0; daio_mgr_commit_write()
H A Dcthw20k2.c92 u16 ctl:1; member in struct:src_dirty::__anon14466
105 unsigned int ctl; member in struct:src_rsc_ctrl_blk
188 struct src_rsc_ctrl_blk *ctl = blk; src_set_state() local
190 set_field(&ctl->ctl, SRCCTL_STATE, state); src_set_state()
191 ctl->dirty.bf.ctl = 1; src_set_state()
197 struct src_rsc_ctrl_blk *ctl = blk; src_set_bm() local
199 set_field(&ctl->ctl, SRCCTL_BM, bm); src_set_bm()
200 ctl->dirty.bf.ctl = 1; src_set_bm()
206 struct src_rsc_ctrl_blk *ctl = blk; src_set_rsr() local
208 set_field(&ctl->ctl, SRCCTL_RSR, rsr); src_set_rsr()
209 ctl->dirty.bf.ctl = 1; src_set_rsr()
215 struct src_rsc_ctrl_blk *ctl = blk; src_set_sf() local
217 set_field(&ctl->ctl, SRCCTL_SF, sf); src_set_sf()
218 ctl->dirty.bf.ctl = 1; src_set_sf()
224 struct src_rsc_ctrl_blk *ctl = blk; src_set_wr() local
226 set_field(&ctl->ctl, SRCCTL_WR, wr); src_set_wr()
227 ctl->dirty.bf.ctl = 1; src_set_wr()
233 struct src_rsc_ctrl_blk *ctl = blk; src_set_pm() local
235 set_field(&ctl->ctl, SRCCTL_PM, pm); src_set_pm()
236 ctl->dirty.bf.ctl = 1; src_set_pm()
242 struct src_rsc_ctrl_blk *ctl = blk; src_set_rom() local
244 set_field(&ctl->ctl, SRCCTL_ROM, rom); src_set_rom()
245 ctl->dirty.bf.ctl = 1; src_set_rom()
251 struct src_rsc_ctrl_blk *ctl = blk; src_set_vo() local
253 set_field(&ctl->ctl, SRCCTL_VO, vo); src_set_vo()
254 ctl->dirty.bf.ctl = 1; src_set_vo()
260 struct src_rsc_ctrl_blk *ctl = blk; src_set_st() local
262 set_field(&ctl->ctl, SRCCTL_ST, st); src_set_st()
263 ctl->dirty.bf.ctl = 1; src_set_st()
269 struct src_rsc_ctrl_blk *ctl = blk; src_set_ie() local
271 set_field(&ctl->ctl, SRCCTL_IE, ie); src_set_ie()
272 ctl->dirty.bf.ctl = 1; src_set_ie()
278 struct src_rsc_ctrl_blk *ctl = blk; src_set_ilsz() local
280 set_field(&ctl->ctl, SRCCTL_ILSZ, ilsz); src_set_ilsz()
281 ctl->dirty.bf.ctl = 1; src_set_ilsz()
287 struct src_rsc_ctrl_blk *ctl = blk; src_set_bp() local
289 set_field(&ctl->ctl, SRCCTL_BP, bp); src_set_bp()
290 ctl->dirty.bf.ctl = 1; src_set_bp()
296 struct src_rsc_ctrl_blk *ctl = blk; src_set_cisz() local
298 set_field(&ctl->ccr, SRCCCR_CISZ, cisz); src_set_cisz()
299 ctl->dirty.bf.ccr = 1; src_set_cisz()
305 struct src_rsc_ctrl_blk *ctl = blk; src_set_ca() local
307 set_field(&ctl->ca, SRCCA_CA, ca); src_set_ca()
308 ctl->dirty.bf.ca = 1; src_set_ca()
314 struct src_rsc_ctrl_blk *ctl = blk; src_set_sa() local
316 set_field(&ctl->sa, SRCSA_SA, sa); src_set_sa()
317 ctl->dirty.bf.sa = 1; src_set_sa()
323 struct src_rsc_ctrl_blk *ctl = blk; src_set_la() local
325 set_field(&ctl->la, SRCLA_LA, la); src_set_la()
326 ctl->dirty.bf.la = 1; src_set_la()
332 struct src_rsc_ctrl_blk *ctl = blk; src_set_pitch() local
334 set_field(&ctl->mpr, MPRLH_PITCH, pitch); src_set_pitch()
335 ctl->dirty.bf.mpr = 1; src_set_pitch()
371 struct src_rsc_ctrl_blk *ctl = blk; src_commit_write() local
374 if (ctl->dirty.bf.czbfs) { src_commit_write()
385 ctl->dirty.bf.czbfs = 0; src_commit_write()
387 if (ctl->dirty.bf.mpr) { src_commit_write()
393 hw_write_20kx(hw, MIXER_PRING_LO_HI+4*pm_idx, ctl->mpr); src_commit_write()
396 ctl->dirty.bf.mpr = 0; src_commit_write()
398 if (ctl->dirty.bf.sa) { src_commit_write()
399 hw_write_20kx(hw, SRC_SA+idx*0x100, ctl->sa); src_commit_write()
400 ctl->dirty.bf.sa = 0; src_commit_write()
402 if (ctl->dirty.bf.la) { src_commit_write()
403 hw_write_20kx(hw, SRC_LA+idx*0x100, ctl->la); src_commit_write()
404 ctl->dirty.bf.la = 0; src_commit_write()
406 if (ctl->dirty.bf.ca) { src_commit_write()
407 hw_write_20kx(hw, SRC_CA+idx*0x100, ctl->ca); src_commit_write()
408 ctl->dirty.bf.ca = 0; src_commit_write()
414 if (ctl->dirty.bf.ccr) { src_commit_write()
415 hw_write_20kx(hw, SRC_CCR+idx*0x100, ctl->ccr); src_commit_write()
416 ctl->dirty.bf.ccr = 0; src_commit_write()
418 if (ctl->dirty.bf.ctl) { src_commit_write()
419 hw_write_20kx(hw, SRC_CTL+idx*0x100, ctl->ctl); src_commit_write()
420 ctl->dirty.bf.ctl = 0; src_commit_write()
428 struct src_rsc_ctrl_blk *ctl = blk; src_get_ca() local
430 ctl->ca = hw_read_20kx(hw, SRC_CA+idx*0x100); src_get_ca()
431 ctl->dirty.bf.ca = 0; src_get_ca()
433 return get_field(ctl->ca, SRCCA_CA); src_get_ca()
470 struct src_mgr_ctrl_blk *ctl = blk; src_mgr_commit_write() local
474 if (ctl->dirty.bf.enbsa) { src_mgr_commit_write()
478 hw_write_20kx(hw, SRC_ENBSA, ctl->enbsa); src_mgr_commit_write()
479 ctl->dirty.bf.enbsa = 0; src_mgr_commit_write()
482 if ((ctl->dirty.data & (0x1 << i))) { src_mgr_commit_write()
483 hw_write_20kx(hw, SRC_ENB+(i*0x100), ctl->enb[i]); src_mgr_commit_write()
484 ctl->dirty.data &= ~(0x1 << i); src_mgr_commit_write()
535 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_set_imaparc() local
537 set_field(&ctl->srcimap.srcaim, SRCAIM_ARC, slot); srcimp_mgr_set_imaparc()
538 ctl->dirty.bf.srcimap = 1; srcimp_mgr_set_imaparc()
544 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_set_imapuser() local
546 set_field(&ctl->srcimap.srcaim, SRCAIM_SRC, user); srcimp_mgr_set_imapuser()
547 ctl->dirty.bf.srcimap = 1; srcimp_mgr_set_imapuser()
553 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_set_imapnxt() local
555 set_field(&ctl->srcimap.srcaim, SRCAIM_NXT, next); srcimp_mgr_set_imapnxt()
556 ctl->dirty.bf.srcimap = 1; srcimp_mgr_set_imapnxt()
569 struct srcimp_mgr_ctrl_blk *ctl = blk; srcimp_mgr_commit_write() local
571 if (ctl->dirty.bf.srcimap) { srcimp_mgr_commit_write()
572 hw_write_20kx(hw, SRC_IMAP+ctl->srcimap.idx*0x100, srcimp_mgr_commit_write()
573 ctl->srcimap.srcaim); srcimp_mgr_commit_write()
574 ctl->dirty.bf.srcimap = 0; srcimp_mgr_commit_write()
611 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_mode() local
613 set_field(&ctl->amoplo, AMOPLO_M, mode); amixer_set_mode()
614 ctl->dirty.bf.amoplo = 1; amixer_set_mode()
620 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_iv() local
622 set_field(&ctl->amoplo, AMOPLO_IV, iv); amixer_set_iv()
623 ctl->dirty.bf.amoplo = 1; amixer_set_iv()
629 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_x() local
631 set_field(&ctl->amoplo, AMOPLO_X, x); amixer_set_x()
632 ctl->dirty.bf.amoplo = 1; amixer_set_x()
638 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_y() local
640 set_field(&ctl->amoplo, AMOPLO_Y, y); amixer_set_y()
641 ctl->dirty.bf.amoplo = 1; amixer_set_y()
647 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_sadr() local
649 set_field(&ctl->amophi, AMOPHI_SADR, sadr); amixer_set_sadr()
650 ctl->dirty.bf.amophi = 1; amixer_set_sadr()
656 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_set_se() local
658 set_field(&ctl->amophi, AMOPHI_SE, se); amixer_set_se()
659 ctl->dirty.bf.amophi = 1; amixer_set_se()
677 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_commit_write() local
679 if (ctl->dirty.bf.amoplo || ctl->dirty.bf.amophi) { amixer_commit_write()
680 hw_write_20kx(hw, MIXER_AMOPLO+idx*8, ctl->amoplo); amixer_commit_write()
681 ctl->dirty.bf.amoplo = 0; amixer_commit_write()
682 hw_write_20kx(hw, MIXER_AMOPHI+idx*8, ctl->amophi); amixer_commit_write()
683 ctl->dirty.bf.amophi = 0; amixer_commit_write()
691 struct amixer_rsc_ctrl_blk *ctl = blk; amixer_get_y() local
693 return get_field(ctl->amoplo, AMOPLO_Y); amixer_get_y()
826 struct dai_ctrl_blk *ctl = blk; dai_srt_set_srco() local
828 set_field(&ctl->srt, SRTCTL_SRCO, src); dai_srt_set_srco()
829 ctl->dirty.bf.srt = 1; dai_srt_set_srco()
835 struct dai_ctrl_blk *ctl = blk; dai_srt_set_srcm() local
837 set_field(&ctl->srt, SRTCTL_SRCM, src); dai_srt_set_srcm()
838 ctl->dirty.bf.srt = 1; dai_srt_set_srcm()
844 struct dai_ctrl_blk *ctl = blk; dai_srt_set_rsr() local
846 set_field(&ctl->srt, SRTCTL_RSR, rsr); dai_srt_set_rsr()
847 ctl->dirty.bf.srt = 1; dai_srt_set_rsr()
853 struct dai_ctrl_blk *ctl = blk; dai_srt_set_drat() local
855 set_field(&ctl->srt, SRTCTL_DRAT, drat); dai_srt_set_drat()
856 ctl->dirty.bf.srt = 1; dai_srt_set_drat()
862 struct dai_ctrl_blk *ctl = blk; dai_srt_set_ec() local
864 set_field(&ctl->srt, SRTCTL_EC, ec ? 1 : 0); dai_srt_set_ec()
865 ctl->dirty.bf.srt = 1; dai_srt_set_ec()
871 struct dai_ctrl_blk *ctl = blk; dai_srt_set_et() local
873 set_field(&ctl->srt, SRTCTL_ET, et ? 1 : 0); dai_srt_set_et()
874 ctl->dirty.bf.srt = 1; dai_srt_set_et()
880 struct dai_ctrl_blk *ctl = blk; dai_commit_write() local
882 if (ctl->dirty.bf.srt) { dai_commit_write()
883 hw_write_20kx(hw, AUDIO_IO_RX_SRT_CTL+0x40*idx, ctl->srt); dai_commit_write()
884 ctl->dirty.bf.srt = 0; dai_commit_write()
920 struct dao_ctrl_blk *ctl = blk; dao_commit_write() local
922 if (ctl->dirty.bf.atxcsl) { dao_commit_write()
926 ctl->atxcsl); dao_commit_write()
928 ctl->dirty.bf.atxcsl = 0; dao_commit_write()
963 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_enb_dai() local
965 set_field(&ctl->rxctl[idx], ARXCTL_EN, 1); daio_mgr_enb_dai()
966 ctl->dirty.bf.arxctl |= (0x1 << idx); daio_mgr_enb_dai()
972 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_dsb_dai() local
974 set_field(&ctl->rxctl[idx], ARXCTL_EN, 0); daio_mgr_dsb_dai()
976 ctl->dirty.bf.arxctl |= (0x1 << idx); daio_mgr_dsb_dai()
982 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_enb_dao() local
984 set_field(&ctl->txctl[idx], ATXCTL_EN, 1); daio_mgr_enb_dao()
985 ctl->dirty.bf.atxctl |= (0x1 << idx); daio_mgr_enb_dao()
991 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_dsb_dao() local
993 set_field(&ctl->txctl[idx], ATXCTL_EN, 0); daio_mgr_dsb_dao()
994 ctl->dirty.bf.atxctl |= (0x1 << idx); daio_mgr_dsb_dao()
1000 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_dao_init() local
1006 set_field(&ctl->txctl[idx], ATXCTL_NUC, 0); daio_mgr_dao_init()
1009 set_field(&ctl->txctl[idx], ATXCTL_NUC, 1); daio_mgr_dao_init()
1012 set_field(&ctl->txctl[idx], ATXCTL_NUC, 2); daio_mgr_dao_init()
1015 set_field(&ctl->txctl[idx], ATXCTL_NUC, 3); daio_mgr_dao_init()
1021 set_field(&ctl->txctl[idx], ATXCTL_CD, (!(conf & 0x7))); daio_mgr_dao_init()
1023 set_field(&ctl->txctl[idx], ATXCTL_LIV, (conf >> 4) & 0x1); daio_mgr_dao_init()
1025 set_field(&ctl->txctl[idx], ATXCTL_RIV, (conf >> 4) & 0x1); daio_mgr_dao_init()
1026 set_field(&ctl->txctl[idx], ATXCTL_RAW, daio_mgr_dao_init()
1028 ctl->dirty.bf.atxctl |= (0x1 << idx); daio_mgr_dao_init()
1038 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_set_imaparc() local
1040 set_field(&ctl->daoimap.aim, AIM_ARC, slot); daio_mgr_set_imaparc()
1041 ctl->dirty.bf.daoimap = 1; daio_mgr_set_imaparc()
1047 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_set_imapnxt() local
1049 set_field(&ctl->daoimap.aim, AIM_NXT, next); daio_mgr_set_imapnxt()
1050 ctl->dirty.bf.daoimap = 1; daio_mgr_set_imapnxt()
1063 struct daio_mgr_ctrl_blk *ctl = blk; daio_mgr_commit_write() local
1068 if ((ctl->dirty.bf.atxctl & (0x1 << i))) { daio_mgr_commit_write()
1069 data = ctl->txctl[i]; daio_mgr_commit_write()
1071 ctl->dirty.bf.atxctl &= ~(0x1 << i); daio_mgr_commit_write()
1074 if ((ctl->dirty.bf.arxctl & (0x1 << i))) { daio_mgr_commit_write()
1075 data = ctl->rxctl[i]; daio_mgr_commit_write()
1077 ctl->dirty.bf.arxctl &= ~(0x1 << i); daio_mgr_commit_write()
1081 if (ctl->dirty.bf.daoimap) { daio_mgr_commit_write()
1082 hw_write_20kx(hw, AUDIO_IO_AIM+ctl->daoimap.idx*4, daio_mgr_commit_write()
1083 ctl->daoimap.aim); daio_mgr_commit_write()
1084 ctl->dirty.bf.daoimap = 0; daio_mgr_commit_write()
1842 u32 data, ctl; hw_adc_init() local
1904 ctl = hw_read_20kx(hw, GPIO_CTRL); hw_adc_init()
1905 ctl |= 0x1 << 14; hw_adc_init()
1906 hw_write_20kx(hw, GPIO_CTRL, ctl); hw_adc_init()
H A Dctmixer.c114 unsigned char ctl; member in struct:ct_kcontrol_init
121 .ctl = 1,
125 .ctl = 1,
129 .ctl = 1,
133 .ctl = 1,
137 .ctl = 1,
141 .ctl = 1,
145 .ctl = 1,
149 .ctl = 1,
153 .ctl = 1,
157 .ctl = 1,
161 .ctl = 1,
165 .ctl = 1,
169 .ctl = 1,
173 .ctl = 1,
177 .ctl = 1,
181 .ctl = 1,
185 .ctl = 1,
189 .ctl = 1,
193 .ctl = 1,
197 .ctl = 1,
201 .ctl = 1,
205 .ctl = 1,
209 .ctl = 1,
213 .ctl = 1,
217 .ctl = 0,
747 if (ct_kcontrol_init_table[type].ctl) { ct_mixer_kcontrols_create()
756 ct_kcontrol_init_table[MIXER_DIGITAL_IO_S].ctl = cap.digit_io_switch; ct_mixer_kcontrols_create()
759 if (ct_kcontrol_init_table[type].ctl) { ct_mixer_kcontrols_create()
/linux-4.1.27/fs/btrfs/
H A Dfree-space-cache.c41 static int link_free_space(struct btrfs_free_space_ctl *ctl,
43 static void unlink_free_space(struct btrfs_free_space_ctl *ctl,
641 static void merge_space_tree(struct btrfs_free_space_ctl *ctl) merge_space_tree() argument
647 spin_lock(&ctl->tree_lock); merge_space_tree()
648 for (n = rb_first(&ctl->free_space_offset); n; n = rb_next(n)) { merge_space_tree()
655 unlink_free_space(ctl, prev); merge_space_tree()
656 unlink_free_space(ctl, e); merge_space_tree()
659 link_free_space(ctl, prev); merge_space_tree()
661 spin_unlock(&ctl->tree_lock); merge_space_tree()
667 spin_unlock(&ctl->tree_lock); merge_space_tree()
671 struct btrfs_free_space_ctl *ctl, __load_free_space_cache()
768 spin_lock(&ctl->tree_lock); __load_free_space_cache()
769 ret = link_free_space(ctl, e); __load_free_space_cache()
770 spin_unlock(&ctl->tree_lock); __load_free_space_cache()
786 spin_lock(&ctl->tree_lock); __load_free_space_cache()
787 ret = link_free_space(ctl, e); __load_free_space_cache()
788 ctl->total_bitmaps++; __load_free_space_cache()
789 ctl->op->recalc_thresholds(ctl); __load_free_space_cache()
790 spin_unlock(&ctl->tree_lock); __load_free_space_cache()
817 merge_space_tree(ctl); __load_free_space_cache()
824 __btrfs_remove_free_space_cache(ctl); __load_free_space_cache()
831 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; load_free_space_cache() local
871 ret = __load_free_space_cache(fs_info->tree_root, inode, ctl, load_free_space_cache()
877 spin_lock(&ctl->tree_lock); load_free_space_cache()
878 matched = (ctl->free_space == (block_group->key.offset - used - load_free_space_cache()
880 spin_unlock(&ctl->tree_lock); load_free_space_cache()
883 __btrfs_remove_free_space_cache(ctl); load_free_space_cache()
906 struct btrfs_free_space_ctl *ctl, write_cache_extent_entries()
914 struct rb_node *node = rb_first(&ctl->free_space_offset); write_cache_extent_entries()
966 list_for_each_entry(trim_entry, &ctl->trimming_ranges, list) { write_cache_extent_entries()
1213 * @ctl - the free space cache we are going to write out
1224 struct btrfs_free_space_ctl *ctl, __btrfs_write_out_cache()
1270 mutex_lock(&ctl->cache_writeout_mutex); __btrfs_write_out_cache()
1272 spin_lock(&ctl->tree_lock); __btrfs_write_out_cache()
1273 ret = write_cache_extent_entries(io_ctl, ctl, __btrfs_write_out_cache()
1297 spin_unlock(&ctl->tree_lock); __btrfs_write_out_cache()
1298 mutex_unlock(&ctl->cache_writeout_mutex); __btrfs_write_out_cache()
1350 spin_unlock(&ctl->tree_lock); __btrfs_write_out_cache()
1351 mutex_unlock(&ctl->cache_writeout_mutex); __btrfs_write_out_cache()
1367 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_write_out_cache() local
1384 ret = __btrfs_write_out_cache(root, inode, ctl, block_group, btrfs_write_out_cache()
1422 static inline u64 offset_to_bitmap(struct btrfs_free_space_ctl *ctl, offset_to_bitmap() argument
1428 bytes_per_bitmap = BITS_PER_BITMAP * ctl->unit; offset_to_bitmap()
1429 bitmap_start = offset - ctl->start; offset_to_bitmap()
1432 bitmap_start += ctl->start; offset_to_bitmap()
1496 tree_search_offset(struct btrfs_free_space_ctl *ctl, tree_search_offset() argument
1499 struct rb_node *n = ctl->free_space_offset.rb_node; tree_search_offset()
1585 if (entry->offset + BITS_PER_BITMAP * ctl->unit > offset) tree_search_offset()
1596 ctl->unit > offset) tree_search_offset()
1612 __unlink_free_space(struct btrfs_free_space_ctl *ctl, __unlink_free_space() argument
1615 rb_erase(&info->offset_index, &ctl->free_space_offset); __unlink_free_space()
1616 ctl->free_extents--; __unlink_free_space()
1619 static void unlink_free_space(struct btrfs_free_space_ctl *ctl, unlink_free_space() argument
1622 __unlink_free_space(ctl, info); unlink_free_space()
1623 ctl->free_space -= info->bytes; unlink_free_space()
1626 static int link_free_space(struct btrfs_free_space_ctl *ctl, link_free_space() argument
1632 ret = tree_insert_offset(&ctl->free_space_offset, info->offset, link_free_space()
1637 ctl->free_space += info->bytes; link_free_space()
1638 ctl->free_extents++; link_free_space()
1642 static void recalculate_thresholds(struct btrfs_free_space_ctl *ctl) recalculate_thresholds() argument
1644 struct btrfs_block_group_cache *block_group = ctl->private; recalculate_thresholds()
1649 u32 bytes_per_bg = BITS_PER_BITMAP * ctl->unit; recalculate_thresholds()
1654 ASSERT(ctl->total_bitmaps <= max_bitmaps); recalculate_thresholds()
1672 bitmap_bytes = (ctl->total_bitmaps + 1) * PAGE_CACHE_SIZE; recalculate_thresholds()
1675 ctl->extents_thresh = 0; recalculate_thresholds()
1686 ctl->extents_thresh = recalculate_thresholds()
1690 static inline void __bitmap_clear_bits(struct btrfs_free_space_ctl *ctl, __bitmap_clear_bits() argument
1696 start = offset_to_bit(info->offset, ctl->unit, offset); __bitmap_clear_bits()
1697 count = bytes_to_bits(bytes, ctl->unit); __bitmap_clear_bits()
1705 static void bitmap_clear_bits(struct btrfs_free_space_ctl *ctl, bitmap_clear_bits() argument
1709 __bitmap_clear_bits(ctl, info, offset, bytes); bitmap_clear_bits()
1710 ctl->free_space -= bytes; bitmap_clear_bits()
1713 static void bitmap_set_bits(struct btrfs_free_space_ctl *ctl, bitmap_set_bits() argument
1719 start = offset_to_bit(info->offset, ctl->unit, offset); bitmap_set_bits()
1720 count = bytes_to_bits(bytes, ctl->unit); bitmap_set_bits()
1726 ctl->free_space += bytes; bitmap_set_bits()
1733 static int search_bitmap(struct btrfs_free_space_ctl *ctl, search_bitmap() argument
1743 i = offset_to_bit(bitmap_info->offset, ctl->unit, search_bitmap()
1745 bits = bytes_to_bits(*bytes, ctl->unit); search_bitmap()
1761 *offset = (u64)(i * ctl->unit) + bitmap_info->offset; search_bitmap()
1762 *bytes = (u64)(found_bits) * ctl->unit; search_bitmap()
1766 *bytes = (u64)(max_bits) * ctl->unit; search_bitmap()
1772 find_free_space(struct btrfs_free_space_ctl *ctl, u64 *offset, u64 *bytes, find_free_space() argument
1781 if (!ctl->free_space_offset.rb_node) find_free_space()
1784 entry = tree_search_offset(ctl, offset_to_bitmap(ctl, *offset), 0, 1); find_free_space()
1800 tmp = entry->offset - ctl->start + align - 1; find_free_space()
1802 tmp = tmp * align + ctl->start; find_free_space()
1818 ret = search_bitmap(ctl, entry, &tmp, &size); find_free_space()
1837 static void add_new_bitmap(struct btrfs_free_space_ctl *ctl, add_new_bitmap() argument
1840 info->offset = offset_to_bitmap(ctl, offset); add_new_bitmap()
1843 link_free_space(ctl, info); add_new_bitmap()
1844 ctl->total_bitmaps++; add_new_bitmap()
1846 ctl->op->recalc_thresholds(ctl); add_new_bitmap()
1849 static void free_bitmap(struct btrfs_free_space_ctl *ctl, free_bitmap() argument
1852 unlink_free_space(ctl, bitmap_info); free_bitmap()
1855 ctl->total_bitmaps--; free_bitmap()
1856 ctl->op->recalc_thresholds(ctl); free_bitmap()
1859 static noinline int remove_from_bitmap(struct btrfs_free_space_ctl *ctl, remove_from_bitmap() argument
1868 end = bitmap_info->offset + (u64)(BITS_PER_BITMAP * ctl->unit) - 1; remove_from_bitmap()
1877 search_bytes = ctl->unit; remove_from_bitmap()
1879 ret = search_bitmap(ctl, bitmap_info, &search_start, &search_bytes); remove_from_bitmap()
1889 bitmap_clear_bits(ctl, bitmap_info, search_start, search_bytes); remove_from_bitmap()
1896 free_bitmap(ctl, bitmap_info); remove_from_bitmap()
1922 search_bytes = ctl->unit; remove_from_bitmap()
1923 ret = search_bitmap(ctl, bitmap_info, &search_start, remove_from_bitmap()
1930 free_bitmap(ctl, bitmap_info); remove_from_bitmap()
1935 static u64 add_bytes_to_bitmap(struct btrfs_free_space_ctl *ctl, add_bytes_to_bitmap() argument
1942 end = info->offset + (u64)(BITS_PER_BITMAP * ctl->unit); add_bytes_to_bitmap()
1946 bitmap_set_bits(ctl, info, offset, bytes_to_set); add_bytes_to_bitmap()
1952 static bool use_bitmap(struct btrfs_free_space_ctl *ctl, use_bitmap() argument
1955 struct btrfs_block_group_cache *block_group = ctl->private; use_bitmap()
1961 if (ctl->free_extents < ctl->extents_thresh) { use_bitmap()
1970 if (ctl->free_extents * 2 <= ctl->extents_thresh) use_bitmap()
1985 if (((BITS_PER_BITMAP * ctl->unit) >> 1) > block_group->key.offset) use_bitmap()
1996 static int insert_into_bitmap(struct btrfs_free_space_ctl *ctl, insert_into_bitmap() argument
2008 if (!ctl->op->use_bitmap(ctl, info)) insert_into_bitmap()
2011 if (ctl->op == &free_space_op) insert_into_bitmap()
2012 block_group = ctl->private; insert_into_bitmap()
2040 if (entry->offset == offset_to_bitmap(ctl, offset)) { insert_into_bitmap()
2041 bytes_added = add_bytes_to_bitmap(ctl, entry, insert_into_bitmap()
2054 bitmap_info = tree_search_offset(ctl, offset_to_bitmap(ctl, offset), insert_into_bitmap()
2061 bytes_added = add_bytes_to_bitmap(ctl, bitmap_info, offset, bytes); insert_into_bitmap()
2074 add_new_bitmap(ctl, info, offset); insert_into_bitmap()
2079 spin_unlock(&ctl->tree_lock); insert_into_bitmap()
2086 spin_lock(&ctl->tree_lock); insert_into_bitmap()
2094 spin_lock(&ctl->tree_lock); insert_into_bitmap()
2112 static bool try_merge_free_space(struct btrfs_free_space_ctl *ctl, try_merge_free_space() argument
2126 right_info = tree_search_offset(ctl, offset + bytes, 0, 0); try_merge_free_space()
2131 left_info = tree_search_offset(ctl, offset - 1, 0, 0); try_merge_free_space()
2135 unlink_free_space(ctl, right_info); try_merge_free_space()
2137 __unlink_free_space(ctl, right_info); try_merge_free_space()
2146 unlink_free_space(ctl, left_info); try_merge_free_space()
2148 __unlink_free_space(ctl, left_info); try_merge_free_space()
2158 static bool steal_from_bitmap_to_end(struct btrfs_free_space_ctl *ctl, steal_from_bitmap_to_end() argument
2166 const u64 bitmap_offset = offset_to_bitmap(ctl, end); steal_from_bitmap_to_end()
2169 bitmap = tree_search_offset(ctl, bitmap_offset, 1, 0); steal_from_bitmap_to_end()
2173 i = offset_to_bit(bitmap->offset, ctl->unit, end); steal_from_bitmap_to_end()
2177 bytes = (j - i) * ctl->unit; steal_from_bitmap_to_end()
2181 bitmap_clear_bits(ctl, bitmap, end, bytes); steal_from_bitmap_to_end()
2183 __bitmap_clear_bits(ctl, bitmap, end, bytes); steal_from_bitmap_to_end()
2186 free_bitmap(ctl, bitmap); steal_from_bitmap_to_end()
2191 static bool steal_from_bitmap_to_front(struct btrfs_free_space_ctl *ctl, steal_from_bitmap_to_front() argument
2202 bitmap_offset = offset_to_bitmap(ctl, info->offset); steal_from_bitmap_to_front()
2207 bitmap_offset = offset_to_bitmap(ctl, info->offset - 1); steal_from_bitmap_to_front()
2210 bitmap = tree_search_offset(ctl, bitmap_offset, 1, 0); steal_from_bitmap_to_front()
2214 i = offset_to_bit(bitmap->offset, ctl->unit, info->offset) - 1; steal_from_bitmap_to_front()
2226 bytes = (i + 1) * ctl->unit; steal_from_bitmap_to_front()
2228 bytes = (i - prev_j) * ctl->unit; steal_from_bitmap_to_front()
2234 bitmap_clear_bits(ctl, bitmap, info->offset, bytes); steal_from_bitmap_to_front()
2236 __bitmap_clear_bits(ctl, bitmap, info->offset, bytes); steal_from_bitmap_to_front()
2239 free_bitmap(ctl, bitmap); steal_from_bitmap_to_front()
2255 static void steal_from_bitmap(struct btrfs_free_space_ctl *ctl, steal_from_bitmap() argument
2266 if (ctl->total_bitmaps > 0) { steal_from_bitmap()
2270 stole_end = steal_from_bitmap_to_end(ctl, info, update_stat); steal_from_bitmap()
2271 if (ctl->total_bitmaps > 0) steal_from_bitmap()
2272 stole_front = steal_from_bitmap_to_front(ctl, info, steal_from_bitmap()
2276 try_merge_free_space(ctl, info, update_stat); steal_from_bitmap()
2280 int __btrfs_add_free_space(struct btrfs_free_space_ctl *ctl, __btrfs_add_free_space() argument
2294 spin_lock(&ctl->tree_lock); __btrfs_add_free_space()
2296 if (try_merge_free_space(ctl, info, true)) __btrfs_add_free_space()
2304 ret = insert_into_bitmap(ctl, info); __btrfs_add_free_space()
2318 steal_from_bitmap(ctl, info, true); __btrfs_add_free_space()
2320 ret = link_free_space(ctl, info); __btrfs_add_free_space()
2324 spin_unlock(&ctl->tree_lock); __btrfs_add_free_space()
2337 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_remove_free_space() local
2342 spin_lock(&ctl->tree_lock); btrfs_remove_free_space()
2349 info = tree_search_offset(ctl, offset, 0, 0); btrfs_remove_free_space()
2355 info = tree_search_offset(ctl, offset_to_bitmap(ctl, offset), btrfs_remove_free_space()
2370 unlink_free_space(ctl, info); btrfs_remove_free_space()
2377 ret = link_free_space(ctl, info); btrfs_remove_free_space()
2390 ret = link_free_space(ctl, info); btrfs_remove_free_space()
2404 spin_unlock(&ctl->tree_lock); btrfs_remove_free_space()
2413 ret = remove_from_bitmap(ctl, info, &offset, &bytes); btrfs_remove_free_space()
2419 spin_unlock(&ctl->tree_lock); btrfs_remove_free_space()
2427 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_dump_free_space() local
2432 for (n = rb_first(&ctl->free_space_offset); n; n = rb_next(n)) { btrfs_dump_free_space()
2449 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_init_free_space_ctl() local
2451 spin_lock_init(&ctl->tree_lock); btrfs_init_free_space_ctl()
2452 ctl->unit = block_group->sectorsize; btrfs_init_free_space_ctl()
2453 ctl->start = block_group->key.objectid; btrfs_init_free_space_ctl()
2454 ctl->private = block_group; btrfs_init_free_space_ctl()
2455 ctl->op = &free_space_op; btrfs_init_free_space_ctl()
2456 INIT_LIST_HEAD(&ctl->trimming_ranges); btrfs_init_free_space_ctl()
2457 mutex_init(&ctl->cache_writeout_mutex); btrfs_init_free_space_ctl()
2464 ctl->extents_thresh = ((1024 * 32) / 2) / btrfs_init_free_space_ctl()
2479 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; __btrfs_return_cluster_to_free_space() local
2502 try_merge_free_space(ctl, entry, false); __btrfs_return_cluster_to_free_space()
2503 steal_from_bitmap(ctl, entry, false); __btrfs_return_cluster_to_free_space()
2505 tree_insert_offset(&ctl->free_space_offset, __btrfs_return_cluster_to_free_space()
2517 struct btrfs_free_space_ctl *ctl) __btrfs_remove_free_space_cache_locked()
2522 while ((node = rb_last(&ctl->free_space_offset)) != NULL) { __btrfs_remove_free_space_cache_locked()
2525 unlink_free_space(ctl, info); __btrfs_remove_free_space_cache_locked()
2528 free_bitmap(ctl, info); __btrfs_remove_free_space_cache_locked()
2531 cond_resched_lock(&ctl->tree_lock); __btrfs_remove_free_space_cache_locked()
2535 void __btrfs_remove_free_space_cache(struct btrfs_free_space_ctl *ctl) __btrfs_remove_free_space_cache() argument
2537 spin_lock(&ctl->tree_lock); __btrfs_remove_free_space_cache()
2538 __btrfs_remove_free_space_cache_locked(ctl); __btrfs_remove_free_space_cache()
2539 spin_unlock(&ctl->tree_lock); __btrfs_remove_free_space_cache()
2544 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_remove_free_space_cache() local
2548 spin_lock(&ctl->tree_lock); btrfs_remove_free_space_cache()
2557 cond_resched_lock(&ctl->tree_lock); btrfs_remove_free_space_cache()
2559 __btrfs_remove_free_space_cache_locked(ctl); btrfs_remove_free_space_cache()
2560 spin_unlock(&ctl->tree_lock); btrfs_remove_free_space_cache()
2568 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_find_space_for_alloc() local
2575 spin_lock(&ctl->tree_lock); btrfs_find_space_for_alloc()
2576 entry = find_free_space(ctl, &offset, &bytes_search, btrfs_find_space_for_alloc()
2583 bitmap_clear_bits(ctl, entry, offset, bytes); btrfs_find_space_for_alloc()
2585 free_bitmap(ctl, entry); btrfs_find_space_for_alloc()
2587 unlink_free_space(ctl, entry); btrfs_find_space_for_alloc()
2598 link_free_space(ctl, entry); btrfs_find_space_for_alloc()
2601 spin_unlock(&ctl->tree_lock); btrfs_find_space_for_alloc()
2604 __btrfs_add_free_space(ctl, align_gap, align_gap_len); btrfs_find_space_for_alloc()
2620 struct btrfs_free_space_ctl *ctl; btrfs_return_cluster_to_free_space() local
2639 ctl = block_group->free_space_ctl; btrfs_return_cluster_to_free_space()
2642 spin_lock(&ctl->tree_lock); btrfs_return_cluster_to_free_space()
2644 spin_unlock(&ctl->tree_lock); btrfs_return_cluster_to_free_space()
2657 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_alloc_from_bitmap() local
2666 err = search_bitmap(ctl, entry, &search_start, &search_bytes); btrfs_alloc_from_bitmap()
2674 __bitmap_clear_bits(ctl, entry, ret, bytes); btrfs_alloc_from_bitmap()
2688 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_alloc_from_cluster() local
2750 spin_lock(&ctl->tree_lock); btrfs_alloc_from_cluster()
2752 ctl->free_space -= bytes; btrfs_alloc_from_cluster()
2754 ctl->free_extents--; btrfs_alloc_from_cluster()
2757 ctl->total_bitmaps--; btrfs_alloc_from_cluster()
2758 ctl->op->recalc_thresholds(ctl); btrfs_alloc_from_cluster()
2763 spin_unlock(&ctl->tree_lock); btrfs_alloc_from_cluster()
2774 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_bitmap_cluster() local
2784 i = offset_to_bit(entry->offset, ctl->unit, btrfs_bitmap_cluster()
2786 want_bits = bytes_to_bits(bytes, ctl->unit); btrfs_bitmap_cluster()
2787 min_bits = bytes_to_bits(min_bytes, ctl->unit); btrfs_bitmap_cluster()
2811 if (cluster->max_size < found_bits * ctl->unit) btrfs_bitmap_cluster()
2812 cluster->max_size = found_bits * ctl->unit; btrfs_bitmap_cluster()
2819 cluster->window_start = start * ctl->unit + entry->offset; btrfs_bitmap_cluster()
2820 rb_erase(&entry->offset_index, &ctl->free_space_offset); btrfs_bitmap_cluster()
2826 total_found * ctl->unit, 1); btrfs_bitmap_cluster()
2841 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; setup_cluster_no_bitmap() local
2850 entry = tree_search_offset(ctl, offset, 0, 1); setup_cluster_no_bitmap()
2910 rb_erase(&entry->offset_index, &ctl->free_space_offset); setup_cluster_no_bitmap()
2932 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; setup_cluster_bitmap() local
2935 u64 bitmap_offset = offset_to_bitmap(ctl, offset); setup_cluster_bitmap()
2937 if (ctl->total_bitmaps == 0) setup_cluster_bitmap()
2946 entry = tree_search_offset(ctl, bitmap_offset, 1, 0); setup_cluster_bitmap()
2980 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; btrfs_find_space_cluster() local
3003 spin_lock(&ctl->tree_lock); btrfs_find_space_cluster()
3009 if (ctl->free_space < bytes) { btrfs_find_space_cluster()
3010 spin_unlock(&ctl->tree_lock); btrfs_find_space_cluster()
3047 spin_unlock(&ctl->tree_lock); btrfs_find_space_cluster()
3072 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; do_trimming() local
3092 mutex_lock(&ctl->cache_writeout_mutex); do_trimming()
3095 mutex_unlock(&ctl->cache_writeout_mutex); do_trimming()
3114 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; trim_no_bitmap() local
3125 mutex_lock(&ctl->cache_writeout_mutex); trim_no_bitmap()
3126 spin_lock(&ctl->tree_lock); trim_no_bitmap()
3128 if (ctl->free_space < minlen) { trim_no_bitmap()
3129 spin_unlock(&ctl->tree_lock); trim_no_bitmap()
3130 mutex_unlock(&ctl->cache_writeout_mutex); trim_no_bitmap()
3134 entry = tree_search_offset(ctl, start, 0, 1); trim_no_bitmap()
3136 spin_unlock(&ctl->tree_lock); trim_no_bitmap()
3137 mutex_unlock(&ctl->cache_writeout_mutex); trim_no_bitmap()
3145 spin_unlock(&ctl->tree_lock); trim_no_bitmap()
3146 mutex_unlock(&ctl->cache_writeout_mutex); trim_no_bitmap()
3154 spin_unlock(&ctl->tree_lock); trim_no_bitmap()
3155 mutex_unlock(&ctl->cache_writeout_mutex); trim_no_bitmap()
3164 spin_unlock(&ctl->tree_lock); trim_no_bitmap()
3165 mutex_unlock(&ctl->cache_writeout_mutex); trim_no_bitmap()
3169 unlink_free_space(ctl, entry); trim_no_bitmap()
3172 spin_unlock(&ctl->tree_lock); trim_no_bitmap()
3175 list_add_tail(&trim_entry.list, &ctl->trimming_ranges); trim_no_bitmap()
3176 mutex_unlock(&ctl->cache_writeout_mutex); trim_no_bitmap()
3199 struct btrfs_free_space_ctl *ctl = block_group->free_space_ctl; trim_bitmaps() local
3204 u64 offset = offset_to_bitmap(ctl, start); trim_bitmaps()
3210 mutex_lock(&ctl->cache_writeout_mutex); trim_bitmaps()
3211 spin_lock(&ctl->tree_lock); trim_bitmaps()
3213 if (ctl->free_space < minlen) { trim_bitmaps()
3214 spin_unlock(&ctl->tree_lock); trim_bitmaps()
3215 mutex_unlock(&ctl->cache_writeout_mutex); trim_bitmaps()
3219 entry = tree_search_offset(ctl, offset, 1, 0); trim_bitmaps()
3221 spin_unlock(&ctl->tree_lock); trim_bitmaps()
3222 mutex_unlock(&ctl->cache_writeout_mutex); trim_bitmaps()
3228 ret2 = search_bitmap(ctl, entry, &start, &bytes); trim_bitmaps()
3230 spin_unlock(&ctl->tree_lock); trim_bitmaps()
3231 mutex_unlock(&ctl->cache_writeout_mutex); trim_bitmaps()
3238 spin_unlock(&ctl->tree_lock); trim_bitmaps()
3239 mutex_unlock(&ctl->cache_writeout_mutex); trim_bitmaps()
3243 bitmap_clear_bits(ctl, entry, start, bytes); trim_bitmaps()
3245 free_bitmap(ctl, entry); trim_bitmaps()
3247 spin_unlock(&ctl->tree_lock); trim_bitmaps()
3250 list_add_tail(&trim_entry.list, &ctl->trimming_ranges); trim_bitmaps()
3251 mutex_unlock(&ctl->cache_writeout_mutex); trim_bitmaps()
3259 offset += BITS_PER_BITMAP * ctl->unit; trim_bitmaps()
3262 if (start >= offset + BITS_PER_BITMAP * ctl->unit) trim_bitmaps()
3263 offset += BITS_PER_BITMAP * ctl->unit; trim_bitmaps()
3345 struct btrfs_free_space_ctl *ctl = fs_root->free_ino_ctl; btrfs_find_ino_for_alloc() local
3349 spin_lock(&ctl->tree_lock); btrfs_find_ino_for_alloc()
3351 if (RB_EMPTY_ROOT(&ctl->free_space_offset)) btrfs_find_ino_for_alloc()
3354 entry = rb_entry(rb_first(&ctl->free_space_offset), btrfs_find_ino_for_alloc()
3360 unlink_free_space(ctl, entry); btrfs_find_ino_for_alloc()
3366 link_free_space(ctl, entry); btrfs_find_ino_for_alloc()
3372 ret = search_bitmap(ctl, entry, &offset, &count); btrfs_find_ino_for_alloc()
3377 bitmap_clear_bits(ctl, entry, offset, 1); btrfs_find_ino_for_alloc()
3379 free_bitmap(ctl, entry); btrfs_find_ino_for_alloc()
3382 spin_unlock(&ctl->tree_lock); btrfs_find_ino_for_alloc()
3421 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; load_free_ino_cache() local
3448 ret = __load_free_space_cache(root, inode, ctl, path, 0); load_free_ino_cache()
3466 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; btrfs_write_out_ino_cache() local
3475 ret = __btrfs_write_out_cache(root, inode, ctl, NULL, &io_ctl, btrfs_write_out_ino_cache()
3511 struct btrfs_free_space_ctl *ctl = cache->free_space_ctl; test_add_free_space_entry() local
3525 spin_lock(&ctl->tree_lock); test_add_free_space_entry()
3528 ret = link_free_space(ctl, info); test_add_free_space_entry()
3529 spin_unlock(&ctl->tree_lock); test_add_free_space_entry()
3543 spin_lock(&ctl->tree_lock); test_add_free_space_entry()
3544 bitmap_info = tree_search_offset(ctl, offset_to_bitmap(ctl, offset), test_add_free_space_entry()
3549 add_new_bitmap(ctl, info, offset); test_add_free_space_entry()
3554 bytes_added = add_bytes_to_bitmap(ctl, bitmap_info, offset, bytes); test_add_free_space_entry()
3557 spin_unlock(&ctl->tree_lock); test_add_free_space_entry()
3577 struct btrfs_free_space_ctl *ctl = cache->free_space_ctl; test_check_exists() local
3581 spin_lock(&ctl->tree_lock); test_check_exists()
3582 info = tree_search_offset(ctl, offset, 0, 0); test_check_exists()
3584 info = tree_search_offset(ctl, offset_to_bitmap(ctl, offset), test_check_exists()
3597 bit_bytes = ctl->unit; test_check_exists()
3598 ret = search_bitmap(ctl, info, &bit_off, &bit_bytes); test_check_exists()
3650 spin_unlock(&ctl->tree_lock); test_check_exists()
670 __load_free_space_cache(struct btrfs_root *root, struct inode *inode, struct btrfs_free_space_ctl *ctl, struct btrfs_path *path, u64 offset) __load_free_space_cache() argument
905 write_cache_extent_entries(struct btrfs_io_ctl *io_ctl, struct btrfs_free_space_ctl *ctl, struct btrfs_block_group_cache *block_group, int *entries, int *bitmaps, struct list_head *bitmap_list) write_cache_extent_entries() argument
1223 __btrfs_write_out_cache(struct btrfs_root *root, struct inode *inode, struct btrfs_free_space_ctl *ctl, struct btrfs_block_group_cache *block_group, struct btrfs_io_ctl *io_ctl, struct btrfs_trans_handle *trans, struct btrfs_path *path, u64 offset) __btrfs_write_out_cache() argument
2516 __btrfs_remove_free_space_cache_locked( struct btrfs_free_space_ctl *ctl) __btrfs_remove_free_space_cache_locked() argument
H A Dinode-map.c33 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; caching_kthread() local
107 __btrfs_add_free_space(ctl, last + 1, caching_kthread()
118 __btrfs_add_free_space(ctl, last + 1, caching_kthread()
139 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; start_caching() local
173 __btrfs_add_free_space(ctl, objectid, start_caching()
247 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; btrfs_unpin_free_ino() local
280 __btrfs_add_free_space(ctl, info->offset, count); btrfs_unpin_free_ino()
292 static void recalculate_thresholds(struct btrfs_free_space_ctl *ctl) recalculate_thresholds() argument
299 n = rb_last(&ctl->free_space_offset); recalculate_thresholds()
301 ctl->extents_thresh = INIT_THRESHOLD; recalculate_thresholds()
314 if (max_bitmaps <= ctl->total_bitmaps) { recalculate_thresholds()
315 ctl->extents_thresh = 0; recalculate_thresholds()
319 ctl->extents_thresh = (max_bitmaps - ctl->total_bitmaps) * recalculate_thresholds()
327 static bool use_bitmap(struct btrfs_free_space_ctl *ctl, use_bitmap() argument
330 if (ctl->free_extents < ctl->extents_thresh || use_bitmap()
342 static void pinned_recalc_thresholds(struct btrfs_free_space_ctl *ctl) pinned_recalc_thresholds() argument
346 static bool pinned_use_bitmap(struct btrfs_free_space_ctl *ctl, pinned_use_bitmap() argument
366 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; btrfs_init_free_ino_ctl() local
369 spin_lock_init(&ctl->tree_lock); btrfs_init_free_ino_ctl()
370 ctl->unit = 1; btrfs_init_free_ino_ctl()
371 ctl->start = 0; btrfs_init_free_ino_ctl()
372 ctl->private = NULL; btrfs_init_free_ino_ctl()
373 ctl->op = &free_ino_op; btrfs_init_free_ino_ctl()
374 INIT_LIST_HEAD(&ctl->trimming_ranges); btrfs_init_free_ino_ctl()
375 mutex_init(&ctl->cache_writeout_mutex); btrfs_init_free_ino_ctl()
382 ctl->extents_thresh = INIT_THRESHOLD; btrfs_init_free_ino_ctl()
395 struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; btrfs_save_ino_cache() local
482 spin_lock(&ctl->tree_lock); btrfs_save_ino_cache()
483 prealloc = sizeof(struct btrfs_free_space) * ctl->free_extents; btrfs_save_ino_cache()
485 prealloc += ctl->total_bitmaps * PAGE_CACHE_SIZE; btrfs_save_ino_cache()
486 spin_unlock(&ctl->tree_lock); btrfs_save_ino_cache()
H A Dfree-space-cache.h46 void (*recalc_thresholds)(struct btrfs_free_space_ctl *ctl);
47 bool (*use_bitmap)(struct btrfs_free_space_ctl *ctl,
91 int __btrfs_add_free_space(struct btrfs_free_space_ctl *ctl,
102 void __btrfs_remove_free_space_cache(struct btrfs_free_space_ctl *ctl);
/linux-4.1.27/arch/alpha/oprofile/
H A Dop_model_ev5.c30 int i, ctl, reset, need_reset; common_reg_setup() local
45 ctl = 0; common_reg_setup()
61 ctl |= event << 31; common_reg_setup()
65 ctl |= (event - 24) << 4; common_reg_setup()
67 ctl |= (event - 40) << cbox1_ofs | 15 << 4; common_reg_setup()
69 ctl |= event - 48; common_reg_setup()
71 ctl |= (event - 64) << cbox2_ofs | 15; common_reg_setup()
73 reg->mux_select = ctl; common_reg_setup()
78 ctl = 0; common_reg_setup()
79 ctl |= !sys->enable_pal << 9; common_reg_setup()
80 ctl |= !sys->enable_kernel << 8; common_reg_setup()
81 ctl |= !sys->enable_user << 30; common_reg_setup()
82 reg->proc_mode = ctl; common_reg_setup()
89 ctl = reset = need_reset = 0; common_reg_setup()
105 ctl |= hilo << (8 - i*2); common_reg_setup()
110 reg->freq = ctl; common_reg_setup()
H A Dop_model_ev6.c24 unsigned long ctl, reset, need_reset, i; ev6_reg_setup() local
28 ctl = 0; ev6_reg_setup()
30 ctl |= (ctr[0].event & 1) << 4; ev6_reg_setup()
32 ctl |= (ctr[1].event - 2) & 15; ev6_reg_setup()
33 reg->mux_select = ctl; ev6_reg_setup()
H A Dop_model_ev4.c24 unsigned long ctl = 0, count, hilo; ev4_reg_setup() local
39 ctl |= (ctr[0].enabled ? ctr[0].event << 8 : 14 << 8); ev4_reg_setup()
40 ctl |= (ctr[1].enabled ? (ctr[1].event - 16) << 32 : 7ul << 32); ev4_reg_setup()
54 ctl |= (ctr[0].enabled && hilo) << 3; ev4_reg_setup()
62 ctl |= (ctr[1].enabled && hilo); ev4_reg_setup()
64 reg->mux_select = ctl; ev4_reg_setup()
H A Dop_model_ev67.c25 unsigned long ctl, reset, need_reset, i; ev67_reg_setup() local
28 ctl = 1UL << 4; /* Enable ProfileMe mode. */ ev67_reg_setup()
33 ctl |= (ctr[1].event & 3) << 2; ev67_reg_setup()
36 ctl |= 1UL << 2; ev67_reg_setup()
38 reg->mux_select = ctl; ev67_reg_setup()
/linux-4.1.27/net/unix/
H A Dsysctl_net_unix.c42 net->unx.ctl = register_net_sysctl(net, "net/unix", table); unix_sysctl_register()
43 if (net->unx.ctl == NULL) unix_sysctl_register()
58 table = net->unx.ctl->ctl_table_arg; unix_sysctl_unregister()
59 unregister_net_sysctl_table(net->unx.ctl); unix_sysctl_unregister()
/linux-4.1.27/arch/x86/include/asm/
H A Dgart.h63 u32 ctl; gart_set_size_and_enable() local
69 ctl = order << 1; gart_set_size_and_enable()
71 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); gart_set_size_and_enable()
76 u32 tmp, ctl; enable_gart_translation() local
85 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl); enable_gart_translation()
86 ctl |= GARTEN | DISTLBWALKPRB; enable_gart_translation()
87 ctl &= ~(DISGARTCPU | DISGARTIO); enable_gart_translation()
88 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); enable_gart_translation()
/linux-4.1.27/drivers/char/hw_random/
H A Docteon-rng.c30 union cvmx_rnm_ctl_status ctl; octeon_rng_init() local
33 ctl.u64 = 0; octeon_rng_init()
34 ctl.s.ent_en = 1; /* Enable the entropy source. */ octeon_rng_init()
35 ctl.s.rng_en = 1; /* Enable the RNG hardware. */ octeon_rng_init()
36 cvmx_write_csr((u64)p->control_status, ctl.u64); octeon_rng_init()
42 union cvmx_rnm_ctl_status ctl; octeon_rng_cleanup() local
45 ctl.u64 = 0; octeon_rng_cleanup()
47 cvmx_write_csr((u64)p->control_status, ctl.u64); octeon_rng_cleanup()
H A Dpasemi-rng.c71 u32 ctl; pasemi_rng_init() local
73 ctl = SDCRNG_CTL_DR | SDCRNG_CTL_SELECT_RRG_RNG | SDCRNG_CTL_KSZ; pasemi_rng_init()
74 out_le32(rng_regs + SDCRNG_CTL_REG, ctl); pasemi_rng_init()
75 out_le32(rng_regs + SDCRNG_CTL_REG, ctl & ~SDCRNG_CTL_DR); pasemi_rng_init()
83 u32 ctl; pasemi_rng_cleanup() local
85 ctl = SDCRNG_CTL_RE | SDCRNG_CTL_CE; pasemi_rng_cleanup()
87 in_le32(rng_regs + SDCRNG_CTL_REG) & ~ctl); pasemi_rng_cleanup()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb/
H A Dmv88e1xxx.c49 u32 ctl; mv88e1xxx_reset() local
55 (void) simple_mdio_read(cphy, MII_BMCR, &ctl); mv88e1xxx_reset()
56 ctl &= BMCR_RESET; mv88e1xxx_reset()
57 if (ctl) mv88e1xxx_reset()
59 } while (ctl && --time_out); mv88e1xxx_reset()
61 return ctl ? -1 : 0; mv88e1xxx_reset()
126 u32 ctl; mv88e1xxx_set_speed_duplex() local
128 (void) simple_mdio_read(phy, MII_BMCR, &ctl); mv88e1xxx_set_speed_duplex()
130 ctl &= ~(BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); mv88e1xxx_set_speed_duplex()
132 ctl |= BMCR_SPEED100; mv88e1xxx_set_speed_duplex()
134 ctl |= BMCR_SPEED1000; mv88e1xxx_set_speed_duplex()
137 ctl &= ~(BMCR_FULLDPLX | BMCR_ANENABLE); mv88e1xxx_set_speed_duplex()
139 ctl |= BMCR_FULLDPLX; mv88e1xxx_set_speed_duplex()
141 if (ctl & BMCR_SPEED1000) /* auto-negotiation required for 1Gb/s */ mv88e1xxx_set_speed_duplex()
142 ctl |= BMCR_ANENABLE; mv88e1xxx_set_speed_duplex()
143 (void) simple_mdio_write(phy, MII_BMCR, ctl); mv88e1xxx_set_speed_duplex()
162 u32 ctl; mv88e1xxx_autoneg_enable() local
166 (void) simple_mdio_read(cphy, MII_BMCR, &ctl); mv88e1xxx_autoneg_enable()
168 ctl |= BMCR_ANENABLE | BMCR_ANRESTART; mv88e1xxx_autoneg_enable()
169 (void) simple_mdio_write(cphy, MII_BMCR, ctl); mv88e1xxx_autoneg_enable()
175 u32 ctl; mv88e1xxx_autoneg_disable() local
187 (void) simple_mdio_read(cphy, MII_BMCR, &ctl); mv88e1xxx_autoneg_disable()
188 ctl &= ~BMCR_ANENABLE; mv88e1xxx_autoneg_disable()
189 (void) simple_mdio_write(cphy, MII_BMCR, ctl | BMCR_ANRESTART); mv88e1xxx_autoneg_disable()
/linux-4.1.27/sound/pci/oxygen/
H A Dxonar_wm87x6.c508 static int wm8776_bit_switch_get(struct snd_kcontrol *ctl, wm8776_bit_switch_get() argument
511 struct oxygen *chip = ctl->private_data; wm8776_bit_switch_get()
513 u16 bit = ctl->private_value & 0xffff; wm8776_bit_switch_get()
514 unsigned int reg_index = (ctl->private_value >> 16) & 0xff; wm8776_bit_switch_get()
515 bool invert = (ctl->private_value >> 24) & 1; wm8776_bit_switch_get()
522 static int wm8776_bit_switch_put(struct snd_kcontrol *ctl, wm8776_bit_switch_put() argument
525 struct oxygen *chip = ctl->private_data; wm8776_bit_switch_put()
527 u16 bit = ctl->private_value & 0xffff; wm8776_bit_switch_put()
529 unsigned int reg_index = (ctl->private_value >> 16) & 0xff; wm8776_bit_switch_put()
530 bool invert = (ctl->private_value >> 24) & 1; wm8776_bit_switch_put()
544 static int wm8776_field_enum_info(struct snd_kcontrol *ctl, wm8776_field_enum_info() argument
580 max = (ctl->private_value >> 12) & 0xf; wm8776_field_enum_info()
581 switch ((ctl->private_value >> 24) & 0x1f) { wm8776_field_enum_info()
586 if (((ctl->private_value >> 20) & 0xf) == 0) { wm8776_field_enum_info()
587 if (ctl->private_value & LC_CONTROL_LIMITER) wm8776_field_enum_info()
592 if (ctl->private_value & LC_CONTROL_LIMITER) wm8776_field_enum_info()
607 static int wm8776_field_volume_info(struct snd_kcontrol *ctl, wm8776_field_volume_info() argument
612 info->value.integer.min = (ctl->private_value >> 8) & 0xf; wm8776_field_volume_info()
613 info->value.integer.max = (ctl->private_value >> 12) & 0xf; wm8776_field_volume_info()
617 static void wm8776_field_set_from_ctl(struct snd_kcontrol *ctl) wm8776_field_set_from_ctl() argument
619 struct oxygen *chip = ctl->private_data; wm8776_field_set_from_ctl()
631 if (!(ctl->private_value & mode)) wm8776_field_set_from_ctl()
634 value = ctl->private_value & 0xf; wm8776_field_set_from_ctl()
635 min = (ctl->private_value >> 8) & 0xf; wm8776_field_set_from_ctl()
636 max = (ctl->private_value >> 12) & 0xf; wm8776_field_set_from_ctl()
637 mask = (ctl->private_value >> 16) & 0xf; wm8776_field_set_from_ctl()
638 shift = (ctl->private_value >> 20) & 0xf; wm8776_field_set_from_ctl()
639 reg_index = (ctl->private_value >> 24) & 0x1f; wm8776_field_set_from_ctl()
640 invert = (ctl->private_value >> 29) & 0x1; wm8776_field_set_from_ctl()
650 static int wm8776_field_set(struct snd_kcontrol *ctl, unsigned int value) wm8776_field_set() argument
652 struct oxygen *chip = ctl->private_data; wm8776_field_set()
656 min = (ctl->private_value >> 8) & 0xf; wm8776_field_set()
657 max = (ctl->private_value >> 12) & 0xf; wm8776_field_set()
661 changed = value != (ctl->private_value & 0xf); wm8776_field_set()
663 ctl->private_value = (ctl->private_value & ~0xf) | value; wm8776_field_set()
664 wm8776_field_set_from_ctl(ctl); wm8776_field_set()
670 static int wm8776_field_enum_get(struct snd_kcontrol *ctl, wm8776_field_enum_get() argument
673 value->value.enumerated.item[0] = ctl->private_value & 0xf; wm8776_field_enum_get()
677 static int wm8776_field_volume_get(struct snd_kcontrol *ctl, wm8776_field_volume_get() argument
680 value->value.integer.value[0] = ctl->private_value & 0xf; wm8776_field_volume_get()
684 static int wm8776_field_enum_put(struct snd_kcontrol *ctl, wm8776_field_enum_put() argument
687 return wm8776_field_set(ctl, value->value.enumerated.item[0]); wm8776_field_enum_put()
690 static int wm8776_field_volume_put(struct snd_kcontrol *ctl, wm8776_field_volume_put() argument
693 return wm8776_field_set(ctl, value->value.integer.value[0]); wm8776_field_volume_put()
696 static int wm8776_hp_vol_info(struct snd_kcontrol *ctl, wm8776_hp_vol_info() argument
706 static int wm8776_hp_vol_get(struct snd_kcontrol *ctl, wm8776_hp_vol_get() argument
709 struct oxygen *chip = ctl->private_data; wm8776_hp_vol_get()
721 static int wm8776_hp_vol_put(struct snd_kcontrol *ctl, wm8776_hp_vol_put() argument
724 struct oxygen *chip = ctl->private_data; wm8776_hp_vol_put()
760 static int wm8776_input_mux_get(struct snd_kcontrol *ctl, wm8776_input_mux_get() argument
763 struct oxygen *chip = ctl->private_data; wm8776_input_mux_get()
765 unsigned int mux_bit = ctl->private_value; wm8776_input_mux_get()
772 static int wm8776_input_mux_put(struct snd_kcontrol *ctl, wm8776_input_mux_put() argument
775 struct oxygen *chip = ctl->private_data; wm8776_input_mux_put()
778 unsigned int mux_bit = ctl->private_value; wm8776_input_mux_put()
810 static int wm8776_input_vol_info(struct snd_kcontrol *ctl, wm8776_input_vol_info() argument
820 static int wm8776_input_vol_get(struct snd_kcontrol *ctl, wm8776_input_vol_get() argument
823 struct oxygen *chip = ctl->private_data; wm8776_input_vol_get()
835 static int wm8776_input_vol_put(struct snd_kcontrol *ctl, wm8776_input_vol_put() argument
838 struct oxygen *chip = ctl->private_data; wm8776_input_vol_put()
855 static int wm8776_level_control_info(struct snd_kcontrol *ctl, wm8776_level_control_info() argument
865 static int wm8776_level_control_get(struct snd_kcontrol *ctl, wm8776_level_control_get() argument
868 struct oxygen *chip = ctl->private_data; wm8776_level_control_get()
882 struct snd_kcontrol *ctl, unsigned int mode) activate_control()
886 if (ctl->private_value & mode) activate_control()
890 if ((ctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_INACTIVE) != access) { activate_control()
891 ctl->vd[0].access ^= SNDRV_CTL_ELEM_ACCESS_INACTIVE; activate_control()
892 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id); activate_control()
896 static int wm8776_level_control_put(struct snd_kcontrol *ctl, wm8776_level_control_put() argument
899 struct oxygen *chip = ctl->private_data; wm8776_level_control_put()
908 changed = value->value.enumerated.item[0] != ctl->private_value; wm8776_level_control_put()
910 ctl->private_value = value->value.enumerated.item[0]; wm8776_level_control_put()
942 static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) hpf_info() argument
951 static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) hpf_get() argument
953 struct oxygen *chip = ctl->private_data; hpf_get()
961 static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) hpf_put() argument
963 struct oxygen *chip = ctl->private_data; hpf_put()
1170 struct snd_kcontrol *ctl; add_lc_controls() local
1175 ctl = snd_ctl_new1(&lc_controls[i], chip); add_lc_controls()
1176 if (!ctl) add_lc_controls()
1178 err = snd_ctl_add(chip->card, ctl); add_lc_controls()
1181 data->lc_controls[i] = ctl; add_lc_controls()
1190 struct snd_kcontrol *ctl; xonar_ds_mixer_init() local
1194 ctl = snd_ctl_new1(&ds_controls[i], chip); xonar_ds_mixer_init()
1195 if (!ctl) xonar_ds_mixer_init()
1197 err = snd_ctl_add(chip->card, ctl); xonar_ds_mixer_init()
1200 if (!strcmp(ctl->id.name, "Line Capture Switch")) xonar_ds_mixer_init()
1201 data->line_adcmux_control = ctl; xonar_ds_mixer_init()
1202 else if (!strcmp(ctl->id.name, "Mic Capture Switch")) xonar_ds_mixer_init()
1203 data->mic_adcmux_control = ctl; xonar_ds_mixer_init()
1214 struct snd_kcontrol *ctl; xonar_hdav_slim_mixer_init() local
1218 ctl = snd_ctl_new1(&hdav_slim_controls[i], chip); xonar_hdav_slim_mixer_init()
1219 if (!ctl) xonar_hdav_slim_mixer_init()
1221 err = snd_ctl_add(chip->card, ctl); xonar_hdav_slim_mixer_init()
881 activate_control(struct oxygen *chip, struct snd_kcontrol *ctl, unsigned int mode) activate_control() argument
H A Dxonar_dg_mixer.c57 static int output_select_info(struct snd_kcontrol *ctl, output_select_info() argument
69 static int output_select_get(struct snd_kcontrol *ctl, output_select_get() argument
72 struct oxygen *chip = ctl->private_data; output_select_get()
81 static int output_select_put(struct snd_kcontrol *ctl, output_select_put() argument
84 struct oxygen *chip = ctl->private_data; output_select_put()
104 static int hp_stereo_volume_info(struct snd_kcontrol *ctl, hp_stereo_volume_info() argument
114 static int hp_stereo_volume_get(struct snd_kcontrol *ctl, hp_stereo_volume_get() argument
117 struct oxygen *chip = ctl->private_data; hp_stereo_volume_get()
130 static int hp_stereo_volume_put(struct snd_kcontrol *ctl, hp_stereo_volume_put() argument
133 struct oxygen *chip = ctl->private_data; hp_stereo_volume_put()
160 static int hp_mute_get(struct snd_kcontrol *ctl, hp_mute_get() argument
163 struct oxygen *chip = ctl->private_data; hp_mute_get()
173 static int hp_mute_put(struct snd_kcontrol *ctl, hp_mute_put() argument
176 struct oxygen *chip = ctl->private_data; hp_mute_put()
208 static int input_vol_info(struct snd_kcontrol *ctl, input_vol_info() argument
218 static int input_vol_get(struct snd_kcontrol *ctl, input_vol_get() argument
221 struct oxygen *chip = ctl->private_data; input_vol_get()
223 unsigned int idx = ctl->private_value; input_vol_get()
232 static int input_vol_put(struct snd_kcontrol *ctl, input_vol_put() argument
235 struct oxygen *chip = ctl->private_data; input_vol_put()
237 unsigned int idx = ctl->private_value; input_vol_put()
279 static int input_sel_info(struct snd_kcontrol *ctl, input_sel_info() argument
289 static int input_sel_get(struct snd_kcontrol *ctl, input_sel_get() argument
292 struct oxygen *chip = ctl->private_data; input_sel_get()
301 static int input_sel_put(struct snd_kcontrol *ctl, input_sel_put() argument
304 struct oxygen *chip = ctl->private_data; input_sel_put()
330 static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) hpf_info() argument
337 static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) hpf_get() argument
339 struct oxygen *chip = ctl->private_data; hpf_get()
347 static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) hpf_put() argument
349 struct oxygen *chip = ctl->private_data; hpf_put()
H A Doxygen_mixer.c28 static int dac_volume_info(struct snd_kcontrol *ctl, dac_volume_info() argument
31 struct oxygen *chip = ctl->private_data; dac_volume_info()
40 static int dac_volume_get(struct snd_kcontrol *ctl, dac_volume_get() argument
43 struct oxygen *chip = ctl->private_data; dac_volume_get()
53 static int dac_volume_put(struct snd_kcontrol *ctl, dac_volume_put() argument
56 struct oxygen *chip = ctl->private_data; dac_volume_put()
73 static int dac_mute_get(struct snd_kcontrol *ctl, dac_mute_get() argument
76 struct oxygen *chip = ctl->private_data; dac_mute_get()
84 static int dac_mute_put(struct snd_kcontrol *ctl, dac_mute_put() argument
87 struct oxygen *chip = ctl->private_data; dac_mute_put()
110 static int upmix_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) upmix_info() argument
119 struct oxygen *chip = ctl->private_data; upmix_info()
125 static int upmix_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) upmix_get() argument
127 struct oxygen *chip = ctl->private_data; upmix_get()
195 static int upmix_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) upmix_put() argument
197 struct oxygen *chip = ctl->private_data; upmix_put()
213 static int spdif_switch_get(struct snd_kcontrol *ctl, spdif_switch_get() argument
216 struct oxygen *chip = ctl->private_data; spdif_switch_get()
288 static int spdif_switch_put(struct snd_kcontrol *ctl, spdif_switch_put() argument
291 struct oxygen *chip = ctl->private_data; spdif_switch_put()
306 static int spdif_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) spdif_info() argument
346 static int spdif_default_get(struct snd_kcontrol *ctl, spdif_default_get() argument
349 struct oxygen *chip = ctl->private_data; spdif_default_get()
357 static int spdif_default_put(struct snd_kcontrol *ctl, spdif_default_put() argument
360 struct oxygen *chip = ctl->private_data; spdif_default_put()
376 static int spdif_mask_get(struct snd_kcontrol *ctl, spdif_mask_get() argument
386 static int spdif_pcm_get(struct snd_kcontrol *ctl, spdif_pcm_get() argument
389 struct oxygen *chip = ctl->private_data; spdif_pcm_get()
397 static int spdif_pcm_put(struct snd_kcontrol *ctl, spdif_pcm_put() argument
400 struct oxygen *chip = ctl->private_data; spdif_pcm_put()
416 static int spdif_input_mask_get(struct snd_kcontrol *ctl, spdif_input_mask_get() argument
426 static int spdif_input_default_get(struct snd_kcontrol *ctl, spdif_input_default_get() argument
429 struct oxygen *chip = ctl->private_data; spdif_input_default_get()
440 static int spdif_bit_switch_get(struct snd_kcontrol *ctl, spdif_bit_switch_get() argument
443 struct oxygen *chip = ctl->private_data; spdif_bit_switch_get()
444 u32 bit = ctl->private_value; spdif_bit_switch_get()
451 static int spdif_bit_switch_put(struct snd_kcontrol *ctl, spdif_bit_switch_put() argument
454 struct oxygen *chip = ctl->private_data; spdif_bit_switch_put()
455 u32 bit = ctl->private_value; spdif_bit_switch_put()
472 static int monitor_volume_info(struct snd_kcontrol *ctl, monitor_volume_info() argument
482 static int monitor_get(struct snd_kcontrol *ctl, monitor_get() argument
485 struct oxygen *chip = ctl->private_data; monitor_get()
486 u8 bit = ctl->private_value; monitor_get()
487 int invert = ctl->private_value & (1 << 8); monitor_get()
494 static int monitor_put(struct snd_kcontrol *ctl, monitor_put() argument
497 struct oxygen *chip = ctl->private_data; monitor_put()
498 u8 bit = ctl->private_value; monitor_put()
499 int invert = ctl->private_value & (1 << 8); monitor_put()
516 static int ac97_switch_get(struct snd_kcontrol *ctl, ac97_switch_get() argument
519 struct oxygen *chip = ctl->private_data; ac97_switch_get()
520 unsigned int codec = (ctl->private_value >> 24) & 1; ac97_switch_get()
521 unsigned int index = ctl->private_value & 0xff; ac97_switch_get()
522 unsigned int bitnr = (ctl->private_value >> 8) & 0xff; ac97_switch_get()
523 int invert = ctl->private_value & (1 << 16); ac97_switch_get()
554 static int ac97_switch_put(struct snd_kcontrol *ctl, ac97_switch_put() argument
557 struct oxygen *chip = ctl->private_data; ac97_switch_put()
558 unsigned int codec = (ctl->private_value >> 24) & 1; ac97_switch_put()
559 unsigned int index = ctl->private_value & 0xff; ac97_switch_put()
560 unsigned int bitnr = (ctl->private_value >> 8) & 0xff; ac97_switch_put()
561 int invert = ctl->private_value & (1 << 16); ac97_switch_put()
598 static int ac97_volume_info(struct snd_kcontrol *ctl, ac97_volume_info() argument
601 int stereo = (ctl->private_value >> 16) & 1; ac97_volume_info()
610 static int ac97_volume_get(struct snd_kcontrol *ctl, ac97_volume_get() argument
613 struct oxygen *chip = ctl->private_data; ac97_volume_get()
614 unsigned int codec = (ctl->private_value >> 24) & 1; ac97_volume_get()
615 int stereo = (ctl->private_value >> 16) & 1; ac97_volume_get()
616 unsigned int index = ctl->private_value & 0xff; ac97_volume_get()
631 static int ac97_volume_put(struct snd_kcontrol *ctl, ac97_volume_put() argument
634 struct oxygen *chip = ctl->private_data; ac97_volume_put()
635 unsigned int codec = (ctl->private_value >> 24) & 1; ac97_volume_put()
636 int stereo = (ctl->private_value >> 16) & 1; ac97_volume_put()
637 unsigned int index = ctl->private_value & 0xff; ac97_volume_put()
658 static int mic_fmic_source_info(struct snd_kcontrol *ctl, mic_fmic_source_info() argument
666 static int mic_fmic_source_get(struct snd_kcontrol *ctl, mic_fmic_source_get() argument
669 struct oxygen *chip = ctl->private_data; mic_fmic_source_get()
678 static int mic_fmic_source_put(struct snd_kcontrol *ctl, mic_fmic_source_put() argument
681 struct oxygen *chip = ctl->private_data; mic_fmic_source_put()
698 static int ac97_fp_rec_volume_info(struct snd_kcontrol *ctl, ac97_fp_rec_volume_info() argument
708 static int ac97_fp_rec_volume_get(struct snd_kcontrol *ctl, ac97_fp_rec_volume_get() argument
711 struct oxygen *chip = ctl->private_data; ac97_fp_rec_volume_get()
722 static int ac97_fp_rec_volume_put(struct snd_kcontrol *ctl, ac97_fp_rec_volume_put() argument
725 struct oxygen *chip = ctl->private_data; ac97_fp_rec_volume_put()
1031 static void oxygen_any_ctl_free(struct snd_kcontrol *ctl) oxygen_any_ctl_free() argument
1033 struct oxygen *chip = ctl->private_data; oxygen_any_ctl_free()
1057 struct snd_kcontrol *ctl; add_controls() local
1083 ctl = snd_ctl_new1(&template, chip); add_controls()
1084 if (!ctl) add_controls()
1086 err = snd_ctl_add(chip->card, ctl); add_controls()
1090 if (!strcmp(ctl->id.name, known_ctl_names[j])) { add_controls()
1091 chip->controls[j] = ctl; add_controls()
1092 ctl->private_free = oxygen_any_ctl_free; add_controls()
H A Dxonar_lib.c102 int xonar_gpio_bit_switch_get(struct snd_kcontrol *ctl, xonar_gpio_bit_switch_get() argument
105 struct oxygen *chip = ctl->private_data; xonar_gpio_bit_switch_get()
106 u16 bit = ctl->private_value; xonar_gpio_bit_switch_get()
107 bool invert = ctl->private_value & XONAR_GPIO_BIT_INVERT; xonar_gpio_bit_switch_get()
114 int xonar_gpio_bit_switch_put(struct snd_kcontrol *ctl, xonar_gpio_bit_switch_put() argument
117 struct oxygen *chip = ctl->private_data; xonar_gpio_bit_switch_put()
118 u16 bit = ctl->private_value; xonar_gpio_bit_switch_put()
119 bool invert = ctl->private_value & XONAR_GPIO_BIT_INVERT; xonar_gpio_bit_switch_put()
H A Dxonar.h29 int xonar_gpio_bit_switch_get(struct snd_kcontrol *ctl,
31 int xonar_gpio_bit_switch_put(struct snd_kcontrol *ctl,
H A Doxygen.c438 static int rolloff_info(struct snd_kcontrol *ctl, rolloff_info() argument
448 static int rolloff_get(struct snd_kcontrol *ctl, rolloff_get() argument
451 struct oxygen *chip = ctl->private_data; rolloff_get()
459 static int rolloff_put(struct snd_kcontrol *ctl, rolloff_put() argument
462 struct oxygen *chip = ctl->private_data; rolloff_put()
491 static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) hpf_info() argument
500 static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) hpf_get() argument
502 struct oxygen *chip = ctl->private_data; hpf_get()
510 static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) hpf_put() argument
512 struct oxygen *chip = ctl->private_data; hpf_put()
536 static int meridian_dig_source_info(struct snd_kcontrol *ctl, meridian_dig_source_info() argument
544 static int claro_dig_source_info(struct snd_kcontrol *ctl, claro_dig_source_info() argument
552 static int meridian_dig_source_get(struct snd_kcontrol *ctl, meridian_dig_source_get() argument
555 struct oxygen *chip = ctl->private_data; meridian_dig_source_get()
563 static int claro_dig_source_get(struct snd_kcontrol *ctl, claro_dig_source_get() argument
566 struct oxygen *chip = ctl->private_data; claro_dig_source_get()
574 static int meridian_dig_source_put(struct snd_kcontrol *ctl, meridian_dig_source_put() argument
577 struct oxygen *chip = ctl->private_data; meridian_dig_source_put()
595 static int claro_dig_source_put(struct snd_kcontrol *ctl, claro_dig_source_put() argument
598 struct oxygen *chip = ctl->private_data; claro_dig_source_put()
H A Dxonar_pcm179x.c725 static int rolloff_info(struct snd_kcontrol *ctl, rolloff_info() argument
735 static int rolloff_get(struct snd_kcontrol *ctl, rolloff_get() argument
738 struct oxygen *chip = ctl->private_data; rolloff_get()
747 static int rolloff_put(struct snd_kcontrol *ctl, rolloff_put() argument
750 struct oxygen *chip = ctl->private_data; rolloff_put()
789 static int st_output_switch_info(struct snd_kcontrol *ctl, st_output_switch_info() argument
799 static int st_output_switch_get(struct snd_kcontrol *ctl, st_output_switch_get() argument
802 struct oxygen *chip = ctl->private_data; st_output_switch_get()
816 static int st_output_switch_put(struct snd_kcontrol *ctl, st_output_switch_put() argument
819 struct oxygen *chip = ctl->private_data; st_output_switch_put()
844 static int st_hp_volume_offset_info(struct snd_kcontrol *ctl, st_hp_volume_offset_info() argument
854 static int st_hp_volume_offset_get(struct snd_kcontrol *ctl, st_hp_volume_offset_get() argument
857 struct oxygen *chip = ctl->private_data; st_hp_volume_offset_get()
874 static int st_hp_volume_offset_put(struct snd_kcontrol *ctl, st_hp_volume_offset_put() argument
878 struct oxygen *chip = ctl->private_data; st_hp_volume_offset_put()
913 static int xense_output_switch_get(struct snd_kcontrol *ctl, xense_output_switch_get() argument
916 struct oxygen *chip = ctl->private_data; xense_output_switch_get()
929 static int xense_output_switch_put(struct snd_kcontrol *ctl, xense_output_switch_put() argument
932 struct oxygen *chip = ctl->private_data; xense_output_switch_put()
H A Dxonar_cs43xx.c294 static int rolloff_info(struct snd_kcontrol *ctl, rolloff_info() argument
304 static int rolloff_get(struct snd_kcontrol *ctl, rolloff_get() argument
307 struct oxygen *chip = ctl->private_data; rolloff_get()
315 static int rolloff_put(struct snd_kcontrol *ctl, rolloff_put() argument
318 struct oxygen *chip = ctl->private_data; rolloff_put()
/linux-4.1.27/fs/ncpfs/
H A Ddir.c425 struct ncp_cache_control ctl; ncp_readdir() local
429 ctl.page = NULL; ncp_readdir()
430 ctl.cache = NULL; ncp_readdir()
447 ctl.cache = cache = kmap(page); ncp_readdir()
448 ctl.head = cache->head; ncp_readdir()
450 if (!PageUptodate(page) || !ctl.head.eof) ncp_readdir()
454 if (jiffies - ctl.head.time >= NCP_MAX_AGE(server)) ncp_readdir()
459 if ((!mtime) || (mtime != ctl.head.mtime)) ncp_readdir()
463 if (ctx->pos > ctl.head.end) ncp_readdir()
466 ctl.fpos = ctx->pos + (NCP_DIRCACHE_START - 2); ncp_readdir()
467 ctl.ofs = ctl.fpos / NCP_DIRCACHE_SIZE; ncp_readdir()
468 ctl.idx = ctl.fpos % NCP_DIRCACHE_SIZE; ncp_readdir()
471 if (ctl.ofs != 0) { ncp_readdir()
472 ctl.page = find_lock_page(&inode->i_data, ctl.ofs); ncp_readdir()
473 if (!ctl.page) ncp_readdir()
475 ctl.cache = kmap(ctl.page); ncp_readdir()
476 if (!PageUptodate(ctl.page)) ncp_readdir()
479 while (ctl.idx < NCP_DIRCACHE_SIZE) { ncp_readdir()
488 dent = ctl.cache->dentry[ctl.idx]; ncp_readdir()
505 ctl.idx += 1; ncp_readdir()
506 if (ctx->pos > ctl.head.end) ncp_readdir()
509 if (ctl.page) { ncp_readdir()
510 kunmap(ctl.page); ncp_readdir()
511 SetPageUptodate(ctl.page); ncp_readdir()
512 unlock_page(ctl.page); ncp_readdir()
513 page_cache_release(ctl.page); ncp_readdir()
514 ctl.page = NULL; ncp_readdir()
516 ctl.idx = 0; ncp_readdir()
517 ctl.ofs += 1; ncp_readdir()
520 if (ctl.page) { ncp_readdir()
521 kunmap(ctl.page); ncp_readdir()
522 unlock_page(ctl.page); ncp_readdir()
523 page_cache_release(ctl.page); ncp_readdir()
524 ctl.page = NULL; ncp_readdir()
526 ctl.cache = cache; ncp_readdir()
533 ctl.head.mtime = mtime; ncp_readdir()
534 ctl.head.time = jiffies; ncp_readdir()
535 ctl.head.eof = 0; ncp_readdir()
536 ctl.fpos = 2; ncp_readdir()
537 ctl.ofs = 0; ncp_readdir()
538 ctl.idx = NCP_DIRCACHE_START; ncp_readdir()
539 ctl.filled = 0; ncp_readdir()
540 ctl.valid = 1; ncp_readdir()
546 ncp_read_volume_list(file, ctx, &ctl); ncp_readdir()
548 ncp_do_readdir(file, ctx, &ctl); ncp_readdir()
550 ctl.head.end = ctl.fpos - 1; ncp_readdir()
551 ctl.head.eof = ctl.valid; ncp_readdir()
553 if (ctl.page) { ncp_readdir()
554 kunmap(ctl.page); ncp_readdir()
555 SetPageUptodate(ctl.page); ncp_readdir()
556 unlock_page(ctl.page); ncp_readdir()
557 page_cache_release(ctl.page); ncp_readdir()
560 cache->head = ctl.head; ncp_readdir()
584 struct ncp_cache_control ctl = *ctrl; ncp_fill_cache() local
647 if (ctl.idx >= NCP_DIRCACHE_SIZE) { ncp_fill_cache()
648 if (ctl.page) { ncp_fill_cache()
649 kunmap(ctl.page); ncp_fill_cache()
650 SetPageUptodate(ctl.page); ncp_fill_cache()
651 unlock_page(ctl.page); ncp_fill_cache()
652 page_cache_release(ctl.page); ncp_fill_cache()
654 ctl.cache = NULL; ncp_fill_cache()
655 ctl.idx -= NCP_DIRCACHE_SIZE; ncp_fill_cache()
656 ctl.ofs += 1; ncp_fill_cache()
657 ctl.page = grab_cache_page(&dir->i_data, ctl.ofs); ncp_fill_cache()
658 if (ctl.page) ncp_fill_cache()
659 ctl.cache = kmap(ctl.page); ncp_fill_cache()
661 if (ctl.cache) { ncp_fill_cache()
664 ctl.cache->dentry[ctl.idx] = newdent; ncp_fill_cache()
673 ctl.valid = 0; ncp_fill_cache()
674 if (!ctl.filled && (ctl.fpos == ctx->pos)) { ncp_fill_cache()
677 ctl.filled = !dir_emit(ctx, qname.name, qname.len, ncp_fill_cache()
679 if (!ctl.filled) ncp_fill_cache()
682 ctl.fpos += 1; ncp_fill_cache()
683 ctl.idx += 1; ncp_fill_cache()
684 *ctrl = ctl; ncp_fill_cache()
685 return (ctl.valid || !ctl.filled); ncp_fill_cache()
690 struct ncp_cache_control *ctl) ncp_read_volume_list()
718 if (!ncp_fill_cache(file, ctx, ctl, &entry, inval_dentry)) ncp_read_volume_list()
725 struct ncp_cache_control *ctl) ncp_do_readdir()
777 if (!ncp_fill_cache(file, ctx, ctl, &entry, 0)) ncp_do_readdir()
689 ncp_read_volume_list(struct file *file, struct dir_context *ctx, struct ncp_cache_control *ctl) ncp_read_volume_list() argument
724 ncp_do_readdir(struct file *file, struct dir_context *ctx, struct ncp_cache_control *ctl) ncp_do_readdir() argument
/linux-4.1.27/sound/soc/kirkwood/
H A Dkirkwood-i2s.c225 static unsigned kirkwood_i2s_play_mute(unsigned ctl) kirkwood_i2s_play_mute() argument
227 if (!(ctl & KIRKWOOD_PLAYCTL_I2S_EN)) kirkwood_i2s_play_mute()
228 ctl |= KIRKWOOD_PLAYCTL_I2S_MUTE; kirkwood_i2s_play_mute()
229 if (!(ctl & KIRKWOOD_PLAYCTL_SPDIF_EN)) kirkwood_i2s_play_mute()
230 ctl |= KIRKWOOD_PLAYCTL_SPDIF_MUTE; kirkwood_i2s_play_mute()
231 return ctl; kirkwood_i2s_play_mute()
239 uint32_t ctl, value; kirkwood_i2s_play_trigger() local
241 ctl = readl(priv->io + KIRKWOOD_PLAYCTL); kirkwood_i2s_play_trigger()
242 if ((ctl & KIRKWOOD_PLAYCTL_ENABLE_MASK) == 0) { kirkwood_i2s_play_trigger()
250 value = ctl; kirkwood_i2s_play_trigger()
251 ctl = readl(priv->io + KIRKWOOD_PLAYCTL); kirkwood_i2s_play_trigger()
252 if (!((ctl | value) & KIRKWOOD_PLAYCTL_PLAY_BUSY)) kirkwood_i2s_play_trigger()
257 if ((ctl | value) & KIRKWOOD_PLAYCTL_PLAY_BUSY) kirkwood_i2s_play_trigger()
259 ctl); kirkwood_i2s_play_trigger()
265 ctl = priv->ctl_play; kirkwood_i2s_play_trigger()
267 ctl &= ~KIRKWOOD_PLAYCTL_SPDIF_EN; /* i2s */ kirkwood_i2s_play_trigger()
269 ctl &= ~KIRKWOOD_PLAYCTL_I2S_EN; /* spdif */ kirkwood_i2s_play_trigger()
270 ctl = kirkwood_i2s_play_mute(ctl); kirkwood_i2s_play_trigger()
271 value = ctl & ~KIRKWOOD_PLAYCTL_ENABLE_MASK; kirkwood_i2s_play_trigger()
282 writel(ctl, priv->io + KIRKWOOD_PLAYCTL); kirkwood_i2s_play_trigger()
287 ctl |= KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE | kirkwood_i2s_play_trigger()
289 writel(ctl, priv->io + KIRKWOOD_PLAYCTL); kirkwood_i2s_play_trigger()
296 ctl &= ~KIRKWOOD_PLAYCTL_ENABLE_MASK; kirkwood_i2s_play_trigger()
297 writel(ctl, priv->io + KIRKWOOD_PLAYCTL); kirkwood_i2s_play_trigger()
302 ctl |= KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE | kirkwood_i2s_play_trigger()
304 writel(ctl, priv->io + KIRKWOOD_PLAYCTL); kirkwood_i2s_play_trigger()
309 ctl &= ~(KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE | kirkwood_i2s_play_trigger()
311 ctl = kirkwood_i2s_play_mute(ctl); kirkwood_i2s_play_trigger()
312 writel(ctl, priv->io + KIRKWOOD_PLAYCTL); kirkwood_i2s_play_trigger()
326 uint32_t ctl, value; kirkwood_i2s_rec_trigger() local
333 ctl = priv->ctl_rec; kirkwood_i2s_rec_trigger()
335 ctl &= ~KIRKWOOD_RECCTL_SPDIF_EN; /* i2s */ kirkwood_i2s_rec_trigger()
337 ctl &= ~KIRKWOOD_RECCTL_I2S_EN; /* spdif */ kirkwood_i2s_rec_trigger()
339 value = ctl & ~KIRKWOOD_RECCTL_ENABLE_MASK; kirkwood_i2s_rec_trigger()
348 writel(ctl, priv->io + KIRKWOOD_RECCTL); kirkwood_i2s_rec_trigger()
/linux-4.1.27/drivers/net/wireless/ath/wcn36xx/
H A Ddxe.c66 struct wcn36xx_dxe_ctl *ctl = ch->head_blk_ctl, *next; wcn36xx_dxe_free_ctl_block() local
69 for (i = 0; i < ch->desc_num && ctl; i++) { wcn36xx_dxe_free_ctl_block()
70 next = ctl->next; wcn36xx_dxe_free_ctl_block()
71 kfree(ctl); wcn36xx_dxe_free_ctl_block()
72 ctl = next; wcn36xx_dxe_free_ctl_block()
273 static int wcn36xx_dxe_fill_skb(struct wcn36xx_dxe_ctl *ctl) wcn36xx_dxe_fill_skb() argument
275 struct wcn36xx_dxe_desc *dxe = ctl->desc; wcn36xx_dxe_fill_skb()
286 ctl->skb = skb; wcn36xx_dxe_fill_skb()
348 struct wcn36xx_dxe_ctl *ctl = ch->tail_blk_ctl; reap_tx_dxes() local
358 if (ctl->desc->ctrl & WCN36XX_DXE_CTRL_VALID_MASK) reap_tx_dxes()
360 if (ctl->skb) { reap_tx_dxes()
361 dma_unmap_single(NULL, ctl->desc->src_addr_l, reap_tx_dxes()
362 ctl->skb->len, DMA_TO_DEVICE); reap_tx_dxes()
363 info = IEEE80211_SKB_CB(ctl->skb); reap_tx_dxes()
366 ieee80211_free_txskb(wcn->hw, ctl->skb); reap_tx_dxes()
368 spin_lock_irqsave(&ctl->skb_lock, flags); reap_tx_dxes()
373 spin_unlock_irqrestore(&ctl->skb_lock, flags); reap_tx_dxes()
375 ctl->skb = NULL; reap_tx_dxes()
377 ctl = ctl->next; reap_tx_dxes()
378 } while (ctl != ch->head_blk_ctl && reap_tx_dxes()
379 !(ctl->desc->ctrl & WCN36XX_DXE_CTRL_VALID_MASK)); reap_tx_dxes()
381 ch->tail_blk_ctl = ctl; reap_tx_dxes()
469 struct wcn36xx_dxe_ctl *ctl = ch->head_blk_ctl; wcn36xx_rx_handle_packets() local
470 struct wcn36xx_dxe_desc *dxe = ctl->desc; wcn36xx_rx_handle_packets()
475 skb = ctl->skb; wcn36xx_rx_handle_packets()
477 wcn36xx_dxe_fill_skb(ctl); wcn36xx_rx_handle_packets()
497 ctl = ctl->next; wcn36xx_rx_handle_packets()
498 dxe = ctl->desc; wcn36xx_rx_handle_packets()
501 ch->head_blk_ctl = ctl; wcn36xx_rx_handle_packets()
595 struct wcn36xx_dxe_ctl *ctl = NULL; wcn36xx_dxe_tx_frame() local
602 ctl = ch->head_blk_ctl; wcn36xx_dxe_tx_frame()
604 spin_lock_irqsave(&ctl->next->skb_lock, flags); wcn36xx_dxe_tx_frame()
611 if (NULL != ctl->next->skb) { wcn36xx_dxe_tx_frame()
614 spin_unlock_irqrestore(&ctl->next->skb_lock, flags); wcn36xx_dxe_tx_frame()
617 spin_unlock_irqrestore(&ctl->next->skb_lock, flags); wcn36xx_dxe_tx_frame()
619 ctl->skb = NULL; wcn36xx_dxe_tx_frame()
620 desc = ctl->desc; wcn36xx_dxe_tx_frame()
623 desc->src_addr_l = ctl->bd_phy_addr; wcn36xx_dxe_tx_frame()
634 "BD >>> ", (char *)ctl->bd_cpu_addr, wcn36xx_dxe_tx_frame()
638 ctl = ctl->next; wcn36xx_dxe_tx_frame()
639 ctl->skb = skb; wcn36xx_dxe_tx_frame()
640 desc = ctl->desc; wcn36xx_dxe_tx_frame()
641 if (ctl->bd_cpu_addr) { wcn36xx_dxe_tx_frame()
647 ctl->skb->data, wcn36xx_dxe_tx_frame()
648 ctl->skb->len, wcn36xx_dxe_tx_frame()
652 desc->fr_len = ctl->skb->len; wcn36xx_dxe_tx_frame()
660 (char *)ctl->skb->data, ctl->skb->len); wcn36xx_dxe_tx_frame()
663 ch->head_blk_ctl = ctl->next; wcn36xx_dxe_tx_frame()
/linux-4.1.27/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_sgmac.c42 static bool xgene_enet_wr_indirect(struct xgene_indirect_ctl *ctl, xgene_enet_wr_indirect() argument
47 iowrite32(wr_addr, ctl->addr); xgene_enet_wr_indirect()
48 iowrite32(wr_data, ctl->ctl); xgene_enet_wr_indirect()
49 iowrite32(XGENE_ENET_WR_CMD, ctl->cmd); xgene_enet_wr_indirect()
53 if (ioread32(ctl->cmd_done)) { xgene_enet_wr_indirect()
54 iowrite32(0, ctl->cmd); xgene_enet_wr_indirect()
66 struct xgene_indirect_ctl ctl = { xgene_enet_wr_mac() local
68 .ctl = p->mcx_mac_addr + MAC_WRITE_REG_OFFSET, xgene_enet_wr_mac()
73 if (!xgene_enet_wr_indirect(&ctl, wr_addr, wr_data)) xgene_enet_wr_mac()
87 static u32 xgene_enet_rd_indirect(struct xgene_indirect_ctl *ctl, u32 rd_addr) xgene_enet_rd_indirect() argument
92 iowrite32(rd_addr, ctl->addr); xgene_enet_rd_indirect()
93 iowrite32(XGENE_ENET_RD_CMD, ctl->cmd); xgene_enet_rd_indirect()
97 if (ioread32(ctl->cmd_done)) { xgene_enet_rd_indirect()
98 rd_data = ioread32(ctl->ctl); xgene_enet_rd_indirect()
99 iowrite32(0, ctl->cmd); xgene_enet_rd_indirect()
113 struct xgene_indirect_ctl ctl = { xgene_enet_rd_mac() local
115 .ctl = p->mcx_mac_addr + MAC_READ_REG_OFFSET, xgene_enet_rd_mac()
120 return xgene_enet_rd_indirect(&ctl, rd_addr); xgene_enet_rd_mac()
/linux-4.1.27/Documentation/connector/
H A Dcn_test.c54 struct cn_ctl_msg *ctl;
62 size0 = sizeof(*msg) + sizeof(*ctl) + 3 * sizeof(*req);
88 ctl = (struct cn_ctl_msg *)(msg + 1);
90 ctl->idx_notify_num = 1;
91 ctl->val_notify_num = 2;
92 ctl->group = group;
93 ctl->len = msg->len - sizeof(*ctl);
95 req = (struct cn_notify_req *)(ctl + 1);
117 NETLINK_CB(skb).dst_group = ctl->group;
118 //netlink_broadcast(nls, skb, 0, ctl->group, GFP_ATOMIC);
121 pr_info("request was sent: group=0x%x\n", ctl->group);
/linux-4.1.27/drivers/net/phy/
H A Det1011c.c54 int ctl = 0; et1011c_config_aneg() local
55 ctl = phy_read(phydev, MII_BMCR); et1011c_config_aneg()
56 if (ctl < 0) et1011c_config_aneg()
57 return ctl; et1011c_config_aneg()
58 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | et1011c_config_aneg()
61 phy_write(phydev, MII_BMCR, ctl | BMCR_RESET); et1011c_config_aneg()
H A Dphy_device.c821 int ctl = 0; genphy_setup_forced() local
827 ctl |= BMCR_SPEED1000; genphy_setup_forced()
829 ctl |= BMCR_SPEED100; genphy_setup_forced()
832 ctl |= BMCR_FULLDPLX; genphy_setup_forced()
834 return phy_write(phydev, MII_BMCR, ctl); genphy_setup_forced()
844 int ctl = phy_read(phydev, MII_BMCR); genphy_restart_aneg() local
846 if (ctl < 0) genphy_restart_aneg()
847 return ctl; genphy_restart_aneg()
849 ctl |= BMCR_ANENABLE | BMCR_ANRESTART; genphy_restart_aneg()
852 ctl &= ~BMCR_ISOLATE; genphy_restart_aneg()
854 return phy_write(phydev, MII_BMCR, ctl); genphy_restart_aneg()
880 int ctl = phy_read(phydev, MII_BMCR); genphy_config_aneg() local
882 if (ctl < 0) genphy_config_aneg()
883 return ctl; genphy_config_aneg()
885 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) genphy_config_aneg()
/linux-4.1.27/sound/soc/samsung/
H A Dpcm.c157 u32 ctl, clkctl; s3c_pcm_snd_txctrl() local
160 ctl = readl(regs + S3C_PCM_CTL); s3c_pcm_snd_txctrl()
161 ctl &= ~(S3C_PCM_CTL_TXDIPSTICK_MASK s3c_pcm_snd_txctrl()
165 ctl |= S3C_PCM_CTL_TXDMA_EN; s3c_pcm_snd_txctrl()
166 ctl |= S3C_PCM_CTL_TXFIFO_EN; s3c_pcm_snd_txctrl()
167 ctl |= S3C_PCM_CTL_ENABLE; s3c_pcm_snd_txctrl()
168 ctl |= (0x4<<S3C_PCM_CTL_TXDIPSTICK_SHIFT); s3c_pcm_snd_txctrl()
171 ctl &= ~S3C_PCM_CTL_TXDMA_EN; s3c_pcm_snd_txctrl()
172 ctl &= ~S3C_PCM_CTL_TXFIFO_EN; s3c_pcm_snd_txctrl()
174 if (!(ctl & S3C_PCM_CTL_RXFIFO_EN)) { s3c_pcm_snd_txctrl()
175 ctl &= ~S3C_PCM_CTL_ENABLE; s3c_pcm_snd_txctrl()
182 writel(ctl, regs + S3C_PCM_CTL); s3c_pcm_snd_txctrl()
188 u32 ctl, clkctl; s3c_pcm_snd_rxctrl() local
190 ctl = readl(regs + S3C_PCM_CTL); s3c_pcm_snd_rxctrl()
192 ctl &= ~(S3C_PCM_CTL_RXDIPSTICK_MASK s3c_pcm_snd_rxctrl()
196 ctl |= S3C_PCM_CTL_RXDMA_EN; s3c_pcm_snd_rxctrl()
197 ctl |= S3C_PCM_CTL_RXFIFO_EN; s3c_pcm_snd_rxctrl()
198 ctl |= S3C_PCM_CTL_ENABLE; s3c_pcm_snd_rxctrl()
199 ctl |= (0x20<<S3C_PCM_CTL_RXDIPSTICK_SHIFT); s3c_pcm_snd_rxctrl()
202 ctl &= ~S3C_PCM_CTL_RXDMA_EN; s3c_pcm_snd_rxctrl()
203 ctl &= ~S3C_PCM_CTL_RXFIFO_EN; s3c_pcm_snd_rxctrl()
205 if (!(ctl & S3C_PCM_CTL_TXFIFO_EN)) { s3c_pcm_snd_rxctrl()
206 ctl &= ~S3C_PCM_CTL_ENABLE; s3c_pcm_snd_rxctrl()
213 writel(ctl, regs + S3C_PCM_CTL); s3c_pcm_snd_rxctrl()
325 u32 ctl; s3c_pcm_set_fmt() local
331 ctl = readl(regs + S3C_PCM_CTL); s3c_pcm_set_fmt()
368 ctl |= S3C_PCM_CTL_TXMSB_AFTER_FSYNC; s3c_pcm_set_fmt()
369 ctl |= S3C_PCM_CTL_RXMSB_AFTER_FSYNC; s3c_pcm_set_fmt()
372 ctl &= ~S3C_PCM_CTL_TXMSB_AFTER_FSYNC; s3c_pcm_set_fmt()
373 ctl &= ~S3C_PCM_CTL_RXMSB_AFTER_FSYNC; s3c_pcm_set_fmt()
381 writel(ctl, regs + S3C_PCM_CTL); s3c_pcm_set_fmt()
/linux-4.1.27/drivers/net/wireless/b43/
H A Dpio.c331 u16 ctl, tx_write_2byte_queue()
339 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI; tx_write_2byte_queue()
340 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); tx_write_2byte_queue()
350 ctl &= ~B43_PIO_TXCTL_WRITEHI; tx_write_2byte_queue()
351 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); tx_write_2byte_queue()
359 return ctl; tx_write_2byte_queue()
368 u16 ctl; pio_tx_frame_2byte_queue() local
370 ctl = b43_piotx_read16(q, B43_PIO_TXCTL); pio_tx_frame_2byte_queue()
371 ctl |= B43_PIO_TXCTL_FREADY; pio_tx_frame_2byte_queue()
372 ctl &= ~B43_PIO_TXCTL_EOF; pio_tx_frame_2byte_queue()
375 ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen); pio_tx_frame_2byte_queue()
377 ctl = tx_write_2byte_queue(q, ctl, frame, frame_len); pio_tx_frame_2byte_queue()
379 ctl |= B43_PIO_TXCTL_EOF; pio_tx_frame_2byte_queue()
380 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); pio_tx_frame_2byte_queue()
384 u32 ctl, tx_write_4byte_queue()
392 ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 | tx_write_4byte_queue()
394 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); tx_write_4byte_queue()
405 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 | tx_write_4byte_queue()
409 ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15; tx_write_4byte_queue()
415 ctl |= B43_PIO8_TXCTL_8_15; tx_write_4byte_queue()
423 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); tx_write_4byte_queue()
429 return ctl; tx_write_4byte_queue()
438 u32 ctl; pio_tx_frame_4byte_queue() local
440 ctl = b43_piotx_read32(q, B43_PIO8_TXCTL); pio_tx_frame_4byte_queue()
441 ctl |= B43_PIO8_TXCTL_FREADY; pio_tx_frame_4byte_queue()
442 ctl &= ~B43_PIO8_TXCTL_EOF; pio_tx_frame_4byte_queue()
445 ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen); pio_tx_frame_4byte_queue()
447 ctl = tx_write_4byte_queue(q, ctl, frame, frame_len); pio_tx_frame_4byte_queue()
449 ctl |= B43_PIO8_TXCTL_EOF; pio_tx_frame_4byte_queue()
450 b43_piotx_write32(q, B43_PIO_TXCTL, ctl); pio_tx_frame_4byte_queue()
636 u32 ctl; pio_rx_frame() local
638 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL); pio_rx_frame()
639 if (!(ctl & B43_PIO8_RXCTL_FRAMERDY)) pio_rx_frame()
644 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL); pio_rx_frame()
645 if (ctl & B43_PIO8_RXCTL_DATARDY) pio_rx_frame()
650 u16 ctl; pio_rx_frame() local
652 ctl = b43_piorx_read16(q, B43_PIO_RXCTL); pio_rx_frame()
653 if (!(ctl & B43_PIO_RXCTL_FRAMERDY)) pio_rx_frame()
658 ctl = b43_piorx_read16(q, B43_PIO_RXCTL); pio_rx_frame()
659 if (ctl & B43_PIO_RXCTL_DATARDY) pio_rx_frame()
330 tx_write_2byte_queue(struct b43_pio_txqueue *q, u16 ctl, const void *_data, unsigned int data_len) tx_write_2byte_queue() argument
383 tx_write_4byte_queue(struct b43_pio_txqueue *q, u32 ctl, const void *_data, unsigned int data_len) tx_write_4byte_queue() argument
H A Dleds.c37 u16 ctl; b43_led_turn_on() local
39 ctl = b43_read16(dev, B43_MMIO_GPIO_CONTROL); b43_led_turn_on()
41 ctl &= ~(1 << led_index); b43_led_turn_on()
43 ctl |= (1 << led_index); b43_led_turn_on()
44 b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl); b43_led_turn_on()
50 u16 ctl; b43_led_turn_off() local
52 ctl = b43_read16(dev, B43_MMIO_GPIO_CONTROL); b43_led_turn_off()
54 ctl |= (1 << led_index); b43_led_turn_off()
56 ctl &= ~(1 << led_index); b43_led_turn_off()
57 b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl); b43_led_turn_off()
H A Ddma.c105 u32 ctl; op32_fill_descriptor() local
115 ctl = bufsize & B43_DMA32_DCTL_BYTECNT; op32_fill_descriptor()
117 ctl |= B43_DMA32_DCTL_DTABLEEND; op32_fill_descriptor()
119 ctl |= B43_DMA32_DCTL_FRAMESTART; op32_fill_descriptor()
121 ctl |= B43_DMA32_DCTL_FRAMEEND; op32_fill_descriptor()
123 ctl |= B43_DMA32_DCTL_IRQ; op32_fill_descriptor()
124 ctl |= (addrext << B43_DMA32_DCTL_ADDREXT_SHIFT) op32_fill_descriptor()
127 desc->dma32.control = cpu_to_le32(ctl); op32_fill_descriptor()
1802 u32 ctl; direct_fifo_rx() local
1805 ctl = b43_read32(dev, mmio_base + B43_DMA64_RXCTL); direct_fifo_rx()
1806 ctl &= ~B43_DMA64_RXDIRECTFIFO; direct_fifo_rx()
1808 ctl |= B43_DMA64_RXDIRECTFIFO; direct_fifo_rx()
1809 b43_write32(dev, mmio_base + B43_DMA64_RXCTL, ctl); direct_fifo_rx()
1811 ctl = b43_read32(dev, mmio_base + B43_DMA32_RXCTL); direct_fifo_rx()
1812 ctl &= ~B43_DMA32_RXDIRECTFIFO; direct_fifo_rx()
1814 ctl |= B43_DMA32_RXDIRECTFIFO; direct_fifo_rx()
1815 b43_write32(dev, mmio_base + B43_DMA32_RXCTL, ctl); direct_fifo_rx()
H A Dlo.h27 struct b43_loctl ctl; member in struct:b43_lo_calib
H A Dmain.c1619 u16 ctl; b43_write_beacon_template() local
1648 ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL); b43_write_beacon_template()
1650 ctl &= ~B43_TXH_PHY_SHORTPRMBL; b43_write_beacon_template()
1651 ctl &= ~B43_TXH_PHY_ANT; b43_write_beacon_template()
1652 ctl &= ~B43_TXH_PHY_ENC; b43_write_beacon_template()
1653 ctl |= antenna; b43_write_beacon_template()
1655 ctl |= B43_TXH_PHY_ENC_CCK; b43_write_beacon_template()
1657 ctl |= B43_TXH_PHY_ENC_OFDM; b43_write_beacon_template()
1658 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl); b43_write_beacon_template()
3109 u32 ctl; b43_adjust_opmode() local
3112 ctl = b43_read32(dev, B43_MMIO_MACCTL); b43_adjust_opmode()
3114 ctl &= ~B43_MACCTL_AP; b43_adjust_opmode()
3115 ctl &= ~B43_MACCTL_KEEP_CTL; b43_adjust_opmode()
3116 ctl &= ~B43_MACCTL_KEEP_BADPLCP; b43_adjust_opmode()
3117 ctl &= ~B43_MACCTL_KEEP_BAD; b43_adjust_opmode()
3118 ctl &= ~B43_MACCTL_PROMISC; b43_adjust_opmode()
3119 ctl &= ~B43_MACCTL_BEACPROMISC; b43_adjust_opmode()
3120 ctl |= B43_MACCTL_INFRA; b43_adjust_opmode()
3124 ctl |= B43_MACCTL_AP; b43_adjust_opmode()
3126 ctl &= ~B43_MACCTL_INFRA; b43_adjust_opmode()
3129 ctl |= B43_MACCTL_KEEP_CTL; b43_adjust_opmode()
3131 ctl |= B43_MACCTL_KEEP_BAD; b43_adjust_opmode()
3133 ctl |= B43_MACCTL_KEEP_BADPLCP; b43_adjust_opmode()
3135 ctl |= B43_MACCTL_PROMISC; b43_adjust_opmode()
3137 ctl |= B43_MACCTL_BEACPROMISC; b43_adjust_opmode()
3143 ctl |= B43_MACCTL_PROMISC; b43_adjust_opmode()
3145 b43_write32(dev, B43_MMIO_MACCTL, ctl); b43_adjust_opmode()
3148 if ((ctl & B43_MACCTL_INFRA) && !(ctl & B43_MACCTL_AP)) { b43_adjust_opmode()
3161 if (0 /* ctl & B43_MACCTL_AP */) b43_adjust_opmode()
3216 u16 ctl = 0; b43_set_phytxctl_defaults() local
3218 ctl |= B43_TXH_PHY_ENC_CCK; b43_set_phytxctl_defaults()
3219 ctl |= B43_TXH_PHY_ANT01AUTO; b43_set_phytxctl_defaults()
3220 ctl |= B43_TXH_PHY_TXPWR; b43_set_phytxctl_defaults()
3222 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl); b43_set_phytxctl_defaults()
3223 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL, ctl); b43_set_phytxctl_defaults()
3224 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL, ctl); b43_set_phytxctl_defaults()
/linux-4.1.27/sound/pci/emu10k1/
H A Demufx.c334 struct snd_emu10k1_fx8010_ctl *ctl = snd_emu10k1_gpr_ctl_info() local
337 if (ctl->min == 0 && ctl->max == 1) snd_emu10k1_gpr_ctl_info()
341 uinfo->count = ctl->vcount; snd_emu10k1_gpr_ctl_info()
342 uinfo->value.integer.min = ctl->min; snd_emu10k1_gpr_ctl_info()
343 uinfo->value.integer.max = ctl->max; snd_emu10k1_gpr_ctl_info()
350 struct snd_emu10k1_fx8010_ctl *ctl = snd_emu10k1_gpr_ctl_get() local
356 for (i = 0; i < ctl->vcount; i++) snd_emu10k1_gpr_ctl_get()
357 ucontrol->value.integer.value[i] = ctl->value[i]; snd_emu10k1_gpr_ctl_get()
365 struct snd_emu10k1_fx8010_ctl *ctl = snd_emu10k1_gpr_ctl_put() local
373 for (i = 0; i < ctl->vcount; i++) { snd_emu10k1_gpr_ctl_put()
375 if (nval < ctl->min) snd_emu10k1_gpr_ctl_put()
376 nval = ctl->min; snd_emu10k1_gpr_ctl_put()
377 if (nval > ctl->max) snd_emu10k1_gpr_ctl_put()
378 nval = ctl->max; snd_emu10k1_gpr_ctl_put()
379 if (nval != ctl->value[i]) snd_emu10k1_gpr_ctl_put()
381 val = ctl->value[i] = nval; snd_emu10k1_gpr_ctl_put()
382 switch (ctl->translation) { snd_emu10k1_gpr_ctl_put()
384 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val); snd_emu10k1_gpr_ctl_put()
387 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]); snd_emu10k1_gpr_ctl_put()
390 if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) { snd_emu10k1_gpr_ctl_put()
395 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]); snd_emu10k1_gpr_ctl_put()
398 if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) { snd_emu10k1_gpr_ctl_put()
403 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]); snd_emu10k1_gpr_ctl_put()
406 snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]); snd_emu10k1_gpr_ctl_put()
653 struct snd_emu10k1_fx8010_ctl *ctl; snd_emu10k1_look_for_ctl() local
656 list_for_each_entry(ctl, &emu->fx8010.gpr_ctl, list) { snd_emu10k1_look_for_ctl()
657 kcontrol = ctl->kcontrol; snd_emu10k1_look_for_ctl()
661 return ctl; snd_emu10k1_look_for_ctl()
774 struct snd_emu10k1_fx8010_ctl *ctl; snd_emu10k1_ctl_private_free() local
776 ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value; snd_emu10k1_ctl_private_free()
778 list_del(&ctl->list); snd_emu10k1_ctl_private_free()
779 kfree(ctl); snd_emu10k1_ctl_private_free()
788 struct snd_emu10k1_fx8010_ctl *ctl, *nctl; snd_emu10k1_add_controls() local
816 ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id); snd_emu10k1_add_controls()
841 if (ctl == NULL) { snd_emu10k1_add_controls()
842 ctl = kmalloc(sizeof(*ctl), GFP_KERNEL); snd_emu10k1_add_controls()
843 if (ctl == NULL) { snd_emu10k1_add_controls()
848 knew.private_value = (unsigned long)ctl; snd_emu10k1_add_controls()
849 *ctl = *nctl; snd_emu10k1_add_controls()
851 kfree(ctl); snd_emu10k1_add_controls()
856 ctl->kcontrol = kctl; snd_emu10k1_add_controls()
857 list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl); snd_emu10k1_add_controls()
860 nctl->list = ctl->list; snd_emu10k1_add_controls()
861 nctl->kcontrol = ctl->kcontrol; snd_emu10k1_add_controls()
862 *ctl = *nctl; snd_emu10k1_add_controls()
864 SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id); snd_emu10k1_add_controls()
866 snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val); snd_emu10k1_add_controls()
881 struct snd_emu10k1_fx8010_ctl *ctl; snd_emu10k1_del_controls() local
889 ctl = snd_emu10k1_look_for_ctl(emu, &id); snd_emu10k1_del_controls()
890 if (ctl) snd_emu10k1_del_controls()
891 snd_ctl_remove(card, ctl->kcontrol); snd_emu10k1_del_controls()
903 struct snd_emu10k1_fx8010_ctl *ctl; snd_emu10k1_list_controls() local
910 list_for_each_entry(ctl, &emu->fx8010.gpr_ctl, list) { snd_emu10k1_list_controls()
915 id = &ctl->kcontrol->id; snd_emu10k1_list_controls()
921 gctl->vcount = ctl->vcount; snd_emu10k1_list_controls()
922 gctl->count = ctl->count; snd_emu10k1_list_controls()
924 gctl->gpr[j] = ctl->gpr[j]; snd_emu10k1_list_controls()
925 gctl->value[j] = ctl->value[j]; snd_emu10k1_list_controls()
927 gctl->min = ctl->min; snd_emu10k1_list_controls()
928 gctl->max = ctl->max; snd_emu10k1_list_controls()
929 gctl->translation = ctl->translation; snd_emu10k1_list_controls()
1076 snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl, snd_emu10k1_init_mono_control() argument
1079 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; snd_emu10k1_init_mono_control()
1080 strcpy(ctl->id.name, name); snd_emu10k1_init_mono_control()
1081 ctl->vcount = ctl->count = 1; snd_emu10k1_init_mono_control()
1082 ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; snd_emu10k1_init_mono_control()
1084 ctl->min = 0; snd_emu10k1_init_mono_control()
1085 ctl->max = 0x7fffffff; snd_emu10k1_init_mono_control()
1086 ctl->tlv = snd_emu10k1_db_linear; snd_emu10k1_init_mono_control()
1087 ctl->translation = EMU10K1_GPR_TRANSLATION_NONE; snd_emu10k1_init_mono_control()
1089 ctl->min = 0; snd_emu10k1_init_mono_control()
1090 ctl->max = 100; snd_emu10k1_init_mono_control()
1091 ctl->tlv = snd_emu10k1_db_scale1; snd_emu10k1_init_mono_control()
1092 ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100; snd_emu10k1_init_mono_control()
1097 snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl, snd_emu10k1_init_stereo_control() argument
1100 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; snd_emu10k1_init_stereo_control()
1101 strcpy(ctl->id.name, name); snd_emu10k1_init_stereo_control()
1102 ctl->vcount = ctl->count = 2; snd_emu10k1_init_stereo_control()
1103 ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; snd_emu10k1_init_stereo_control()
1104 ctl->gpr[1] = gpr + 1; ctl->value[1] = defval; snd_emu10k1_init_stereo_control()
1106 ctl->min = 0; snd_emu10k1_init_stereo_control()
1107 ctl->max = 0x7fffffff; snd_emu10k1_init_stereo_control()
1108 ctl->tlv = snd_emu10k1_db_linear; snd_emu10k1_init_stereo_control()
1109 ctl->translation = EMU10K1_GPR_TRANSLATION_NONE; snd_emu10k1_init_stereo_control()
1111 ctl->min = 0; snd_emu10k1_init_stereo_control()
1112 ctl->max = 100; snd_emu10k1_init_stereo_control()
1113 ctl->tlv = snd_emu10k1_db_scale1; snd_emu10k1_init_stereo_control()
1114 ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100; snd_emu10k1_init_stereo_control()
1119 snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl, snd_emu10k1_init_mono_onoff_control() argument
1122 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; snd_emu10k1_init_mono_onoff_control()
1123 strcpy(ctl->id.name, name); snd_emu10k1_init_mono_onoff_control()
1124 ctl->vcount = ctl->count = 1; snd_emu10k1_init_mono_onoff_control()
1125 ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; snd_emu10k1_init_mono_onoff_control()
1126 ctl->min = 0; snd_emu10k1_init_mono_onoff_control()
1127 ctl->max = 1; snd_emu10k1_init_mono_onoff_control()
1128 ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF; snd_emu10k1_init_mono_onoff_control()
1132 snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl, snd_emu10k1_init_stereo_onoff_control() argument
1135 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; snd_emu10k1_init_stereo_onoff_control()
1136 strcpy(ctl->id.name, name); snd_emu10k1_init_stereo_onoff_control()
1137 ctl->vcount = ctl->count = 2; snd_emu10k1_init_stereo_onoff_control()
1138 ctl->gpr[0] = gpr + 0; ctl->value[0] = defval; snd_emu10k1_init_stereo_onoff_control()
1139 ctl->gpr[1] = gpr + 1; ctl->value[1] = defval; snd_emu10k1_init_stereo_onoff_control()
1140 ctl->min = 0; snd_emu10k1_init_stereo_onoff_control()
1141 ctl->max = 1; snd_emu10k1_init_stereo_onoff_control()
1142 ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF; snd_emu10k1_init_stereo_onoff_control()
1180 struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl; _snd_emu10k1_audigy_init_efx() local
1452 ctl = &controls[nctl + 0]; _snd_emu10k1_audigy_init_efx()
1453 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; _snd_emu10k1_audigy_init_efx()
1454 strcpy(ctl->id.name, "Tone Control - Bass"); _snd_emu10k1_audigy_init_efx()
1455 ctl->vcount = 2; _snd_emu10k1_audigy_init_efx()
1456 ctl->count = 10; _snd_emu10k1_audigy_init_efx()
1457 ctl->min = 0; _snd_emu10k1_audigy_init_efx()
1458 ctl->max = 40; _snd_emu10k1_audigy_init_efx()
1459 ctl->value[0] = ctl->value[1] = 20; _snd_emu10k1_audigy_init_efx()
1460 ctl->translation = EMU10K1_GPR_TRANSLATION_BASS; _snd_emu10k1_audigy_init_efx()
1461 ctl = &controls[nctl + 1]; _snd_emu10k1_audigy_init_efx()
1462 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; _snd_emu10k1_audigy_init_efx()
1463 strcpy(ctl->id.name, "Tone Control - Treble"); _snd_emu10k1_audigy_init_efx()
1464 ctl->vcount = 2; _snd_emu10k1_audigy_init_efx()
1465 ctl->count = 10; _snd_emu10k1_audigy_init_efx()
1466 ctl->min = 0; _snd_emu10k1_audigy_init_efx()
1467 ctl->max = 40; _snd_emu10k1_audigy_init_efx()
1468 ctl->value[0] = ctl->value[1] = 20; _snd_emu10k1_audigy_init_efx()
1469 ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE; _snd_emu10k1_audigy_init_efx()
1818 struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl; _snd_emu10k1_init_efx() local
2175 ctl = &controls[i + 0]; _snd_emu10k1_init_efx()
2176 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; _snd_emu10k1_init_efx()
2177 strcpy(ctl->id.name, "Tone Control - Bass"); _snd_emu10k1_init_efx()
2178 ctl->vcount = 2; _snd_emu10k1_init_efx()
2179 ctl->count = 10; _snd_emu10k1_init_efx()
2180 ctl->min = 0; _snd_emu10k1_init_efx()
2181 ctl->max = 40; _snd_emu10k1_init_efx()
2182 ctl->value[0] = ctl->value[1] = 20; _snd_emu10k1_init_efx()
2183 ctl->tlv = snd_emu10k1_bass_treble_db_scale; _snd_emu10k1_init_efx()
2184 ctl->translation = EMU10K1_GPR_TRANSLATION_BASS; _snd_emu10k1_init_efx()
2185 ctl = &controls[i + 1]; _snd_emu10k1_init_efx()
2186 ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; _snd_emu10k1_init_efx()
2187 strcpy(ctl->id.name, "Tone Control - Treble"); _snd_emu10k1_init_efx()
2188 ctl->vcount = 2; _snd_emu10k1_init_efx()
2189 ctl->count = 10; _snd_emu10k1_init_efx()
2190 ctl->min = 0; _snd_emu10k1_init_efx()
2191 ctl->max = 40; _snd_emu10k1_init_efx()
2192 ctl->value[0] = ctl->value[1] = 20; _snd_emu10k1_init_efx()
2193 ctl->tlv = snd_emu10k1_bass_treble_db_scale; _snd_emu10k1_init_efx()
2194 ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE; _snd_emu10k1_init_efx()
/linux-4.1.27/sound/soc/codecs/
H A Dwm_adsp.c368 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; wm_coeff_info() local
371 uinfo->count = ctl->len; wm_coeff_info()
378 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; wm_coeff_write_control() local
379 struct wm_adsp_alg_region *region = &ctl->region; wm_coeff_write_control()
381 struct wm_adsp *adsp = ctl->adsp; wm_coeff_write_control()
393 reg = ctl->region.base; wm_coeff_write_control()
396 scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); wm_coeff_write_control()
401 ctl->len); wm_coeff_write_control()
404 ctl->len, reg, ret); wm_coeff_write_control()
408 adsp_dbg(adsp, "Wrote %zu bytes to %x\n", ctl->len, reg); wm_coeff_write_control()
418 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; wm_coeff_put() local
421 memcpy(ctl->cache, p, ctl->len); wm_coeff_put()
423 ctl->set = 1; wm_coeff_put()
424 if (!ctl->enabled) wm_coeff_put()
427 return wm_coeff_write_control(kcontrol, p, ctl->len); wm_coeff_put()
433 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; wm_coeff_read_control() local
434 struct wm_adsp_alg_region *region = &ctl->region; wm_coeff_read_control()
436 struct wm_adsp *adsp = ctl->adsp; wm_coeff_read_control()
448 reg = ctl->region.base; wm_coeff_read_control()
451 scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); wm_coeff_read_control()
455 ret = regmap_raw_read(adsp->regmap, reg, scratch, ctl->len); wm_coeff_read_control()
458 ctl->len, reg, ret); wm_coeff_read_control()
462 adsp_dbg(adsp, "Read %zu bytes from %x\n", ctl->len, reg); wm_coeff_read_control()
464 memcpy(buf, scratch, ctl->len); wm_coeff_read_control()
473 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value; wm_coeff_get() local
476 memcpy(p, ctl->cache, ctl->len); wm_coeff_get()
482 struct wm_coeff_ctl *ctl; member in struct:wmfw_ctl_work
486 static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl) wmfw_add_ctl() argument
491 if (!ctl || !ctl->name) wmfw_add_ctl()
499 kcontrol->name = ctl->name; wmfw_add_ctl()
503 kcontrol->private_value = (unsigned long)ctl; wmfw_add_ctl()
512 ctl->kcontrol = snd_soc_card_get_kcontrol(adsp->card, wmfw_add_ctl()
513 ctl->name); wmfw_add_ctl()
515 list_add(&ctl->list, &adsp->ctl_list); wmfw_add_ctl()
735 struct wm_coeff_ctl *ctl; wm_coeff_init_control_caches() local
738 list_for_each_entry(ctl, &adsp->ctl_list, list) { wm_coeff_init_control_caches()
739 if (!ctl->enabled || ctl->set) wm_coeff_init_control_caches()
741 ret = wm_coeff_read_control(ctl->kcontrol, wm_coeff_init_control_caches()
742 ctl->cache, wm_coeff_init_control_caches()
743 ctl->len); wm_coeff_init_control_caches()
753 struct wm_coeff_ctl *ctl; wm_coeff_sync_controls() local
756 list_for_each_entry(ctl, &adsp->ctl_list, list) { wm_coeff_sync_controls()
757 if (!ctl->enabled) wm_coeff_sync_controls()
759 if (ctl->set) { wm_coeff_sync_controls()
760 ret = wm_coeff_write_control(ctl->kcontrol, wm_coeff_sync_controls()
761 ctl->cache, wm_coeff_sync_controls()
762 ctl->len); wm_coeff_sync_controls()
777 wmfw_add_ctl(ctl_work->adsp, ctl_work->ctl); wm_adsp_ctl_work()
785 struct wm_coeff_ctl *ctl; wm_adsp_create_control() local
819 list_for_each_entry(ctl, &dsp->ctl_list, wm_adsp_create_control()
821 if (!strcmp(ctl->name, name)) { wm_adsp_create_control()
822 if (!ctl->enabled) wm_adsp_create_control()
823 ctl->enabled = 1; wm_adsp_create_control()
828 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); wm_adsp_create_control()
829 if (!ctl) { wm_adsp_create_control()
833 ctl->region = *region; wm_adsp_create_control()
834 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL); wm_adsp_create_control()
835 if (!ctl->name) { wm_adsp_create_control()
839 ctl->enabled = 1; wm_adsp_create_control()
840 ctl->set = 0; wm_adsp_create_control()
841 ctl->ops.xget = wm_coeff_get; wm_adsp_create_control()
842 ctl->ops.xput = wm_coeff_put; wm_adsp_create_control()
843 ctl->adsp = dsp; wm_adsp_create_control()
845 ctl->len = region->len; wm_adsp_create_control()
846 ctl->cache = kzalloc(ctl->len, GFP_KERNEL); wm_adsp_create_control()
847 if (!ctl->cache) { wm_adsp_create_control()
859 ctl_work->ctl = ctl; wm_adsp_create_control()
869 kfree(ctl->cache); wm_adsp_create_control()
871 kfree(ctl->name); wm_adsp_create_control()
873 kfree(ctl); wm_adsp_create_control()
1373 struct wm_coeff_ctl *ctl; wm_adsp1_event() local
1448 list_for_each_entry(ctl, &dsp->ctl_list, list) wm_adsp1_event()
1449 ctl->enabled = 0; wm_adsp1_event()
1626 struct wm_coeff_ctl *ctl; wm_adsp2_event() local
1671 list_for_each_entry(ctl, &dsp->ctl_list, list) wm_adsp2_event()
1672 ctl->enabled = 0; wm_adsp2_event()
H A Dcs42l56.h100 /* Class H and misc ctl masks */
116 /* Playback Capture ctl masks */
/linux-4.1.27/arch/x86/kernel/
H A Dvsmp_64.c93 unsigned int cap, ctl, cfg; set_vsmp_pv_ops() local
99 ctl = readl(address + 4); set_vsmp_pv_ops()
101 cap, ctl); set_vsmp_pv_ops()
105 if (cap & ctl & BIT(8)) { set_vsmp_pv_ops()
106 ctl &= ~BIT(8); set_vsmp_pv_ops()
118 if (cap & ctl & (1 << 4)) { set_vsmp_pv_ops()
125 ctl &= ~(1 << 4); set_vsmp_pv_ops()
127 writel(ctl, address + 4); set_vsmp_pv_ops()
128 ctl = readl(address + 4); set_vsmp_pv_ops()
129 pr_info("vSMP CTL: control set to:0x%08x\n", ctl); set_vsmp_pv_ops()
H A Daperture_64.c260 u32 ctl; early_gart_iommu_check() local
284 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); early_gart_iommu_check()
285 aper_enabled = ctl & GARTEN; early_gart_iommu_check()
286 aper_order = (ctl >> 1) & 7; early_gart_iommu_check()
340 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); early_gart_iommu_check()
341 ctl &= ~GARTEN; early_gart_iommu_check()
342 write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl); early_gart_iommu_check()
372 u32 ctl; gart_iommu_hole_init() local
386 ctl = read_pci_config(bus, slot, 3, gart_iommu_hole_init()
395 ctl &= ~GARTEN; gart_iommu_hole_init()
396 write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl); gart_iommu_hole_init()
398 aper_order = (ctl >> 1) & 7; gart_iommu_hole_init()
485 u32 ctl = aper_order << 1; gart_iommu_hole_init() local
494 write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl); gart_iommu_hole_init()
/linux-4.1.27/arch/mips/ath25/
H A Dar5312.c186 u32 ctl; ar5312_flash_init() local
191 ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0); ar5312_flash_init()
192 ctl &= AR5312_FLASHCTL_MW; ar5312_flash_init()
195 switch (ctl) { ar5312_flash_init()
209 ctl |= AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC_8M | AR5312_FLASHCTL_RBLE; ar5312_flash_init()
210 ctl |= 0x01 << AR5312_FLASHCTL_IDCY_S; ar5312_flash_init()
211 ctl |= 0x07 << AR5312_FLASHCTL_WST1_S; ar5312_flash_init()
212 ctl |= 0x07 << AR5312_FLASHCTL_WST2_S; ar5312_flash_init()
213 __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL0); ar5312_flash_init()
216 ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL1); ar5312_flash_init()
217 ctl &= ~(AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC); ar5312_flash_init()
218 __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL1); ar5312_flash_init()
219 ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL2); ar5312_flash_init()
220 ctl &= ~(AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC); ar5312_flash_init()
221 __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL2); ar5312_flash_init()
/linux-4.1.27/drivers/net/ethernet/ibm/emac/
H A Dphy.c111 int ctl, adv; genmii_setup_aneg() local
119 ctl = phy_read(phy, MII_BMCR); genmii_setup_aneg()
120 if (ctl < 0) genmii_setup_aneg()
121 return ctl; genmii_setup_aneg()
122 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); genmii_setup_aneg()
125 phy_write(phy, MII_BMCR, ctl); genmii_setup_aneg()
161 ctl = phy_read(phy, MII_BMCR); genmii_setup_aneg()
162 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); genmii_setup_aneg()
163 phy_write(phy, MII_BMCR, ctl); genmii_setup_aneg()
170 int ctl; genmii_setup_forced() local
177 ctl = phy_read(phy, MII_BMCR); genmii_setup_forced()
178 if (ctl < 0) genmii_setup_forced()
179 return ctl; genmii_setup_forced()
180 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); genmii_setup_forced()
183 phy_write(phy, MII_BMCR, ctl | BMCR_RESET); genmii_setup_forced()
190 ctl |= BMCR_SPEED100; genmii_setup_forced()
193 ctl |= BMCR_SPEED1000; genmii_setup_forced()
199 ctl |= BMCR_FULLDPLX; genmii_setup_forced()
200 phy_write(phy, MII_BMCR, ctl); genmii_setup_forced()
/linux-4.1.27/sound/core/
H A Dcontrol.c52 struct snd_ctl_file *ctl; snd_ctl_open() local
73 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); snd_ctl_open()
74 if (ctl == NULL) { snd_ctl_open()
78 INIT_LIST_HEAD(&ctl->events); snd_ctl_open()
79 init_waitqueue_head(&ctl->change_sleep); snd_ctl_open()
80 spin_lock_init(&ctl->read_lock); snd_ctl_open()
81 ctl->card = card; snd_ctl_open()
83 ctl->preferred_subdevice[i] = -1; snd_ctl_open()
84 ctl->pid = get_pid(task_pid(current)); snd_ctl_open()
85 file->private_data = ctl; snd_ctl_open()
87 list_add_tail(&ctl->list, &card->ctl_files); snd_ctl_open()
102 static void snd_ctl_empty_read_queue(struct snd_ctl_file * ctl) snd_ctl_empty_read_queue() argument
107 spin_lock_irqsave(&ctl->read_lock, flags); snd_ctl_empty_read_queue()
108 while (!list_empty(&ctl->events)) { snd_ctl_empty_read_queue()
109 cread = snd_kctl_event(ctl->events.next); snd_ctl_empty_read_queue()
113 spin_unlock_irqrestore(&ctl->read_lock, flags); snd_ctl_empty_read_queue()
120 struct snd_ctl_file *ctl; snd_ctl_release() local
124 ctl = file->private_data; snd_ctl_release()
126 card = ctl->card; snd_ctl_release()
128 list_del(&ctl->list); snd_ctl_release()
133 if (control->vd[idx].owner == ctl) snd_ctl_release()
136 snd_ctl_empty_read_queue(ctl); snd_ctl_release()
137 put_pid(ctl->pid); snd_ctl_release()
138 kfree(ctl); snd_ctl_release()
148 * @id: the ctl element id to send notification
158 struct snd_ctl_file *ctl; snd_ctl_notify() local
167 list_for_each_entry(ctl, &card->ctl_files, list) { snd_ctl_notify()
168 if (!ctl->subscribed) snd_ctl_notify()
170 spin_lock_irqsave(&ctl->read_lock, flags); snd_ctl_notify()
171 list_for_each_entry(ev, &ctl->events, list) { snd_ctl_notify()
181 list_add_tail(&ev->list, &ctl->events); snd_ctl_notify()
186 wake_up(&ctl->change_sleep); snd_ctl_notify()
187 spin_unlock_irqrestore(&ctl->read_lock, flags); snd_ctl_notify()
188 kill_fasync(&ctl->fasync, SIGIO, POLL_IN); snd_ctl_notify()
719 static int snd_ctl_card_info(struct snd_card *card, struct snd_ctl_file * ctl, snd_ctl_card_info() argument
808 static int snd_ctl_elem_info(struct snd_ctl_file *ctl, snd_ctl_elem_info() argument
811 struct snd_card *card = ctl->card; snd_ctl_elem_info()
835 if (vd->owner == ctl) snd_ctl_elem_info()
846 static int snd_ctl_elem_info_user(struct snd_ctl_file *ctl, snd_ctl_elem_info_user() argument
854 snd_power_lock(ctl->card); snd_ctl_elem_info_user()
855 result = snd_power_wait(ctl->card, SNDRV_CTL_POWER_D0); snd_ctl_elem_info_user()
857 result = snd_ctl_elem_info(ctl, &info); snd_ctl_elem_info_user()
858 snd_power_unlock(ctl->card); snd_ctl_elem_info_user()
1462 struct snd_ctl_file *ctl; snd_ctl_ioctl() local
1469 ctl = file->private_data; snd_ctl_ioctl()
1470 card = ctl->card; snd_ctl_ioctl()
1477 return snd_ctl_card_info(card, ctl, cmd, argp); snd_ctl_ioctl()
1481 return snd_ctl_elem_info_user(ctl, argp); snd_ctl_ioctl()
1485 return snd_ctl_elem_write_user(ctl, argp); snd_ctl_ioctl()
1487 return snd_ctl_elem_lock(ctl, argp); snd_ctl_ioctl()
1489 return snd_ctl_elem_unlock(ctl, argp); snd_ctl_ioctl()
1491 return snd_ctl_elem_add_user(ctl, argp, 0); snd_ctl_ioctl()
1493 return snd_ctl_elem_add_user(ctl, argp, 1); snd_ctl_ioctl()
1495 return snd_ctl_elem_remove(ctl, argp); snd_ctl_ioctl()
1497 return snd_ctl_subscribe_events(ctl, ip); snd_ctl_ioctl()
1499 return snd_ctl_tlv_ioctl(ctl, argp, SNDRV_CTL_TLV_OP_READ); snd_ctl_ioctl()
1501 return snd_ctl_tlv_ioctl(ctl, argp, SNDRV_CTL_TLV_OP_WRITE); snd_ctl_ioctl()
1503 return snd_ctl_tlv_ioctl(ctl, argp, SNDRV_CTL_TLV_OP_CMD); snd_ctl_ioctl()
1515 err = p->fioctl(card, ctl, cmd, arg); snd_ctl_ioctl()
1529 struct snd_ctl_file *ctl; snd_ctl_read() local
1533 ctl = file->private_data; snd_ctl_read()
1534 if (snd_BUG_ON(!ctl || !ctl->card)) snd_ctl_read()
1536 if (!ctl->subscribed) snd_ctl_read()
1540 spin_lock_irq(&ctl->read_lock); snd_ctl_read()
1544 while (list_empty(&ctl->events)) { snd_ctl_read()
1551 add_wait_queue(&ctl->change_sleep, &wait); snd_ctl_read()
1553 spin_unlock_irq(&ctl->read_lock); snd_ctl_read()
1555 remove_wait_queue(&ctl->change_sleep, &wait); snd_ctl_read()
1556 if (ctl->card->shutdown) snd_ctl_read()
1560 spin_lock_irq(&ctl->read_lock); snd_ctl_read()
1562 kev = snd_kctl_event(ctl->events.next); snd_ctl_read()
1567 spin_unlock_irq(&ctl->read_lock); snd_ctl_read()
1573 spin_lock_irq(&ctl->read_lock); snd_ctl_read()
1579 spin_unlock_irq(&ctl->read_lock); snd_ctl_read()
1587 struct snd_ctl_file *ctl; snd_ctl_poll() local
1589 ctl = file->private_data; snd_ctl_poll()
1590 if (!ctl->subscribed) snd_ctl_poll()
1592 poll_wait(file, &ctl->change_sleep, wait); snd_ctl_poll()
1595 if (!list_empty(&ctl->events)) snd_ctl_poll()
1693 struct snd_ctl_file *ctl; snd_ctl_fasync() local
1695 ctl = file->private_data; snd_ctl_fasync()
1696 return fasync_helper(fd, file, on, &ctl->fasync); snd_ctl_fasync()
1763 struct snd_ctl_file *ctl; snd_ctl_dev_disconnect() local
1766 list_for_each_entry(ctl, &card->ctl_files, list) { snd_ctl_dev_disconnect()
1767 wake_up(&ctl->change_sleep); snd_ctl_dev_disconnect()
1768 kill_fasync(&ctl->fasync, SIGIO, POLL_ERR); snd_ctl_dev_disconnect()
H A Dcontrol_compat.c94 static int snd_ctl_elem_info_compat(struct snd_ctl_file *ctl, snd_ctl_elem_info_compat() argument
114 snd_power_lock(ctl->card); snd_ctl_elem_info_compat()
115 err = snd_power_wait(ctl->card, SNDRV_CTL_POWER_D0); snd_ctl_elem_info_compat()
117 err = snd_ctl_elem_info(ctl, data); snd_ctl_elem_info_compat()
118 snd_power_unlock(ctl->card); snd_ctl_elem_info_compat()
452 struct snd_ctl_file *ctl; snd_ctl_ioctl_compat() local
457 ctl = file->private_data; snd_ctl_ioctl_compat()
458 if (snd_BUG_ON(!ctl || !ctl->card)) snd_ctl_ioctl_compat()
475 return snd_ctl_elem_list_compat(ctl->card, argp); snd_ctl_ioctl_compat()
477 return snd_ctl_elem_info_compat(ctl, argp); snd_ctl_ioctl_compat()
479 return snd_ctl_elem_read_user_compat(ctl->card, argp); snd_ctl_ioctl_compat()
481 return snd_ctl_elem_write_user_compat(ctl, argp); snd_ctl_ioctl_compat()
483 return snd_ctl_elem_add_compat(ctl, argp, 0); snd_ctl_ioctl_compat()
485 return snd_ctl_elem_add_compat(ctl, argp, 1); snd_ctl_ioctl_compat()
488 return snd_ctl_elem_read_user_x32(ctl->card, argp); snd_ctl_ioctl_compat()
490 return snd_ctl_elem_write_user_x32(ctl, argp); snd_ctl_ioctl_compat()
497 err = p->fioctl(ctl->card, ctl, cmd, arg); snd_ctl_ioctl_compat()
H A Dvmaster.c19 * a subset of information returned via ctl info callback
77 /* get the slave ctl info and save the initial values */ slave_init()
183 * ctl callbacks for slaves
284 * ctl callbacks for master controls
/linux-4.1.27/net/sched/
H A Dsch_red.c183 struct tc_red_qopt *ctl; red_change() local
201 ctl = nla_data(tb[TCA_RED_PARMS]); red_change()
203 if (ctl->limit > 0) { red_change()
204 child = fifo_create_dflt(sch, &bfifo_qdisc_ops, ctl->limit); red_change()
210 q->flags = ctl->flags; red_change()
211 q->limit = ctl->limit; red_change()
219 ctl->qth_min, ctl->qth_max, ctl->Wlog, red_change()
220 ctl->Plog, ctl->Scell_log, red_change()
226 if (ctl->flags & TC_RED_ADAPTATIVE) red_change()
H A Dsch_gred.c384 struct tc_gred_qopt *ctl, int prio, gred_change_vq()
400 q->limit = ctl->limit; gred_change_vq()
406 ctl->qth_min, ctl->qth_max, ctl->Wlog, ctl->Plog, gred_change_vq()
407 ctl->Scell_log, stab, max_P); gred_change_vq()
422 struct tc_gred_qopt *ctl; gred_change() local
446 ctl = nla_data(tb[TCA_GRED_PARMS]); gred_change()
449 if (ctl->DP >= table->DPs) gred_change()
453 if (ctl->prio == 0) { gred_change()
460 "setting default to %d\n", ctl->DP, def_prio); gred_change()
464 prio = ctl->prio; gred_change()
470 err = gred_change_vq(sch, ctl->DP, ctl, prio, stab, max_P, &prealloc); gred_change()
383 gred_change_vq(struct Qdisc *sch, int dp, struct tc_gred_qopt *ctl, int prio, u8 *stab, u32 max_P, struct gred_sched_data **prealloc) gred_change_vq() argument
H A Dsch_fifo.c64 struct tc_fifo_qopt *ctl = nla_data(opt); fifo_init() local
66 if (nla_len(opt) < sizeof(*ctl)) fifo_init()
69 sch->limit = ctl->limit; fifo_init()
H A Dsch_sfb.c496 const struct tc_sfb_qopt *ctl = &sfb_default_ops; sfb_change() local
508 ctl = nla_data(tb[TCA_SFB_PARMS]); sfb_change()
511 limit = ctl->limit; sfb_change()
525 q->rehash_interval = msecs_to_jiffies(ctl->rehash_interval); sfb_change()
526 q->warmup_time = msecs_to_jiffies(ctl->warmup_time); sfb_change()
529 q->increment = ctl->increment; sfb_change()
530 q->decrement = ctl->decrement; sfb_change()
531 q->max = ctl->max; sfb_change()
532 q->bin_size = ctl->bin_size; sfb_change()
533 q->penalty_rate = ctl->penalty_rate; sfb_change()
534 q->penalty_burst = ctl->penalty_burst; sfb_change()
535 q->tokens_avail = ctl->penalty_burst; sfb_change()
H A Dsch_choke.c413 const struct tc_red_qopt *ctl; choke_change() local
432 ctl = nla_data(tb[TCA_CHOKE_PARMS]); choke_change()
434 if (ctl->limit > CHOKE_MAX_QUEUE) choke_change()
437 mask = roundup_pow_of_two(ctl->limit + 1) - 1; choke_change()
477 q->flags = ctl->flags; choke_change()
478 q->limit = ctl->limit; choke_change()
480 red_set_parms(&q->parms, ctl->qth_min, ctl->qth_max, ctl->Wlog, choke_change()
481 ctl->Plog, ctl->Scell_log, choke_change()
H A Dsch_sfq.c642 struct tc_sfq_qopt *ctl = nla_data(opt); sfq_change() local
647 if (opt->nla_len < nla_attr_size(sizeof(*ctl))) sfq_change()
651 if (ctl->divisor && sfq_change()
652 (!is_power_of_2(ctl->divisor) || ctl->divisor > 65536)) sfq_change()
660 if (ctl->quantum) { sfq_change()
661 q->quantum = ctl->quantum; sfq_change()
664 q->perturb_period = ctl->perturb_period * HZ; sfq_change()
665 if (ctl->flows) sfq_change()
666 q->maxflows = min_t(u32, ctl->flows, SFQ_MAX_FLOWS); sfq_change()
667 if (ctl->divisor) { sfq_change()
668 q->divisor = ctl->divisor; sfq_change()
686 if (ctl->limit) { sfq_change()
687 q->limit = min_t(u32, ctl->limit, q->maxdepth * q->maxflows); sfq_change()
H A Dsch_plug.c140 struct tc_plug_qopt *ctl = nla_data(opt); plug_init() local
142 if (nla_len(opt) < sizeof(*ctl)) plug_init()
145 q->limit = ctl->limit; plug_init()
/linux-4.1.27/net/sctp/
H A Dsysctl.c61 static int proc_sctp_do_hmac_alg(struct ctl_table *ctl, int write,
64 static int proc_sctp_do_rto_min(struct ctl_table *ctl, int write,
67 static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write,
70 static int proc_sctp_do_alpha_beta(struct ctl_table *ctl, int write,
73 static int proc_sctp_do_auth(struct ctl_table *ctl, int write,
315 static int proc_sctp_do_hmac_alg(struct ctl_table *ctl, int write, proc_sctp_do_hmac_alg() argument
361 static int proc_sctp_do_rto_min(struct ctl_table *ctl, int write, proc_sctp_do_rto_min() argument
366 unsigned int min = *(unsigned int *) ctl->extra1; proc_sctp_do_rto_min()
367 unsigned int max = *(unsigned int *) ctl->extra2; proc_sctp_do_rto_min()
390 static int proc_sctp_do_rto_max(struct ctl_table *ctl, int write, proc_sctp_do_rto_max() argument
395 unsigned int min = *(unsigned int *) ctl->extra1; proc_sctp_do_rto_max()
396 unsigned int max = *(unsigned int *) ctl->extra2; proc_sctp_do_rto_max()
419 static int proc_sctp_do_alpha_beta(struct ctl_table *ctl, int write, proc_sctp_do_alpha_beta() argument
427 return proc_dointvec_minmax(ctl, write, buffer, lenp, ppos); proc_sctp_do_alpha_beta()
430 static int proc_sctp_do_auth(struct ctl_table *ctl, int write, proc_sctp_do_auth() argument
/linux-4.1.27/sound/aoa/fabrics/
H A Dlayout.c892 struct snd_kcontrol *ctl; layout_attached_codec() local
906 ctl = snd_ctl_new1(&master_ctl, codec->gpio); layout_attached_codec()
907 ldev->master_ctrl = ctl; layout_attached_codec()
908 aoa_snd_ctl_add(ctl); layout_attached_codec()
914 ctl = snd_ctl_new1(&speakers_ctl, codec->gpio); layout_attached_codec()
915 ldev->speaker_ctrl = ctl; layout_attached_codec()
916 aoa_snd_ctl_add(ctl); layout_attached_codec()
921 ctl = snd_ctl_new1(&headphone_ctl, codec->gpio); layout_attached_codec()
922 ldev->headphone_ctrl = ctl; layout_attached_codec()
923 aoa_snd_ctl_add(ctl); layout_attached_codec()
931 ctl = snd_ctl_new1(&headphone_detect_choice, layout_attached_codec()
933 aoa_snd_ctl_add(ctl); layout_attached_codec()
934 ctl = snd_ctl_new1(&headphone_detected, layout_attached_codec()
936 ldev->headphone_detected_ctrl = ctl; layout_attached_codec()
937 aoa_snd_ctl_add(ctl); layout_attached_codec()
943 ctl = snd_ctl_new1(&lineout_ctl, codec->gpio); layout_attached_codec()
945 strlcpy(ctl->id.name, layout_attached_codec()
946 "Headphone Switch", sizeof(ctl->id.name)); layout_attached_codec()
947 ldev->lineout_ctrl = ctl; layout_attached_codec()
948 aoa_snd_ctl_add(ctl); layout_attached_codec()
956 ctl = snd_ctl_new1(&lineout_detect_choice, layout_attached_codec()
959 strlcpy(ctl->id.name, layout_attached_codec()
961 sizeof(ctl->id.name)); layout_attached_codec()
962 aoa_snd_ctl_add(ctl); layout_attached_codec()
963 ctl = snd_ctl_new1(&lineout_detected, layout_attached_codec()
966 strlcpy(ctl->id.name, layout_attached_codec()
968 sizeof(ctl->id.name)); layout_attached_codec()
969 ldev->lineout_detected_ctrl = ctl; layout_attached_codec()
970 aoa_snd_ctl_add(ctl); layout_attached_codec()
/linux-4.1.27/drivers/rtc/
H A Drtc-tx4939.c34 __raw_writel(cmd, &rtcreg->ctl); tx4939_rtc_cmd()
36 while (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_BUSY) { tx4939_rtc_cmd()
64 (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME)); tx4939_rtc_set_mmss()
80 (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME)); tx4939_rtc_read_time()
133 u32 ctl; tx4939_rtc_read_alarm() local
138 (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME)); tx4939_rtc_read_alarm()
146 ctl = __raw_readl(&rtcreg->ctl); tx4939_rtc_read_alarm()
147 alrm->enabled = (ctl & TX4939_RTCCTL_ALME) ? 1 : 0; tx4939_rtc_read_alarm()
148 alrm->pending = (ctl & TX4939_RTCCTL_ALMD) ? 1 : 0; tx4939_rtc_read_alarm()
174 if (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALMD) { tx4939_rtc_interrupt()
/linux-4.1.27/drivers/media/pci/ttpci/
H A Dbudget.c643 struct stv6110x_devctl *ctl; frontend_init() local
656 ctl = dvb_attach(stv6110x_attach, frontend_init()
661 if (ctl) { frontend_init()
662 tt1600_stv090x_config.tuner_init = ctl->tuner_init; frontend_init()
663 tt1600_stv090x_config.tuner_sleep = ctl->tuner_sleep; frontend_init()
664 tt1600_stv090x_config.tuner_set_mode = ctl->tuner_set_mode; frontend_init()
665 tt1600_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency; frontend_init()
666 tt1600_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency; frontend_init()
667 tt1600_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth; frontend_init()
668 tt1600_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth; frontend_init()
669 tt1600_stv090x_config.tuner_set_bbgain = ctl->tuner_set_bbgain; frontend_init()
670 tt1600_stv090x_config.tuner_get_bbgain = ctl->tuner_get_bbgain; frontend_init()
671 tt1600_stv090x_config.tuner_set_refclk = ctl->tuner_set_refclk; frontend_init()
672 tt1600_stv090x_config.tuner_get_status = ctl->tuner_get_status; frontend_init()
696 struct stv6110x_devctl *ctl; frontend_init() local
710 ctl = dvb_attach(stv6110x_attach, frontend_init()
715 if (ctl) { frontend_init()
716 tt1600_stv090x_config.tuner_init = ctl->tuner_init; frontend_init()
717 tt1600_stv090x_config.tuner_sleep = ctl->tuner_sleep; frontend_init()
718 tt1600_stv090x_config.tuner_set_mode = ctl->tuner_set_mode; frontend_init()
719 tt1600_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency; frontend_init()
720 tt1600_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency; frontend_init()
721 tt1600_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth; frontend_init()
722 tt1600_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth; frontend_init()
723 tt1600_stv090x_config.tuner_set_bbgain = ctl->tuner_set_bbgain; frontend_init()
724 tt1600_stv090x_config.tuner_get_bbgain = ctl->tuner_get_bbgain; frontend_init()
725 tt1600_stv090x_config.tuner_set_refclk = ctl->tuner_set_refclk; frontend_init()
726 tt1600_stv090x_config.tuner_get_status = ctl->tuner_get_status; frontend_init()
/linux-4.1.27/drivers/video/fbdev/
H A Dn411.c46 static unsigned char ctl; variable
54 ctl &= ~(HCB_CD_BIT); n411_set_ctl()
56 ctl |= HCB_CD_BIT; n411_set_ctl()
60 ctl &= ~(HCB_DS_BIT); n411_set_ctl()
62 ctl |= HCB_DS_BIT; n411_set_ctl()
65 outb(ctl, cio_addr); n411_set_ctl()
107 ctl = HCB_WUP_BIT | HCB_RW_BIT | HCB_CD_BIT ; n411_init_control()
H A Dbfin-lq035q1-fb.c143 struct spi_control *ctl; lq035q1_spidev_probe() local
148 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL); lq035q1_spidev_probe()
150 if (!ctl) lq035q1_spidev_probe()
153 ctl->mode = (info->disp_info->mode & lq035q1_spidev_probe()
157 ret |= lq035q1_control(spi, LQ035_DRIVER_OUTPUT_CTL, ctl->mode); lq035q1_spidev_probe()
159 kfree(ctl); lq035q1_spidev_probe()
163 spi_set_drvdata(spi, ctl); lq035q1_spidev_probe()
184 struct spi_control *ctl = spi_get_drvdata(spi); lq035q1_spidev_resume() local
187 ret = lq035q1_control(spi, LQ035_DRIVER_OUTPUT_CTL, ctl->mode); lq035q1_spidev_resume()
/linux-4.1.27/arch/frv/kernel/
H A Dpm.c153 static int sysctl_pm_do_suspend(struct ctl_table *ctl, int write, sysctl_pm_do_suspend() argument
200 static int cmode_procctl(struct ctl_table *ctl, int write, cmode_procctl() argument
206 return proc_dointvec(ctl, write, buffer, lenp, fpos); cmode_procctl()
272 static int p0_procctl(struct ctl_table *ctl, int write, p0_procctl() argument
278 return proc_dointvec(ctl, write, buffer, lenp, fpos); p0_procctl()
285 static int cm_procctl(struct ctl_table *ctl, int write, cm_procctl() argument
291 return proc_dointvec(ctl, write, buffer, lenp, fpos); cm_procctl()
/linux-4.1.27/arch/alpha/kernel/
H A Dsys_marvel.c74 volatile unsigned long *ctl; io7_get_irq_ctl()
97 ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */ io7_get_irq_ctl()
99 ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr; io7_get_irq_ctl()
102 return ctl;
108 volatile unsigned long *ctl; io7_enable_irq()
112 ctl = io7_get_irq_ctl(irq, &io7); io7_enable_irq()
113 if (!ctl || !io7) { io7_enable_irq()
120 *ctl |= 1UL << 24; io7_enable_irq()
122 *ctl; io7_enable_irq()
129 volatile unsigned long *ctl; io7_disable_irq()
133 ctl = io7_get_irq_ctl(irq, &io7); io7_disable_irq()
134 if (!ctl || !io7) { io7_disable_irq()
141 *ctl &= ~(1UL << 24); io7_disable_irq()
143 *ctl; io7_disable_irq()
73 volatile unsigned long *ctl; io7_get_irq_ctl() local
107 volatile unsigned long *ctl; io7_enable_irq() local
128 volatile unsigned long *ctl; io7_disable_irq() local
/linux-4.1.27/drivers/net/wireless/b43legacy/
H A Dleds.c39 u16 ctl; b43legacy_led_turn_on() local
42 ctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL); b43legacy_led_turn_on()
44 ctl &= ~(1 << led_index); b43legacy_led_turn_on()
46 ctl |= (1 << led_index); b43legacy_led_turn_on()
47 b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ctl); b43legacy_led_turn_on()
56 u16 ctl; b43legacy_led_turn_off() local
59 ctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL); b43legacy_led_turn_off()
61 ctl |= (1 << led_index); b43legacy_led_turn_off()
63 ctl &= ~(1 << led_index); b43legacy_led_turn_off()
64 b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ctl); b43legacy_led_turn_off()
H A Dmain.c976 u16 ctl; b43legacy_write_beacon_template() local
991 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_write_beacon_template()
994 ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL; b43legacy_write_beacon_template()
995 ctl &= ~B43legacy_TX4_PHY_ANT; b43legacy_write_beacon_template()
996 ctl &= ~B43legacy_TX4_PHY_ENC; b43legacy_write_beacon_template()
997 ctl |= antenna; b43legacy_write_beacon_template()
998 ctl |= B43legacy_TX4_PHY_ENC_CCK; b43legacy_write_beacon_template()
1000 B43legacy_SHM_SH_BEACPHYCTL, ctl); b43legacy_write_beacon_template()
2034 u32 ctl; b43legacy_adjust_opmode() local
2037 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_adjust_opmode()
2039 ctl &= ~B43legacy_MACCTL_AP; b43legacy_adjust_opmode()
2040 ctl &= ~B43legacy_MACCTL_KEEP_CTL; b43legacy_adjust_opmode()
2041 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP; b43legacy_adjust_opmode()
2042 ctl &= ~B43legacy_MACCTL_KEEP_BAD; b43legacy_adjust_opmode()
2043 ctl &= ~B43legacy_MACCTL_PROMISC; b43legacy_adjust_opmode()
2044 ctl &= ~B43legacy_MACCTL_BEACPROMISC; b43legacy_adjust_opmode()
2045 ctl |= B43legacy_MACCTL_INFRA; b43legacy_adjust_opmode()
2048 ctl |= B43legacy_MACCTL_AP; b43legacy_adjust_opmode()
2050 ctl &= ~B43legacy_MACCTL_INFRA; b43legacy_adjust_opmode()
2053 ctl |= B43legacy_MACCTL_KEEP_CTL; b43legacy_adjust_opmode()
2055 ctl |= B43legacy_MACCTL_KEEP_BAD; b43legacy_adjust_opmode()
2057 ctl |= B43legacy_MACCTL_KEEP_BADPLCP; b43legacy_adjust_opmode()
2059 ctl |= B43legacy_MACCTL_PROMISC; b43legacy_adjust_opmode()
2061 ctl |= B43legacy_MACCTL_BEACPROMISC; b43legacy_adjust_opmode()
2067 ctl |= B43legacy_MACCTL_PROMISC; b43legacy_adjust_opmode()
2069 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl); b43legacy_adjust_opmode()
2072 if ((ctl & B43legacy_MACCTL_INFRA) && b43legacy_adjust_opmode()
2073 !(ctl & B43legacy_MACCTL_AP)) { b43legacy_adjust_opmode()
/linux-4.1.27/drivers/net/ethernet/micrel/
H A Dks8842.c434 struct ks8842_tx_dma_ctl *ctl = &adapter->dma_tx; ks8842_tx_frame_dma() local
435 u8 *buf = ctl->buf; ks8842_tx_frame_dma()
437 if (ctl->adesc) { ks8842_tx_frame_dma()
443 sg_dma_len(&ctl->sg) = skb->len + sizeof(u32); ks8842_tx_frame_dma()
454 sg_dma_address(&ctl->sg), 0, sg_dma_len(&ctl->sg), ks8842_tx_frame_dma()
458 if (sg_dma_len(&ctl->sg) % 4) ks8842_tx_frame_dma()
459 sg_dma_len(&ctl->sg) += 4 - sg_dma_len(&ctl->sg) % 4; ks8842_tx_frame_dma()
461 ctl->adesc = dmaengine_prep_slave_sg(ctl->chan, ks8842_tx_frame_dma()
462 &ctl->sg, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT); ks8842_tx_frame_dma()
463 if (!ctl->adesc) ks8842_tx_frame_dma()
466 ctl->adesc->callback_param = netdev; ks8842_tx_frame_dma()
467 ctl->adesc->callback = ks8842_dma_tx_cb; ks8842_tx_frame_dma()
468 ctl->adesc->tx_submit(ctl->adesc); ks8842_tx_frame_dma()
555 struct ks8842_rx_dma_ctl *ctl = &adapter->dma_rx; __ks8842_start_new_rx_dma() local
556 struct scatterlist *sg = &ctl->sg; __ks8842_start_new_rx_dma()
559 ctl->skb = netdev_alloc_skb(netdev, DMA_BUFFER_SIZE); __ks8842_start_new_rx_dma()
560 if (ctl->skb) { __ks8842_start_new_rx_dma()
563 ctl->skb->data, DMA_BUFFER_SIZE, DMA_FROM_DEVICE); __ks8842_start_new_rx_dma()
572 ctl->adesc = dmaengine_prep_slave_sg(ctl->chan, __ks8842_start_new_rx_dma()
575 if (!ctl->adesc) __ks8842_start_new_rx_dma()
578 ctl->adesc->callback_param = netdev; __ks8842_start_new_rx_dma()
579 ctl->adesc->callback = ks8842_dma_rx_cb; __ks8842_start_new_rx_dma()
580 ctl->adesc->tx_submit(ctl->adesc); __ks8842_start_new_rx_dma()
593 if (ctl->skb) __ks8842_start_new_rx_dma()
594 dev_kfree_skb(ctl->skb); __ks8842_start_new_rx_dma()
596 ctl->skb = NULL; __ks8842_start_new_rx_dma()
606 struct ks8842_rx_dma_ctl *ctl = &adapter->dma_rx; ks8842_rx_frame_dma_tasklet() local
607 struct sk_buff *skb = ctl->skb; ks8842_rx_frame_dma_tasklet()
608 dma_addr_t addr = sg_dma_address(&ctl->sg); ks8842_rx_frame_dma_tasklet()
611 ctl->adesc = NULL; ks8842_rx_frame_dma_tasklet()
857 struct ks8842_tx_dma_ctl *ctl = &adapter->dma_tx; ks8842_dma_tx_cb() local
861 if (!ctl->adesc) ks8842_dma_tx_cb()
865 ctl->adesc = NULL; ks8842_dma_tx_cb()
/linux-4.1.27/fs/xfs/
H A Dxfs_sysctl.c28 struct ctl_table *ctl, xfs_stats_clear_proc_handler()
34 int c, ret, *valp = ctl->data; xfs_stats_clear_proc_handler()
37 ret = proc_dointvec_minmax(ctl, write, buffer, lenp, ppos); xfs_stats_clear_proc_handler()
58 struct ctl_table *ctl, xfs_panic_mask_proc_handler()
64 int ret, *valp = ctl->data; xfs_panic_mask_proc_handler()
66 ret = proc_dointvec_minmax(ctl, write, buffer, lenp, ppos); xfs_panic_mask_proc_handler()
27 xfs_stats_clear_proc_handler( struct ctl_table *ctl, int write, void __user *buffer, size_t *lenp, loff_t *ppos) xfs_stats_clear_proc_handler() argument
57 xfs_panic_mask_proc_handler( struct ctl_table *ctl, int write, void __user *buffer, size_t *lenp, loff_t *ppos) xfs_panic_mask_proc_handler() argument
/linux-4.1.27/drivers/isdn/mISDN/
H A Dclock.c18 * ctl = callback function to enable/disable clock source
22 * Note: Callback 'ctl' can be called before mISDN_register_clock returns!
78 lastclock->ctl(lastclock->priv, 0); select_iclock()
85 bestclock->ctl(bestclock->priv, 1); select_iclock()
95 *mISDN_register_clock(char *name, int pri, clockctl_func_t *ctl, void *priv) mISDN_register_clock() argument
110 iclock->ctl = ctl; mISDN_register_clock()
133 iclock->ctl(iclock->priv, 0); mISDN_unregister_clock()
155 iclock->ctl(iclock->priv, 0); mISDN_clock_update()
/linux-4.1.27/drivers/iio/adc/
H A Dmen_z188_adc.c90 u32 ctl; men_z188_config_channels() local
92 ctl = readl(addr + Z188_CTRL_REG); men_z188_config_channels()
93 ctl |= Z188_CFG_AUTO; men_z188_config_channels()
94 writel(ctl, addr + Z188_CTRL_REG); men_z188_config_channels()
/linux-4.1.27/drivers/mmc/host/
H A Dtmio_mmc.h52 void __iomem *ctl; member in struct:tmio_mmc_host
171 return readw(host->ctl + (addr << host->bus_shift)); sd_ctrl_read16()
177 readsw(host->ctl + (addr << host->bus_shift), buf, count); sd_ctrl_read16_rep()
182 return readw(host->ctl + (addr << host->bus_shift)) | sd_ctrl_read32()
183 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; sd_ctrl_read32()
193 writew(val, host->ctl + (addr << host->bus_shift)); sd_ctrl_write16()
199 writesw(host->ctl + (addr << host->bus_shift), buf, count); sd_ctrl_write16_rep()
204 writew(val, host->ctl + (addr << host->bus_shift)); sd_ctrl_write32()
205 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); sd_ctrl_write32()
H A Dtmio_mmc.c110 (unsigned long)host->ctl, irq); tmio_mmc_probe()
/linux-4.1.27/arch/blackfin/mach-bf609/
H A Dclock.c142 u32 ctl = bfin_read32(CGU0_CTL); pll_get_rate() local
146 msel = (ctl & CGU0_CTL_MSEL_MASK) >> CGU0_CTL_MSEL_SHIFT; pll_get_rate()
147 df = (ctl & CGU0_CTL_DF); pll_get_rate()
189 u32 ctl = bfin_read32(CGU0_CTL); sys_clk_get_rate() local
192 msel = (ctl & CGU0_CTL_MSEL_MASK) >> CGU0_CTL_MSEL_SHIFT; sys_clk_get_rate()
193 df = (ctl & CGU0_CTL_DF); sys_clk_get_rate()
219 u32 ctl = bfin_read32(CGU0_CTL); sys_clk_round_rate() local
221 msel = (ctl & CGU0_CTL_MSEL_MASK) >> CGU0_CTL_MSEL_SHIFT; sys_clk_round_rate()
222 df = (ctl & CGU0_CTL_DF); sys_clk_round_rate()
/linux-4.1.27/drivers/net/
H A Dsungem_phy.c315 u16 ctl, adv; genmii_setup_aneg() local
337 ctl = sungem_phy_read(phy, MII_BMCR); genmii_setup_aneg()
338 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); genmii_setup_aneg()
339 sungem_phy_write(phy, MII_BMCR, ctl); genmii_setup_aneg()
346 u16 ctl; genmii_setup_forced() local
353 ctl = sungem_phy_read(phy, MII_BMCR); genmii_setup_forced()
354 ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_ANENABLE); genmii_setup_forced()
357 sungem_phy_write(phy, MII_BMCR, ctl | BMCR_RESET); genmii_setup_forced()
364 ctl |= BMCR_SPEED100; genmii_setup_forced()
371 ctl |= BMCR_FULLDPLX; genmii_setup_forced()
372 sungem_phy_write(phy, MII_BMCR, ctl); genmii_setup_forced()
470 u16 ctl, adv; bcm54xx_setup_aneg() local
505 ctl = sungem_phy_read(phy, MII_BMCR); bcm54xx_setup_aneg()
506 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); bcm54xx_setup_aneg()
507 sungem_phy_write(phy, MII_BMCR, ctl); bcm54xx_setup_aneg()
514 u16 ctl; bcm54xx_setup_forced() local
521 ctl = sungem_phy_read(phy, MII_BMCR); bcm54xx_setup_forced()
522 ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_SPD2|BMCR_ANENABLE); bcm54xx_setup_forced()
525 sungem_phy_write(phy, MII_BMCR, ctl | BMCR_RESET); bcm54xx_setup_forced()
532 ctl |= BMCR_SPEED100; bcm54xx_setup_forced()
535 ctl |= BMCR_SPD2; bcm54xx_setup_forced()
538 ctl |= BMCR_FULLDPLX; bcm54xx_setup_forced()
542 sungem_phy_write(phy, MII_BMCR, ctl); bcm54xx_setup_forced()
746 u16 ctl, adv; marvell_setup_aneg() local
788 ctl = sungem_phy_read(phy, MII_BMCR); marvell_setup_aneg()
789 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); marvell_setup_aneg()
790 sungem_phy_write(phy, MII_BMCR, ctl); marvell_setup_aneg()
797 u16 ctl, ctl2; marvell_setup_forced() local
804 ctl = sungem_phy_read(phy, MII_BMCR); marvell_setup_forced()
805 ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_SPD2|BMCR_ANENABLE); marvell_setup_forced()
806 ctl |= BMCR_RESET; marvell_setup_forced()
813 ctl |= BMCR_SPEED100; marvell_setup_forced()
819 ctl |= BMCR_SPD2; marvell_setup_forced()
822 ctl |= BMCR_FULLDPLX; marvell_setup_forced()
840 sungem_phy_write(phy, MII_BMCR, ctl); marvell_setup_forced()
/linux-4.1.27/drivers/isdn/pcbit/
H A Ddrv.c46 static int pcbit_ioctl(isdn_ctrl *ctl);
59 static int pcbit_command(isdn_ctrl *ctl);
236 static int pcbit_command(isdn_ctrl *ctl) pcbit_command() argument
242 dev = finddev(ctl->driver); pcbit_command()
250 chan = (ctl->arg & 0x0F) ? dev->b2 : dev->b1; pcbit_command()
253 switch (ctl->command) { pcbit_command()
255 return pcbit_ioctl(ctl); pcbit_command()
259 info.data.setup.CalledPN = (char *) &ctl->parm.setup.phone; pcbit_command()
272 chan->proto = (ctl->arg >> 8); pcbit_command()
278 pcbit_set_msn(dev, ctl->parm.num); pcbit_command()
281 if ((ctl->arg >> 8) != ISDN_PROTO_L3_TRANS) pcbit_command()
805 isdn_ctrl ctl; set_protocol_running() local
837 ctl.driver = dev->id; set_protocol_running()
838 ctl.command = ISDN_STAT_RUN; set_protocol_running()
840 dev->dev_if->statcallb(&ctl); set_protocol_running()
854 ctl.driver = dev->id; set_protocol_running()
855 ctl.command = ISDN_STAT_STOP; set_protocol_running()
857 dev->dev_if->statcallb(&ctl); set_protocol_running()
865 static int pcbit_ioctl(isdn_ctrl *ctl) pcbit_ioctl() argument
870 dev = finddev(ctl->driver); pcbit_ioctl()
878 cmd = (struct pcbit_ioctl *) ctl->parm.num; pcbit_ioctl()
880 switch (ctl->arg) { pcbit_ioctl()
/linux-4.1.27/sound/firewire/
H A Disight.c473 static int isight_gain_info(struct snd_kcontrol *ctl, isight_gain_info() argument
476 struct isight *isight = ctl->private_data; isight_gain_info()
486 static int isight_gain_get(struct snd_kcontrol *ctl, isight_gain_get() argument
489 struct isight *isight = ctl->private_data; isight_gain_get()
502 static int isight_gain_put(struct snd_kcontrol *ctl, isight_gain_put() argument
505 struct isight *isight = ctl->private_data; isight_gain_put()
515 static int isight_mute_get(struct snd_kcontrol *ctl, isight_mute_get() argument
518 struct isight *isight = ctl->private_data; isight_mute_get()
531 static int isight_mute_put(struct snd_kcontrol *ctl, isight_mute_put() argument
534 struct isight *isight = ctl->private_data; isight_mute_put()
559 struct snd_kcontrol *ctl; isight_create_mixer() local
585 ctl = snd_ctl_new1(&gain_control, isight); isight_create_mixer()
586 if (ctl) isight_create_mixer()
587 ctl->tlv.p = isight->gain_tlv; isight_create_mixer()
588 err = snd_ctl_add(isight->card, ctl); isight_create_mixer()
/linux-4.1.27/arch/x86/oprofile/
H A Dop_model_amd.c136 u64 val, ctl; op_amd_handle_ibs() local
143 rdmsrl(MSR_AMD64_IBSFETCHCTL, ctl); op_amd_handle_ibs()
144 if (ctl & IBS_FETCH_VAL) { op_amd_handle_ibs()
149 oprofile_add_data64(&entry, ctl); op_amd_handle_ibs()
155 ctl &= ~(IBS_FETCH_VAL | IBS_FETCH_CNT); op_amd_handle_ibs()
156 ctl |= IBS_FETCH_ENABLE; op_amd_handle_ibs()
157 wrmsrl(MSR_AMD64_IBSFETCHCTL, ctl); op_amd_handle_ibs()
162 rdmsrl(MSR_AMD64_IBSOPCTL, ctl); op_amd_handle_ibs()
163 if (ctl & IBS_OP_VAL) { op_amd_handle_ibs()
185 ctl = op_amd_randomize_ibs_op(ibs_state.ibs_op_ctl); op_amd_handle_ibs()
186 wrmsrl(MSR_AMD64_IBSOPCTL, ctl); op_amd_handle_ibs()
/linux-4.1.27/drivers/net/wan/lmc/
H A Dlmc_media.c193 lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) lmc_hssi_set_status() argument
195 if (ctl == NULL) lmc_hssi_set_status()
206 if (ctl->clock_source && !sc->ictl.clock_source) lmc_hssi_set_status()
211 else if (!ctl->clock_source && sc->ictl.clock_source) lmc_hssi_set_status()
217 lmc_set_protocol (sc, ctl); lmc_hssi_set_status()
338 lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) lmc_ds3_set_status() argument
340 if (ctl == NULL) lmc_ds3_set_status()
352 if (ctl->cable_length && !sc->ictl.cable_length) lmc_ds3_set_status()
354 else if (!ctl->cable_length && sc->ictl.cable_length) lmc_ds3_set_status()
360 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff) lmc_ds3_set_status()
362 else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff) lmc_ds3_set_status()
365 lmc_set_protocol (sc, ctl); lmc_ds3_set_status()
575 lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) lmc_ssi_set_status() argument
577 if (ctl == NULL) lmc_ssi_set_status()
589 if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT lmc_ssi_set_status()
595 else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT lmc_ssi_set_status()
602 if (ctl->clock_rate != sc->ictl.clock_rate) lmc_ssi_set_status()
603 sc->lmc_media->set_speed (sc, ctl); lmc_ssi_set_status()
605 lmc_set_protocol (sc, ctl); lmc_ssi_set_status()
635 lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl) lmc_ssi_set_speed() argument
646 if (ctl == NULL) lmc_ssi_set_speed()
661 av = &ctl->cardspec.ssi; lmc_ssi_set_speed()
965 lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */ lmc_t1_init()
966 lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */ lmc_t1_init()
967 lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */ lmc_t1_init()
971 lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */ lmc_t1_init()
992 lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) lmc_t1_set_status() argument
994 if (ctl == NULL) lmc_t1_set_status()
1003 if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1 lmc_t1_set_status()
1007 else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1 lmc_t1_set_status()
1010 lmc_set_protocol (sc, ctl); lmc_t1_set_status()
1207 lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl) lmc_set_protocol() argument
1209 if (!ctl) lmc_set_protocol()
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-pnx.c285 u32 ctl = 0; i2c_pnx_master_rcv() local
311 ctl = ioread32(I2C_REG_CTL(alg_data)); i2c_pnx_master_rcv()
312 ctl |= mcntrl_rffie | mcntrl_daie; i2c_pnx_master_rcv()
313 ctl &= ~mcntrl_drmie; i2c_pnx_master_rcv()
314 iowrite32(ctl, I2C_REG_CTL(alg_data)); i2c_pnx_master_rcv()
344 ctl = ioread32(I2C_REG_CTL(alg_data)); i2c_pnx_master_rcv()
345 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | i2c_pnx_master_rcv()
347 iowrite32(ctl, I2C_REG_CTL(alg_data)); i2c_pnx_master_rcv()
364 u32 stat, ctl; i2c_pnx_interrupt() local
380 ctl = ioread32(I2C_REG_CTL(alg_data)); i2c_pnx_interrupt()
381 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | i2c_pnx_interrupt()
383 iowrite32(ctl, I2C_REG_CTL(alg_data)); i2c_pnx_interrupt()
396 ctl = ioread32(I2C_REG_CTL(alg_data)); i2c_pnx_interrupt()
397 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | i2c_pnx_interrupt()
399 iowrite32(ctl, I2C_REG_CTL(alg_data)); i2c_pnx_interrupt()
441 u32 ctl; i2c_pnx_timeout() local
449 ctl = ioread32(I2C_REG_CTL(alg_data)); i2c_pnx_timeout()
450 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie); i2c_pnx_timeout()
451 iowrite32(ctl, I2C_REG_CTL(alg_data)); i2c_pnx_timeout()
453 ctl |= mcntrl_reset; i2c_pnx_timeout()
454 iowrite32(ctl, I2C_REG_CTL(alg_data)); i2c_pnx_timeout()
H A Di2c-elektor.c65 static void pcf_isa_setbyte(void *data, int ctl, int val) pcf_isa_setbyte() argument
67 u8 __iomem *address = ctl ? (base_iomem + 1) : base_iomem; pcf_isa_setbyte()
70 if (ctl && irq && (val & I2C_PCF_ESO)) { pcf_isa_setbyte()
82 static int pcf_isa_getbyte(void *data, int ctl) pcf_isa_getbyte() argument
84 u8 __iomem *address = ctl ? (base_iomem + 1) : base_iomem; pcf_isa_getbyte()
H A Di2c-sh7760.c134 * registers, or the ctl will lock up. After that delay sh7760_i2c_irq()
136 * attempting another transfer or ctl will stop working sh7760_i2c_irq()
138 udelay(100); /* wait or risk ctl hang */ sh7760_i2c_irq()
200 /* keep the TEND bit: ctl holds SCL low sh7760_i2c_irq()
/linux-4.1.27/drivers/usb/gadget/udc/
H A Damd5536udc.c182 DBG(dev, "dev control = %08x\n", readl(&dev->regs->ctl)); print_regs()
300 if (readl(&ep->regs->ctl) & AMD_BIT(UDC_EPCTL_NAK)) { UDC_QUEUE_CNAK()
340 tmp = readl(&dev->ep[ep->num].regs->ctl); udc_ep_enable()
342 writel(tmp, &dev->ep[ep->num].regs->ctl); udc_ep_enable()
371 tmp = readl(&ep->regs->ctl); udc_ep_enable()
373 writel(tmp, &ep->regs->ctl); udc_ep_enable()
425 tmp = readl(&ep->regs->ctl); udc_ep_enable()
427 writel(tmp, &ep->regs->ctl); udc_ep_enable()
450 tmp = readl(&ep->regs->ctl); ep_init()
452 writel(tmp, &ep->regs->ctl); ep_init()
462 tmp = readl(&ep->regs->ctl); ep_init()
464 writel(tmp, &ep->regs->ctl); ep_init()
471 tmp = readl(&ep->regs->ctl); ep_init()
473 writel(tmp, &ep->regs->ctl); ep_init()
802 tmp = readl(&ep->regs->ctl); prep_dma()
804 writel(tmp, &ep->regs->ctl); prep_dma()
1042 tmp = readl(&dev->regs->ctl); udc_set_rde()
1044 writel(tmp, &dev->regs->ctl); udc_set_rde()
1105 tmp = readl(&dev->regs->ctl); udc_queue()
1107 writel(tmp, &dev->regs->ctl); udc_queue()
1113 tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); udc_queue()
1115 writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); udc_queue()
1144 tmp = readl(&dev->regs->ctl); udc_queue()
1146 writel(tmp, &dev->regs->ctl); udc_queue()
1165 tmp = readl(&ep->regs->ctl); udc_queue()
1167 writel(tmp, &ep->regs->ctl); udc_queue()
1276 tmp = readl(&udc->regs->ctl); udc_dequeue()
1278 &udc->regs->ctl); udc_dequeue()
1292 writel(tmp, &udc->regs->ctl); udc_dequeue()
1333 tmp = readl(&ep->regs->ctl); udc_set_halt()
1335 writel(tmp, &ep->regs->ctl); udc_set_halt()
1352 tmp = readl(&ep->regs->ctl); udc_set_halt()
1357 writel(tmp, &ep->regs->ctl); udc_set_halt()
1479 tmp = readl(&dev->regs->ctl); udc_basic_init()
1482 writel(tmp, &dev->regs->ctl); udc_basic_init()
1549 ep->dma = &dev->regs->ctl; udc_setup_endpoints()
1555 reg = readl(&dev->ep[tmp].regs->ctl); udc_setup_endpoints()
1557 writel(reg, &dev->ep[tmp].regs->ctl); udc_setup_endpoints()
1706 tmp = readl(&udc->regs->ctl); udc_timer_function()
1708 writel(tmp, &udc->regs->ctl); udc_timer_function()
1748 tmp = readl(&ep->regs->ctl); udc_handle_halt_state()
1761 writel(tmp, &ep->regs->ctl);*/ udc_handle_halt_state()
1765 writel(tmp, &ep->regs->ctl); udc_handle_halt_state()
1814 tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); activate_control_endpoints()
1816 writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); activate_control_endpoints()
1879 tmp = readl(&dev->regs->ctl); activate_control_endpoints()
1887 writel(tmp, &dev->regs->ctl); activate_control_endpoints()
1891 tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); activate_control_endpoints()
1893 writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl); activate_control_endpoints()
1898 tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl); activate_control_endpoints()
1900 writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl); activate_control_endpoints()
1937 tmp = readl(&dev->regs->ctl); amd5536_udc_start()
1939 writel(tmp, &dev->regs->ctl); amd5536_udc_start()
1978 tmp = readl(&dev->regs->ctl); amd5536_udc_stop()
1980 writel(tmp, &dev->regs->ctl); amd5536_udc_stop()
1997 reg = readl(&dev->ep[tmp].regs->ctl); udc_process_cnak_queue()
1999 writel(reg, &dev->ep[tmp].regs->ctl); udc_process_cnak_queue()
2008 reg = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl); udc_process_cnak_queue()
2010 writel(reg, &dev->ep[UDC_EP0OUT_IX].regs->ctl); udc_process_cnak_queue()
2394 tmp = readl(&ep->regs->ctl); udc_data_in_isr()
2396 writel(tmp, &ep->regs->ctl); udc_data_in_isr()
2458 tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
2460 writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
2540 tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
2546 writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
2553 writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
2560 tmp = readl(&dev->ep[UDC_EP0OUT_IX].regs->ctl);
2562 writel(tmp, &dev->ep[UDC_EP0OUT_IX].regs->ctl);
2669 tmp = readl(&ep->regs->ctl); udc_control_in_isr()
2671 writel(tmp, &ep->regs->ctl); udc_control_in_isr()
2690 readl(&dev->ep[UDC_EP0IN_IX].regs->ctl); udc_control_in_isr()
2693 &dev->ep[UDC_EP0IN_IX].regs->ctl); udc_control_in_isr()
2785 tmp = readl(&ep->regs->ctl);
2787 writel(tmp, &ep->regs->ctl);
2844 tmp = readl(&ep->regs->ctl);
2846 writel(tmp, &ep->regs->ctl);
3109 dev->ep[UDC_EP0IN_IX].dma = &dev->regs->ctl; init_dma_pools()
3307 reg = readl(&dev->regs->ctl); udc_probe()
3309 writel(reg, &dev->regs->ctl); udc_probe()
3330 tmp = readl(&dev->regs->ctl); udc_remote_wakeup()
3332 writel(tmp, &dev->regs->ctl); udc_remote_wakeup()
3334 writel(tmp, &dev->regs->ctl); udc_remote_wakeup()
/linux-4.1.27/drivers/media/pci/saa7164/
H A Dsaa7164-encoder.c400 struct v4l2_control *ctl) vidioc_g_ctrl()
407 ctl->id, ctl->value); vidioc_g_ctrl()
409 switch (ctl->id) { vidioc_g_ctrl()
411 ctl->value = port->ctl_brightness; vidioc_g_ctrl()
414 ctl->value = port->ctl_contrast; vidioc_g_ctrl()
417 ctl->value = port->ctl_saturation; vidioc_g_ctrl()
420 ctl->value = port->ctl_hue; vidioc_g_ctrl()
423 ctl->value = port->ctl_sharpness; vidioc_g_ctrl()
426 ctl->value = port->ctl_volume; vidioc_g_ctrl()
436 struct v4l2_control *ctl) vidioc_s_ctrl()
444 ctl->id, ctl->value); vidioc_s_ctrl()
446 switch (ctl->id) { vidioc_s_ctrl()
448 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
449 port->ctl_brightness = ctl->value; vidioc_s_ctrl()
456 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
457 port->ctl_contrast = ctl->value; vidioc_s_ctrl()
463 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
464 port->ctl_saturation = ctl->value; vidioc_s_ctrl()
471 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
472 port->ctl_hue = ctl->value; vidioc_s_ctrl()
478 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
479 port->ctl_sharpness = ctl->value; vidioc_s_ctrl()
485 if ((ctl->value >= -83) && (ctl->value <= 24)) { vidioc_s_ctrl()
486 port->ctl_volume = ctl->value; vidioc_s_ctrl()
399 vidioc_g_ctrl(struct file *file, void *priv, struct v4l2_control *ctl) vidioc_g_ctrl() argument
435 vidioc_s_ctrl(struct file *file, void *priv, struct v4l2_control *ctl) vidioc_s_ctrl() argument
H A Dsaa7164-vbi.c372 struct v4l2_control *ctl) vidioc_g_ctrl()
379 ctl->id, ctl->value); vidioc_g_ctrl()
381 switch (ctl->id) { vidioc_g_ctrl()
383 ctl->value = port->ctl_brightness; vidioc_g_ctrl()
386 ctl->value = port->ctl_contrast; vidioc_g_ctrl()
389 ctl->value = port->ctl_saturation; vidioc_g_ctrl()
392 ctl->value = port->ctl_hue; vidioc_g_ctrl()
395 ctl->value = port->ctl_sharpness; vidioc_g_ctrl()
398 ctl->value = port->ctl_volume; vidioc_g_ctrl()
408 struct v4l2_control *ctl) vidioc_s_ctrl()
416 ctl->id, ctl->value); vidioc_s_ctrl()
418 switch (ctl->id) { vidioc_s_ctrl()
420 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
421 port->ctl_brightness = ctl->value; vidioc_s_ctrl()
428 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
429 port->ctl_contrast = ctl->value; vidioc_s_ctrl()
435 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
436 port->ctl_saturation = ctl->value; vidioc_s_ctrl()
443 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
444 port->ctl_hue = ctl->value; vidioc_s_ctrl()
450 if ((ctl->value >= 0) && (ctl->value <= 255)) { vidioc_s_ctrl()
451 port->ctl_sharpness = ctl->value; vidioc_s_ctrl()
457 if ((ctl->value >= -83) && (ctl->value <= 24)) { vidioc_s_ctrl()
458 port->ctl_volume = ctl->value; vidioc_s_ctrl()
371 vidioc_g_ctrl(struct file *file, void *priv, struct v4l2_control *ctl) vidioc_g_ctrl() argument
407 vidioc_s_ctrl(struct file *file, void *priv, struct v4l2_control *ctl) vidioc_s_ctrl() argument
H A Dsaa7164-api.c368 int saa7164_api_set_usercontrol(struct saa7164_port *port, u8 ctl) saa7164_api_set_usercontrol() argument
374 if (ctl == PU_BRIGHTNESS_CONTROL) saa7164_api_set_usercontrol()
377 if (ctl == PU_CONTRAST_CONTROL) saa7164_api_set_usercontrol()
380 if (ctl == PU_HUE_CONTROL) saa7164_api_set_usercontrol()
383 if (ctl == PU_SATURATION_CONTROL) saa7164_api_set_usercontrol()
386 if (ctl == PU_SHARPNESS_CONTROL) saa7164_api_set_usercontrol()
391 dprintk(DBGLVL_ENC, "%s() unitid=0x%x ctl=%d, val=%d\n", saa7164_api_set_usercontrol()
392 __func__, port->encunit.vsourceid, ctl, val); saa7164_api_set_usercontrol()
395 ctl, sizeof(u16), &val); saa7164_api_set_usercontrol()
402 int saa7164_api_get_usercontrol(struct saa7164_port *port, u8 ctl) saa7164_api_get_usercontrol() argument
409 ctl, sizeof(u16), &val); saa7164_api_get_usercontrol()
415 dprintk(DBGLVL_ENC, "%s() ctl=%d, val=%d\n", saa7164_api_get_usercontrol()
416 __func__, ctl, val); saa7164_api_get_usercontrol()
418 if (ctl == PU_BRIGHTNESS_CONTROL) saa7164_api_get_usercontrol()
421 if (ctl == PU_CONTRAST_CONTROL) saa7164_api_get_usercontrol()
424 if (ctl == PU_HUE_CONTROL) saa7164_api_get_usercontrol()
427 if (ctl == PU_SATURATION_CONTROL) saa7164_api_get_usercontrol()
430 if (ctl == PU_SHARPNESS_CONTROL) saa7164_api_get_usercontrol()
/linux-4.1.27/include/linux/
H A Di2c-algo-pcf.h31 void (*setpcf) (void *data, int ctl, int val);
32 int (*getpcf) (void *data, int ctl);
H A Dsocket.h90 #define __CMSG_NXTHDR(ctl, len, cmsg) __cmsg_nxthdr((ctl),(len),(cmsg))
99 #define __CMSG_FIRSTHDR(ctl,len) ((len) >= sizeof(struct cmsghdr) ? \
100 (struct cmsghdr *)(ctl) : \
/linux-4.1.27/drivers/media/usb/dvb-usb/
H A Dtechnisat-usb2.c515 struct stv6110x_devctl *ctl; technisat_usb2_frontend_attach() local
517 ctl = dvb_attach(stv6110x_attach, technisat_usb2_frontend_attach()
522 if (ctl) { technisat_usb2_frontend_attach()
523 technisat_usb2_stv090x_config.tuner_init = ctl->tuner_init; technisat_usb2_frontend_attach()
524 technisat_usb2_stv090x_config.tuner_sleep = ctl->tuner_sleep; technisat_usb2_frontend_attach()
525 technisat_usb2_stv090x_config.tuner_set_mode = ctl->tuner_set_mode; technisat_usb2_frontend_attach()
526 technisat_usb2_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency; technisat_usb2_frontend_attach()
527 technisat_usb2_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency; technisat_usb2_frontend_attach()
528 technisat_usb2_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth; technisat_usb2_frontend_attach()
529 technisat_usb2_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth; technisat_usb2_frontend_attach()
530 technisat_usb2_stv090x_config.tuner_set_bbgain = ctl->tuner_set_bbgain; technisat_usb2_frontend_attach()
531 technisat_usb2_stv090x_config.tuner_get_bbgain = ctl->tuner_get_bbgain; technisat_usb2_frontend_attach()
532 technisat_usb2_stv090x_config.tuner_set_refclk = ctl->tuner_set_refclk; technisat_usb2_frontend_attach()
533 technisat_usb2_stv090x_config.tuner_get_status = ctl->tuner_get_status; technisat_usb2_frontend_attach()
/linux-4.1.27/arch/powerpc/sysdev/
H A Dfsl_85xx_l2ctlr.c127 clrsetbits_be32(&l2ctlr->ctl, L2CR_L2E, L2CR_L2FI); mpc85xx_l2ctlr_of_probe()
131 setbits32(&l2ctlr->ctl, mpc85xx_l2ctlr_of_probe()
136 setbits32(&l2ctlr->ctl, mpc85xx_l2ctlr_of_probe()
141 setbits32(&l2ctlr->ctl, mpc85xx_l2ctlr_of_probe()
147 setbits32(&l2ctlr->ctl, mpc85xx_l2ctlr_of_probe()
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
H A Dar9003_wow.c71 u32 ctl[13] = {0}; ath9k_wow_create_keep_alive_pattern() local
80 ctl[0] = (KAL_FRAME_LEN | (MAX_RATE_POWER << 16)); ath9k_wow_create_keep_alive_pattern()
81 ctl[1] = 0; ath9k_wow_create_keep_alive_pattern()
82 ctl[4] = 0; ath9k_wow_create_keep_alive_pattern()
83 ctl[7] = (ah->txchainmask) << 2; ath9k_wow_create_keep_alive_pattern()
84 ctl[2] = 0xf << 16; /* tx_tries 0 */ ath9k_wow_create_keep_alive_pattern()
87 ctl[3] = 0x1b; /* CCK_1M */ ath9k_wow_create_keep_alive_pattern()
89 ctl[3] = 0xb; /* OFDM_6M */ ath9k_wow_create_keep_alive_pattern()
92 REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]); ath9k_wow_create_keep_alive_pattern()
H A Deeprom.c287 twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl); ath9k_hw_get_max_edge_power()
294 CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) { ath9k_hw_get_max_edge_power()
296 CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl); ath9k_hw_get_max_edge_power()
H A Dar9003_mac.h40 /* ctl 12 */
/linux-4.1.27/drivers/tty/serial/
H A Dbcm63xx_uart.c206 static void bcm_uart_break_ctl(struct uart_port *port, int ctl) bcm_uart_break_ctl() argument
214 if (ctl) bcm_uart_break_ctl()
508 unsigned int ctl, baud, quot, ier; bcm_uart_set_termios() local
518 ctl = bcm_uart_readl(port, UART_CTL_REG); bcm_uart_set_termios()
519 ctl &= ~UART_CTL_BITSPERSYM_MASK; bcm_uart_set_termios()
523 ctl |= (0 << UART_CTL_BITSPERSYM_SHIFT); bcm_uart_set_termios()
526 ctl |= (1 << UART_CTL_BITSPERSYM_SHIFT); bcm_uart_set_termios()
529 ctl |= (2 << UART_CTL_BITSPERSYM_SHIFT); bcm_uart_set_termios()
532 ctl |= (3 << UART_CTL_BITSPERSYM_SHIFT); bcm_uart_set_termios()
536 ctl &= ~UART_CTL_STOPBITS_MASK; bcm_uart_set_termios()
538 ctl |= UART_CTL_STOPBITS_2; bcm_uart_set_termios()
540 ctl |= UART_CTL_STOPBITS_1; bcm_uart_set_termios()
542 ctl &= ~(UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK); bcm_uart_set_termios()
544 ctl |= (UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK); bcm_uart_set_termios()
545 ctl &= ~(UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK); bcm_uart_set_termios()
547 ctl |= (UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK); bcm_uart_set_termios()
548 bcm_uart_writel(port, ctl, UART_CTL_REG); bcm_uart_set_termios()
H A Dtimbuart.c84 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | timbuart_flush_buffer() local
87 iowrite8(ctl, port->membase + TIMBUART_CTRL); timbuart_flush_buffer()
170 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | timbuart_handle_rx_port() local
172 iowrite8(ctl, port->membase + TIMBUART_CTRL); timbuart_handle_rx_port()
247 static void timbuart_break_ctl(struct uart_port *port, int ctl) timbuart_break_ctl() argument
/linux-4.1.27/arch/c6x/platforms/
H A Ddscr.c96 struct devstate_ctl_reg *ctl; member in struct:devstate_info
192 struct devstate_ctl_reg *ctl; dscr_set_devstate() local
206 ctl = info->ctl; dscr_set_devstate()
209 if (ctl == NULL) dscr_set_devstate()
212 ctl_shift = ctl->shift + ctl->nbits * (id - ctl->start_id); dscr_set_devstate()
213 ctl_mask = ((1 << ctl->nbits) - 1) << ctl_shift; dscr_set_devstate()
217 ctl_val = ctl->enable << ctl_shift; dscr_set_devstate()
220 if (ctl->enable_only) dscr_set_devstate()
222 ctl_val = ctl->disable << ctl_shift; dscr_set_devstate()
230 val = soc_readl(dscr.base + ctl->reg); dscr_set_devstate()
234 dscr_write(ctl->reg, val); dscr_set_devstate()
454 * The layout of these bitfields is described by the ti,dscr-devstate-ctl-regs
476 p = of_get_property(node, "ti,dscr-devstate-ctl-regs", &size); dscr_parse_devstate_ctl_regs()
499 dscr.devstate_info[j].ctl = r; dscr_parse_devstate_ctl_regs()
/linux-4.1.27/drivers/vme/bridges/
H A Dvme_tsi148.c684 /* Write ctl reg without enable */ tsi148_slave_set()
704 unsigned int i, granularity = 0, ctl = 0; tsi148_slave_get() local
716 ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] + tsi148_slave_get()
743 if (ctl & TSI148_LCSR_ITAT_EN) tsi148_slave_get()
746 if ((ctl & TSI148_LCSR_ITAT_AS_M) == TSI148_LCSR_ITAT_AS_A16) { tsi148_slave_get()
750 if ((ctl & TSI148_LCSR_ITAT_AS_M) == TSI148_LCSR_ITAT_AS_A24) { tsi148_slave_get()
754 if ((ctl & TSI148_LCSR_ITAT_AS_M) == TSI148_LCSR_ITAT_AS_A32) { tsi148_slave_get()
758 if ((ctl & TSI148_LCSR_ITAT_AS_M) == TSI148_LCSR_ITAT_AS_A64) { tsi148_slave_get()
767 if ((ctl & TSI148_LCSR_ITAT_2eSSTM_M) == TSI148_LCSR_ITAT_2eSSTM_160) tsi148_slave_get()
769 if ((ctl & TSI148_LCSR_ITAT_2eSSTM_M) == TSI148_LCSR_ITAT_2eSSTM_267) tsi148_slave_get()
771 if ((ctl & TSI148_LCSR_ITAT_2eSSTM_M) == TSI148_LCSR_ITAT_2eSSTM_320) tsi148_slave_get()
774 if (ctl & TSI148_LCSR_ITAT_BLT) tsi148_slave_get()
776 if (ctl & TSI148_LCSR_ITAT_MBLT) tsi148_slave_get()
778 if (ctl & TSI148_LCSR_ITAT_2eVME) tsi148_slave_get()
780 if (ctl & TSI148_LCSR_ITAT_2eSST) tsi148_slave_get()
782 if (ctl & TSI148_LCSR_ITAT_2eSSTB) tsi148_slave_get()
785 if (ctl & TSI148_LCSR_ITAT_SUPR) tsi148_slave_get()
787 if (ctl & TSI148_LCSR_ITAT_NPRIV) tsi148_slave_get()
789 if (ctl & TSI148_LCSR_ITAT_PGM) tsi148_slave_get()
791 if (ctl & TSI148_LCSR_ITAT_DATA) tsi148_slave_get()
1107 /* Write ctl reg without enable */ tsi148_master_set()
1139 unsigned int i, ctl; __tsi148_master_get() local
1151 ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] + __tsi148_master_get()
1180 if (ctl & TSI148_LCSR_OTAT_EN) __tsi148_master_get()
1184 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_A16) __tsi148_master_get()
1186 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_A24) __tsi148_master_get()
1188 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_A32) __tsi148_master_get()
1190 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_A64) __tsi148_master_get()
1192 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_CRCSR) __tsi148_master_get()
1194 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_USER1) __tsi148_master_get()
1196 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_USER2) __tsi148_master_get()
1198 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_USER3) __tsi148_master_get()
1200 if ((ctl & TSI148_LCSR_OTAT_AMODE_M) == TSI148_LCSR_OTAT_AMODE_USER4) __tsi148_master_get()
1204 if ((ctl & TSI148_LCSR_OTAT_2eSSTM_M) == TSI148_LCSR_OTAT_2eSSTM_160) __tsi148_master_get()
1206 if ((ctl & TSI148_LCSR_OTAT_2eSSTM_M) == TSI148_LCSR_OTAT_2eSSTM_267) __tsi148_master_get()
1208 if ((ctl & TSI148_LCSR_OTAT_2eSSTM_M) == TSI148_LCSR_OTAT_2eSSTM_320) __tsi148_master_get()
1212 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_SCT) __tsi148_master_get()
1214 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_BLT) __tsi148_master_get()
1216 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_MBLT) __tsi148_master_get()
1218 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_2eVME) __tsi148_master_get()
1220 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_2eSST) __tsi148_master_get()
1222 if ((ctl & TSI148_LCSR_OTAT_TM_M) == TSI148_LCSR_OTAT_TM_2eSSTB) __tsi148_master_get()
1225 if (ctl & TSI148_LCSR_OTAT_SUP) __tsi148_master_get()
1230 if (ctl & TSI148_LCSR_OTAT_PGM) __tsi148_master_get()
1236 if ((ctl & TSI148_LCSR_OTAT_DBW_M) == TSI148_LCSR_OTAT_DBW_16) __tsi148_master_get()
1238 if ((ctl & TSI148_LCSR_OTAT_DBW_M) == TSI148_LCSR_OTAT_DBW_32) __tsi148_master_get()
H A Dvme_ca91cx42.c436 /* Write ctl reg without enable */ ca91cx42_slave_set()
451 unsigned int i, granularity = 0, ctl = 0; ca91cx42_slave_get() local
465 ctl = ioread32(bridge->base + CA91CX42_VSI_CTL[i]); ca91cx42_slave_get()
478 if (ctl & CA91CX42_VSI_CTL_EN) ca91cx42_slave_get()
481 if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A16) ca91cx42_slave_get()
483 if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A24) ca91cx42_slave_get()
485 if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A32) ca91cx42_slave_get()
487 if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_USER1) ca91cx42_slave_get()
489 if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_USER2) ca91cx42_slave_get()
492 if (ctl & CA91CX42_VSI_CTL_SUPER_SUPR) ca91cx42_slave_get()
494 if (ctl & CA91CX42_VSI_CTL_SUPER_NPRIV) ca91cx42_slave_get()
496 if (ctl & CA91CX42_VSI_CTL_PGM_PGM) ca91cx42_slave_get()
498 if (ctl & CA91CX42_VSI_CTL_PGM_DATA) ca91cx42_slave_get()
737 /* Write ctl reg without enable */ ca91cx42_master_set()
760 unsigned int i, ctl; __ca91cx42_master_get() local
768 ctl = ioread32(bridge->base + CA91CX42_LSI_CTL[i]); __ca91cx42_master_get()
782 if (ctl & CA91CX42_LSI_CTL_EN) __ca91cx42_master_get()
786 switch (ctl & CA91CX42_LSI_CTL_VAS_M) { __ca91cx42_master_get()
809 if (ctl & CA91CX42_LSI_CTL_VCT_BLT) __ca91cx42_master_get()
814 if (ctl & CA91CX42_LSI_CTL_SUPER_SUPR) __ca91cx42_master_get()
819 if (ctl & CA91CX42_LSI_CTL_PGM_PGM) __ca91cx42_master_get()
825 switch (ctl & CA91CX42_LSI_CTL_VDW_M) { __ca91cx42_master_get()
/linux-4.1.27/drivers/infiniband/hw/cxgb3/
H A Dcxio_dbg.c56 rc = rdev->t3cdev_p->ctl(rdev->t3cdev_p, RDMA_GET_MEM, m); cxio_dump_tpt()
94 rc = rdev->t3cdev_p->ctl(rdev->t3cdev_p, RDMA_GET_MEM, m); cxio_dump_pbl()
155 rc = rdev->t3cdev_p->ctl(rdev->t3cdev_p, RDMA_GET_MEM, m); cxio_dump_rqt()
188 rc = rdev->t3cdev_p->ctl(rdev->t3cdev_p, RDMA_GET_MEM, m); cxio_dump_tcb()
/linux-4.1.27/drivers/dma/ioat/
H A Dhw.h73 uint32_t ctl; member in union:ioat_dma_descriptor::__anon3854
107 uint32_t ctl; member in union:ioat_xor_descriptor::__anon3857
154 uint32_t ctl; member in union:ioat_pq_descriptor::__anon3861
203 uint32_t ctl; member in union:ioat_pq_update_descriptor::__anon3864
/linux-4.1.27/arch/tile/include/hv/
H A Ddrv_pcie_rc_intf.h30 * subsystem /ctl file at initialization
/linux-4.1.27/arch/powerpc/platforms/85xx/
H A Dxes_mpc85xx.c53 volatile uint32_t ctl, tmp; xes_mpc85xx_configure_l2() local
64 ctl = MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2I; xes_mpc85xx_configure_l2()
71 ctl |= (tmp & MPC85xx_L2CTL_L2SIZ_MASK) >> 2; xes_mpc85xx_configure_l2()
74 out_be32(l2_base, ctl); xes_mpc85xx_configure_l2()
/linux-4.1.27/arch/s390/pci/
H A Dpci_insn.c81 void zpci_set_irq_ctrl(u16 ctl, char *unused, u8 isc) zpci_set_irq_ctrl() argument
84 " .insn rsy,0xeb00000000d1,%[ctl],%[isc],%[u]\n" zpci_set_irq_ctrl()
85 : : [ctl] "d" (ctl), [isc] "d" (isc << 27), [u] "Q" (*unused)); zpci_set_irq_ctrl()
/linux-4.1.27/drivers/video/backlight/
H A Das3711_bl.c189 u8 ctl = 0; as3711_bl_init_su2() local
204 ctl = 1; as3711_bl_init_su2()
208 ctl = 4; as3711_bl_init_su2()
212 ctl = 0x10; as3711_bl_init_su2()
217 ctl = 2; as3711_bl_init_su2()
219 ctl |= 8; as3711_bl_init_su2()
221 ctl |= 0x20; as3711_bl_init_su2()
229 ret = regmap_write(as3711->regmap, AS3711_CURR_CONTROL, ctl); as3711_bl_init_su2()
/linux-4.1.27/drivers/gpu/drm/i915/
H A Dintel_panel.c859 u32 ctl, freq; i9xx_enable_backlight() local
861 ctl = I915_READ(BLC_PWM_CTL); i9xx_enable_backlight()
862 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { i9xx_enable_backlight()
871 ctl = freq << 17; i9xx_enable_backlight()
873 ctl |= BLM_LEGACY_MODE; i9xx_enable_backlight()
875 ctl |= BLM_POLARITY_PNV; i9xx_enable_backlight()
877 I915_WRITE(BLC_PWM_CTL, ctl); i9xx_enable_backlight()
898 u32 ctl, ctl2, freq; i965_enable_backlight() local
911 ctl = freq << 16; i965_enable_backlight()
912 I915_WRITE(BLC_PWM_CTL, ctl); i965_enable_backlight()
932 u32 ctl, ctl2; vlv_enable_backlight() local
944 ctl = panel->backlight.max << 16; vlv_enable_backlight()
945 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); vlv_enable_backlight() local
1211 u32 ctl, val; i9xx_setup_backlight() local
1213 ctl = I915_READ(BLC_PWM_CTL); i9xx_setup_backlight()
1216 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; i9xx_setup_backlight()
1219 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; i9xx_setup_backlight()
1221 panel->backlight.max = ctl >> 17; i9xx_setup_backlight()
1243 u32 ctl, ctl2, val; i965_setup_backlight() local
1249 ctl = I915_READ(BLC_PWM_CTL); i965_setup_backlight()
1250 panel->backlight.max = ctl >> 16; i965_setup_backlight()
1274 u32 ctl, ctl2, val; vlv_setup_backlight() local
1294 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1295 panel->backlight.max = ctl >> 16;
/linux-4.1.27/drivers/ata/
H A Dpata_mpiix.c158 int cmd, ctl, irq; mpiix_init_one() local
178 ctl = 0x3F6; mpiix_init_one()
182 ctl = 0x376; mpiix_init_one()
187 ctl_addr = devm_ioport_map(&dev->dev, ctl, 1); mpiix_init_one()
191 ata_port_desc(ap, "cmd 0x%x ctl 0x%x", cmd, ctl); mpiix_init_one()
H A Dpata_samsung_cf.c183 if (tf->ctl != ap->last_ctl) { pata_s3c_tf_load()
184 ata_outb(ap->host, tf->ctl, ioaddr->ctl_addr); pata_s3c_tf_load()
185 ap->last_ctl = tf->ctl; pata_s3c_tf_load()
226 ata_outb(ap->host, tf->ctl | ATA_HOB, ioaddr->ctl_addr); pata_s3c_tf_read()
232 ata_outb(ap->host, tf->ctl, ioaddr->ctl_addr); pata_s3c_tf_read()
233 ap->last_ctl = tf->ctl; pata_s3c_tf_read()
369 ata_outb(ap->host, ap->ctl, ioaddr->ctl_addr); pata_s3c_bus_softreset()
371 ata_outb(ap->host, ap->ctl | ATA_SRST, ioaddr->ctl_addr); pata_s3c_bus_softreset()
373 ata_outb(ap->host, ap->ctl, ioaddr->ctl_addr); pata_s3c_bus_softreset()
374 ap->last_ctl = ap->ctl; pata_s3c_bus_softreset()
415 static void pata_s3c_set_devctl(struct ata_port *ap, u8 ctl) pata_s3c_set_devctl() argument
417 ata_outb(ap->host, ctl, ap->ioaddr.ctl_addr); pata_s3c_set_devctl()
H A Dsata_vsc.c142 static void vsc_intr_mask_update(struct ata_port *ap, u8 ctl) vsc_intr_mask_update() argument
150 if (ctl & ATA_NIEN) vsc_intr_mask_update()
164 * The only thing the ctl register is used for is SRST. vsc_sata_tf_load()
169 if ((tf->ctl & ATA_NIEN) != (ap->last_ctl & ATA_NIEN)) { vsc_sata_tf_load()
170 ap->last_ctl = tf->ctl; vsc_sata_tf_load()
171 vsc_intr_mask_update(ap, tf->ctl & ATA_NIEN); vsc_sata_tf_load()
H A Dpata_ep93xx.c378 if (tf->ctl != ap->last_ctl) { ep93xx_pata_tf_load()
379 ep93xx_pata_write_reg(drv_data, tf->ctl, IDECTRL_ADDR_CTL); ep93xx_pata_tf_load()
380 ap->last_ctl = tf->ctl; ep93xx_pata_tf_load()
427 ep93xx_pata_write_reg(drv_data, tf->ctl | ATA_HOB, ep93xx_pata_tf_read()
439 ep93xx_pata_write_reg(drv_data, tf->ctl, IDECTRL_ADDR_CTL); ep93xx_pata_tf_read()
440 ap->last_ctl = tf->ctl; ep93xx_pata_tf_read()
469 static void ep93xx_pata_set_devctl(struct ata_port *ap, u8 ctl) ep93xx_pata_set_devctl() argument
473 ep93xx_pata_write_reg(drv_data, ctl, IDECTRL_ADDR_CTL); ep93xx_pata_set_devctl()
616 ep93xx_pata_write_reg(drv_data, ap->ctl, IDECTRL_ADDR_CTL); ep93xx_pata_bus_softreset()
618 ep93xx_pata_write_reg(drv_data, ap->ctl | ATA_SRST, IDECTRL_ADDR_CTL); ep93xx_pata_bus_softreset()
620 ep93xx_pata_write_reg(drv_data, ap->ctl, IDECTRL_ADDR_CTL); ep93xx_pata_bus_softreset()
621 ap->last_ctl = ap->ctl; ep93xx_pata_bus_softreset()
H A Dsata_rcar.c276 static void sata_rcar_set_devctl(struct ata_port *ap, u8 ctl) sata_rcar_set_devctl() argument
278 iowrite32(ctl, ap->ioaddr.ctl_addr); sata_rcar_set_devctl()
330 iowrite32(ap->ctl, ioaddr->ctl_addr); sata_rcar_bus_softreset()
332 iowrite32(ap->ctl | ATA_SRST, ioaddr->ctl_addr); sata_rcar_bus_softreset()
334 iowrite32(ap->ctl, ioaddr->ctl_addr); sata_rcar_bus_softreset()
335 ap->last_ctl = ap->ctl; sata_rcar_bus_softreset()
375 if (tf->ctl != ap->last_ctl) { sata_rcar_tf_load()
376 iowrite32(tf->ctl, ioaddr->ctl_addr); sata_rcar_tf_load()
377 ap->last_ctl = tf->ctl; sata_rcar_tf_load()
430 iowrite32(tf->ctl | ATA_HOB, ioaddr->ctl_addr); sata_rcar_tf_read()
436 iowrite32(tf->ctl, ioaddr->ctl_addr); sata_rcar_tf_read()
437 ap->last_ctl = tf->ctl; sata_rcar_tf_read()
H A Dlibata-sff.c117 * when finding an IRQ source. Non ctl capable devices don't
143 * If we have an mmio device with no ctl and no altstatus
163 * If we have an mmio device with no ctl and no altstatus
193 /* There are no DMA controllers without ctl. BUG here to ensure ata_sff_dma_pause()
286 * @ctl: value to write
296 static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl) ata_sff_set_devctl() argument
299 ap->ops->sff_set_devctl(ap, ctl); ata_sff_set_devctl()
301 iowrite8(ctl, ap->ioaddr.ctl_addr); ata_sff_set_devctl()
391 ap->ctl &= ~ATA_NIEN; ata_sff_irq_on()
392 ap->last_ctl = ap->ctl; ata_sff_irq_on()
395 ata_sff_set_devctl(ap, ap->ctl); ata_sff_irq_on()
418 if (tf->ctl != ap->last_ctl) { ata_sff_tf_load()
420 iowrite8(tf->ctl, ioaddr->ctl_addr); ata_sff_tf_load()
421 ap->last_ctl = tf->ctl; ata_sff_tf_load()
490 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr); ata_sff_tf_read()
496 iowrite8(tf->ctl, ioaddr->ctl_addr); ata_sff_tf_read()
497 ap->last_ctl = tf->ctl; ata_sff_tf_read()
1737 ap->ctl |= ATA_NIEN; ata_sff_freeze()
1738 ap->last_ctl = ap->ctl; ata_sff_freeze()
1741 ata_sff_set_devctl(ap, ap->ctl); ata_sff_freeze()
2015 iowrite8(ap->ctl, ioaddr->ctl_addr); ata_bus_softreset()
2017 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); ata_bus_softreset()
2019 iowrite8(ap->ctl, ioaddr->ctl_addr); ata_bus_softreset()
2020 ap->last_ctl = ap->ctl; ata_bus_softreset()
2147 ata_sff_set_devctl(ap, ap->ctl); ata_sff_postreset()
2148 ap->last_ctl = ap->ctl; ata_sff_postreset()
2337 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", ata_pci_sff_init_host()
3321 ap->ctl = ATA_DEVCTL_OBS; ata_sff_port_init()
H A Dpata_octeon_cf.c414 iowrite8(tf->ctl | ATA_HOB, ap->ioaddr.ctl_addr); octeon_cf_tf_read16()
427 iowrite8(tf->ctl, ap->ioaddr.ctl_addr); octeon_cf_tf_read16()
428 ap->last_ctl = tf->ctl; octeon_cf_tf_read16()
453 __raw_writew(ap->ctl, base + 0xe); octeon_cf_softreset16()
455 __raw_writew(ap->ctl | ATA_SRST, base + 0xe); octeon_cf_softreset16()
457 __raw_writew(ap->ctl, base + 0xe); octeon_cf_softreset16()
482 if (tf->ctl != ap->last_ctl) { octeon_cf_tf_load16()
483 iowrite8(tf->ctl, ap->ioaddr.ctl_addr); octeon_cf_tf_load16()
484 ap->last_ctl = tf->ctl; octeon_cf_tf_load16()
1010 ata_port_desc(ap, "cmd %p ctl %p", base, ap->ioaddr.ctl_addr); octeon_cf_probe()
H A Dpata_ns87415.c276 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr); ns87560_tf_read()
282 iowrite8(tf->ctl, ioaddr->ctl_addr); ns87560_tf_read()
283 ap->last_ctl = tf->ctl; ns87560_tf_read()
H A Dacard-ahci.c133 u32 ctl; acard_ahci_pci_device_suspend() local
147 ctl = readl(mmio + HOST_CTL); acard_ahci_pci_device_suspend()
148 ctl &= ~HOST_IRQ_EN; acard_ahci_pci_device_suspend()
149 writel(ctl, mmio + HOST_CTL); acard_ahci_pci_device_suspend()
H A Dpata_isapnp.c91 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", isapnp_init_one()
H A Dsata_promise.h85 buf[15] = tf->ctl; pdc_pkt_header()
/linux-4.1.27/drivers/watchdog/
H A Dvia_wdt.c77 unsigned int ctl = readl(wdt_mem); wdt_reset() local
79 writel(ctl | VIA_WDT_TRIGGER, wdt_mem); wdt_reset()
110 unsigned int ctl = readl(wdt_mem); wdt_start() local
113 writel(ctl | VIA_WDT_RUNNING | VIA_WDT_TRIGGER, wdt_mem); wdt_start()
121 unsigned int ctl = readl(wdt_mem); wdt_stop() local
123 writel(ctl & ~VIA_WDT_RUNNING, wdt_mem); wdt_stop()
H A Dbcm_kona_wdt.c119 int ctl, cur, ctl_sec, cur_sec, res; bcm_kona_wdt_dbg_show() local
121 ctl = ctl_val & SECWDOG_COUNT_MASK; bcm_kona_wdt_dbg_show()
124 ctl_sec = TICKS_TO_SECS(ctl, wdt); bcm_kona_wdt_dbg_show()
132 ctl_sec, ctl, ctl, bcm_kona_wdt_dbg_show()
/linux-4.1.27/drivers/media/pci/cx88/
H A Dcx88-tvaudio.c136 static void set_audio_finish(struct cx88_core *core, u32 ctl) set_audio_finish() argument
155 ctl |= EN_DAC_ENABLE; set_audio_finish()
156 cx_write(AUD_CTL, ctl); set_audio_finish()
825 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n", cx88_get_stereo()
884 u32 ctl = UNSET; cx88_set_stereo() local
945 ctl = EN_A2_FORCE_MONO1; cx88_set_stereo()
948 ctl = EN_A2_FORCE_MONO2; cx88_set_stereo()
952 ctl = EN_A2_FORCE_STEREO; cx88_set_stereo()
961 ctl = EN_FMRADIO_FORCE_MONO; cx88_set_stereo()
965 ctl = EN_FMRADIO_AUTO_STEREO; cx88_set_stereo()
978 if (UNSET != ctl) { cx88_set_stereo()
979 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x " cx88_set_stereo()
980 "[status=0x%x,ctl=0x%x,vol=0x%x]\n", cx88_set_stereo()
981 mask, ctl, cx_read(AUD_STATUS), cx88_set_stereo()
983 cx_andor(AUD_CTL, mask, ctl); cx88_set_stereo()
H A Dcx88-cards.c3365 void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl) cx88_setup_xc3028() argument
3367 memset(ctl, 0, sizeof(*ctl)); cx88_setup_xc3028()
3369 ctl->fname = XC2028_DEFAULT_FIRMWARE; cx88_setup_xc3028()
3370 ctl->max_len = 64; cx88_setup_xc3028()
3380 ctl->demod = XC3028_FE_ZARLINK456; cx88_setup_xc3028()
3384 ctl->demod = XC3028_FE_OREN538; cx88_setup_xc3028()
3392 ctl->disable_power_mgmt = 1; cx88_setup_xc3028()
3403 ctl->demod = XC3028_FE_ZARLINK456; cx88_setup_xc3028()
3404 ctl->mts = 1; cx88_setup_xc3028()
3407 ctl->demod = XC3028_FE_OREN538; cx88_setup_xc3028()
3408 ctl->mts = 1; cx88_setup_xc3028()
3520 struct tea5767_ctrl ctl; cx88_card_setup() local
3522 memset(&ctl, 0, sizeof(ctl)); cx88_card_setup()
3524 ctl.high_cut = 1; cx88_card_setup()
3525 ctl.st_noise = 1; cx88_card_setup()
3526 ctl.deemph_75 = 1; cx88_card_setup()
3527 ctl.xtal_freq = TEA5767_HIGH_LO_13MHz; cx88_card_setup()
3530 tea5767_cfg.priv = &ctl; cx88_card_setup()
3587 struct xc2028_ctrl ctl; cx88_card_setup() local
3590 cx88_setup_xc3028(core, &ctl); cx88_card_setup()
3595 xc2028_cfg.priv = &ctl; cx88_card_setup()
3597 ctl.fname); cx88_card_setup()
/linux-4.1.27/drivers/crypto/caam/
H A Dctrl.c631 ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
637 ctrlpriv->ctl, &perfmon->req_dequeued);
641 ctrlpriv->ctl, &perfmon->ob_enc_req);
645 ctrlpriv->ctl, &perfmon->ib_dec_req);
649 ctrlpriv->ctl, &perfmon->ob_enc_bytes);
653 ctrlpriv->ctl, &perfmon->ob_prot_bytes);
657 ctrlpriv->ctl, &perfmon->ib_dec_bytes);
661 ctrlpriv->ctl, &perfmon->ib_valid_bytes);
667 ctrlpriv->ctl, &perfmon->faultaddr);
671 ctrlpriv->ctl, &perfmon->faultdetail);
675 ctrlpriv->ctl, &perfmon->status);
683 ctrlpriv->ctl,
691 ctrlpriv->ctl,
699 ctrlpriv->ctl,
H A Dintern.h100 struct dentry *ctl; /* controller dir */ member in struct:caam_drv_private
/linux-4.1.27/drivers/media/pci/ngene/
H A Dngene-cards.c60 struct stv6110x_devctl *ctl; tuner_attach_stv6110() local
68 ctl = dvb_attach(stv6110x_attach, chan->fe, tunerconf, i2c); tuner_attach_stv6110()
69 if (ctl == NULL) { tuner_attach_stv6110()
74 feconf->tuner_init = ctl->tuner_init; tuner_attach_stv6110()
75 feconf->tuner_sleep = ctl->tuner_sleep; tuner_attach_stv6110()
76 feconf->tuner_set_mode = ctl->tuner_set_mode; tuner_attach_stv6110()
77 feconf->tuner_set_frequency = ctl->tuner_set_frequency; tuner_attach_stv6110()
78 feconf->tuner_get_frequency = ctl->tuner_get_frequency; tuner_attach_stv6110()
79 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth; tuner_attach_stv6110()
80 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth; tuner_attach_stv6110()
81 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain; tuner_attach_stv6110()
82 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain; tuner_attach_stv6110()
83 feconf->tuner_set_refclk = ctl->tuner_set_refclk; tuner_attach_stv6110()
84 feconf->tuner_get_status = ctl->tuner_get_status; tuner_attach_stv6110()
/linux-4.1.27/arch/s390/appldata/
H A Dappldata_base.c51 static int appldata_timer_handler(struct ctl_table *ctl, int write,
53 static int appldata_interval_handler(struct ctl_table *ctl, int write,
204 appldata_timer_handler(struct ctl_table *ctl, int write, appldata_timer_handler() argument
246 appldata_interval_handler(struct ctl_table *ctl, int write, appldata_interval_handler() argument
290 appldata_generic_handler(struct ctl_table *ctl, int write, appldata_generic_handler() argument
303 if (&tmp_ops->ctl_table[2] == ctl) { appldata_generic_handler()
311 ops = ctl->data; appldata_generic_handler()
/linux-4.1.27/drivers/net/ethernet/broadcom/
H A Dbgmac.c97 u32 ctl; bgmac_dma_tx_enable() local
99 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL); bgmac_dma_tx_enable()
101 ctl &= ~BGMAC_DMA_TX_BL_MASK; bgmac_dma_tx_enable()
102 ctl |= BGMAC_DMA_TX_BL_128 << BGMAC_DMA_TX_BL_SHIFT; bgmac_dma_tx_enable()
104 ctl &= ~BGMAC_DMA_TX_MR_MASK; bgmac_dma_tx_enable()
105 ctl |= BGMAC_DMA_TX_MR_2 << BGMAC_DMA_TX_MR_SHIFT; bgmac_dma_tx_enable()
107 ctl &= ~BGMAC_DMA_TX_PC_MASK; bgmac_dma_tx_enable()
108 ctl |= BGMAC_DMA_TX_PC_16 << BGMAC_DMA_TX_PC_SHIFT; bgmac_dma_tx_enable()
110 ctl &= ~BGMAC_DMA_TX_PT_MASK; bgmac_dma_tx_enable()
111 ctl |= BGMAC_DMA_TX_PT_8 << BGMAC_DMA_TX_PT_SHIFT; bgmac_dma_tx_enable()
113 ctl |= BGMAC_DMA_TX_ENABLE; bgmac_dma_tx_enable()
114 ctl |= BGMAC_DMA_TX_PARITY_DISABLE; bgmac_dma_tx_enable()
115 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, ctl); bgmac_dma_tx_enable()
314 u32 ctl; bgmac_dma_rx_enable() local
316 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL); bgmac_dma_rx_enable()
318 ctl &= ~BGMAC_DMA_RX_BL_MASK; bgmac_dma_rx_enable()
319 ctl |= BGMAC_DMA_RX_BL_128 << BGMAC_DMA_RX_BL_SHIFT; bgmac_dma_rx_enable()
321 ctl &= ~BGMAC_DMA_RX_PC_MASK; bgmac_dma_rx_enable()
322 ctl |= BGMAC_DMA_RX_PC_8 << BGMAC_DMA_RX_PC_SHIFT; bgmac_dma_rx_enable()
324 ctl &= ~BGMAC_DMA_RX_PT_MASK; bgmac_dma_rx_enable()
325 ctl |= BGMAC_DMA_RX_PT_1 << BGMAC_DMA_RX_PT_SHIFT; bgmac_dma_rx_enable()
327 ctl &= BGMAC_DMA_RX_ADDREXT_MASK; bgmac_dma_rx_enable()
328 ctl |= BGMAC_DMA_RX_ENABLE; bgmac_dma_rx_enable()
329 ctl |= BGMAC_DMA_RX_PARITY_DISABLE; bgmac_dma_rx_enable()
330 ctl |= BGMAC_DMA_RX_OVERFLOW_CONT; bgmac_dma_rx_enable()
331 ctl |= BGMAC_RX_FRAME_OFFSET << BGMAC_DMA_RX_FRAME_OFFSET_SHIFT; bgmac_dma_rx_enable()
332 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, ctl); bgmac_dma_rx_enable()
/linux-4.1.27/sound/pci/echoaudio/
H A Dechoaudio_3g.c73 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq, write_control_reg() argument
80 "WriteControlReg: Setting 0x%x, 0x%x\n", ctl, frq); write_control_reg()
82 ctl = cpu_to_le32(ctl); write_control_reg()
85 if (ctl != chip->comm_page->control_register || write_control_reg()
88 chip->comm_page->control_register = ctl; write_control_reg()
H A Decho3g_dsp.c39 static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
/linux-4.1.27/drivers/edac/
H A Dmv64x60_edac.c667 u32 ctl; mv64x60_init_csrows() local
671 ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG); mv64x60_init_csrows()
679 dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; mv64x60_init_csrows()
681 devtype = (ctl >> 20) & 0x3; mv64x60_init_csrows()
706 u32 ctl; mv64x60_mc_err_probe() local
761 ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG); mv64x60_mc_err_probe()
762 if (!(ctl & MV64X60_SDRAM_ECC)) { mv64x60_mc_err_probe()
788 ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL); mv64x60_mc_err_probe()
789 ctl = (ctl & 0xff00ffff) | 0x10000; mv64x60_mc_err_probe()
790 out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL, ctl); mv64x60_mc_err_probe()
H A Dedac_core.h58 #define edac_device_printk(ctl, level, fmt, arg...) \
59 printk(level "EDAC DEVICE%d: " fmt, ctl->dev_idx, ##arg)
61 #define edac_pci_printk(ctl, level, fmt, arg...) \
62 printk(level "EDAC PCI%d: " fmt, ctl->pci_idx, ##arg)
196 struct edac_device_ctl_info *ctl; /* Up pointer */ member in struct:edac_device_instance
291 /* To get from the instance's wq to the beginning of the ctl structure */
/linux-4.1.27/drivers/pcmcia/
H A Dricoh.h183 u16 config, ctl; ricoh_override() local
188 ctl = RL5C4XX_16CTL_IO_TIMING | RL5C4XX_16CTL_MEM_TIMING; ricoh_override()
191 ctl |= RL5C46X_16CTL_LEVEL_1 | RL5C46X_16CTL_LEVEL_2; ricoh_override()
196 config_writew(socket, RL5C4XX_16BIT_CTL, ctl); ricoh_override()
H A Dpxa2xx_stargate2.c65 /* sets power ctl register high */ sg2_pcmcia_configure_socket()
H A Dtcic.c736 u_short addr, ctl; tcic_set_mem_map() local
765 ctl = TCIC_MCTL_QUIET | (psock << TCIC_MCTL_SS_SHFT); tcic_set_mem_map()
766 ctl |= to_cycles(mem->speed) & TCIC_MCTL_WSCNT_MASK; tcic_set_mem_map()
767 ctl |= (mem->flags & MAP_16BIT) ? 0 : TCIC_MCTL_B8; tcic_set_mem_map()
768 ctl |= (mem->flags & MAP_WRPROT) ? TCIC_MCTL_WP : 0; tcic_set_mem_map()
769 ctl |= (mem->flags & MAP_ACTIVE) ? TCIC_MCTL_ENA : 0; tcic_set_mem_map()
771 tcic_setw(TCIC_DATA, ctl); tcic_set_mem_map()
/linux-4.1.27/arch/x86/kernel/cpu/mcheck/
H A Dmce-internal.h21 u64 ctl; /* subevents to enable */ member in struct:mce_bank
/linux-4.1.27/arch/um/drivers/
H A Ddaemon_kern.c68 .ctl_sock = "/tmp/uml.ctl" }); daemon_setup()
/linux-4.1.27/arch/mips/include/asm/mach-lantiq/xway/
H A Dxway_dma.h33 u32 ctl; member in struct:ltq_dma_desc
/linux-4.1.27/include/net/
H A Dtransp_v6.h35 /* this does all the common and the specific ctl work */
H A Dndisc.h213 int ndisc_ifinfo_sysctl_change(struct ctl_table *ctl, int write,
215 int ndisc_ifinfo_sysctl_strategy(struct ctl_table *ctl,
/linux-4.1.27/arch/s390/include/asm/
H A Dpci_insn.h84 void zpci_set_irq_ctrl(u16 ctl, char *unused, u8 isc);
/linux-4.1.27/arch/s390/mm/
H A Dcmm.c256 static int cmm_pages_handler(struct ctl_table *ctl, int write, cmm_pages_handler() argument
276 if (ctl == &cmm_table[0]) cmm_pages_handler()
281 if (ctl == &cmm_table[0]) cmm_pages_handler()
296 static int cmm_timeout_handler(struct ctl_table *ctl, int write, cmm_timeout_handler() argument
/linux-4.1.27/arch/blackfin/include/asm/
H A Dbfin5xx_spi.h54 __BFP(ctl);
/linux-4.1.27/arch/arm/mach-prima2/
H A Dsleep.S40 @ read the MEM ctl register and set the self
/linux-4.1.27/drivers/parport/
H A Dieee1284_ops.c49 unsigned char ctl = (PARPORT_CONTROL_SELECT parport_ieee1284_write_compat() local
58 parport_write_control (port, ctl); parport_ieee1284_write_compat()
127 parport_write_control (port, ctl | PARPORT_CONTROL_STROBE); parport_ieee1284_write_compat()
130 parport_write_control (port, ctl); parport_ieee1284_write_compat()
499 unsigned char ctl; parport_ieee1284_ecp_read_data()
512 ctl = parport_read_control (port); parport_ieee1284_ecp_read_data()
513 ctl &= ~(PARPORT_CONTROL_STROBE | PARPORT_CONTROL_INIT | parport_ieee1284_ecp_read_data()
516 ctl | PARPORT_CONTROL_AUTOFD); parport_ieee1284_ecp_read_data()
591 parport_write_control (port, ctl); parport_ieee1284_ecp_read_data()
610 ctl | PARPORT_CONTROL_AUTOFD); parport_ieee1284_ecp_read_data()
/linux-4.1.27/sound/usb/
H A Dmixer_scarlett.c145 /* some gui mixers can't handle negative ctl values */
852 const struct scarlett_mixer_control *ctl; scarlett_controls_create_generic() local
872 ctl = &info->controls[i]; scarlett_controls_create_generic()
874 switch (ctl->type) { scarlett_controls_create_generic()
876 err = add_output_ctls(mixer, ctl->num, ctl->name, info); scarlett_controls_create_generic()
881 sprintf(mx, "Input %d Impedance Switch", ctl->num); scarlett_controls_create_generic()
884 0x09, ctl->num, USB_MIXER_S16, 1, mx, scarlett_controls_create_generic()
890 sprintf(mx, "Input %d Pad Switch", ctl->num); scarlett_controls_create_generic()
893 0x0b, ctl->num, USB_MIXER_S16, 1, mx, scarlett_controls_create_generic()
/linux-4.1.27/drivers/spi/
H A Dspi-st-ssc4.c151 uint32_t ctl = 0; spi_st_transfer_one() local
174 ctl = readl_relaxed(spi_st->base + SSC_CTL); spi_st_transfer_one()
175 writel_relaxed((ctl | 0xf), spi_st->base + SSC_CTL); spi_st_transfer_one()
194 if (ctl) spi_st_transfer_one()
195 writel_relaxed(ctl, spi_st->base + SSC_CTL); spi_st_transfer_one()
H A Dspi-bfin5xx.c128 bfin_write_or(&drv_data->regs->ctl, BIT_CTL_ENABLE); bfin_spi_enable()
133 bfin_write_and(&drv_data->regs->ctl, ~BIT_CTL_ENABLE); bfin_spi_disable()
209 dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n"); bfin_spi_restore_state()
214 bfin_write(&drv_data->regs->ctl, chip->ctl_reg); bfin_spi_restore_state()
495 u16 cr = bfin_read(&drv_data->regs->ctl); bfin_spi_dma_irq_handler()
498 bfin_write(&drv_data->regs->ctl, cr & ~BIT_CTL_ENABLE); /* Disable SPI */ bfin_spi_dma_irq_handler()
499 bfin_write(&drv_data->regs->ctl, cr & ~BIT_CTL_TIMOD); /* Restore State */ bfin_spi_dma_irq_handler()
653 cr = bfin_read(&drv_data->regs->ctl) & ~(BIT_CTL_TIMOD | BIT_CTL_WORDSIZE); bfin_spi_pump_transfers()
655 bfin_write(&drv_data->regs->ctl, cr); bfin_spi_pump_transfers()
720 bfin_write(&drv_data->regs->ctl, cr | BIT_CTL_TIMOD_DMA_TX); bfin_spi_pump_transfers()
775 bfin_write(&drv_data->regs->ctl, cr); bfin_spi_pump_transfers()
789 bfin_write(&drv_data->regs->ctl, cr | BIT_CTL_TXMOD); bfin_spi_pump_transfers()
914 "%d, flag 0x%x, ctl 0x%x\n", bfin_spi_pump_messages()
1343 bfin_write(&drv_data->regs->ctl, BIT_CTL_CPHA | BIT_CTL_MASTER); bfin_spi_probe()
1416 drv_data->ctrl_reg = bfin_read(&drv_data->regs->ctl); bfin_spi_suspend()
1422 bfin_write(&drv_data->regs->ctl, BIT_CTL_CPHA | BIT_CTL_MASTER); bfin_spi_suspend()
1433 bfin_write(&drv_data->regs->ctl, drv_data->ctrl_reg); bfin_spi_resume()
H A Dspi-adi-v3.c113 u32 ctl; adi_spi_enable() local
115 ctl = ioread32(&drv_data->regs->control); adi_spi_enable()
116 ctl |= SPI_CTL_EN; adi_spi_enable()
117 iowrite32(ctl, &drv_data->regs->control); adi_spi_enable()
122 u32 ctl; adi_spi_disable() local
124 ctl = ioread32(&drv_data->regs->control); adi_spi_disable()
125 ctl &= ~SPI_CTL_EN; adi_spi_disable()
126 iowrite32(ctl, &drv_data->regs->control); adi_spi_disable()
/linux-4.1.27/drivers/media/dvb-frontends/
H A Ddrxd_firm.c57 0x65, 0x04, /* r0rami.dt -> ring.ctl; */
78 0xA5, 0x02, /* M_RC_CTR_SWAP | M_RC_CTR_READ -> ring.ctl; */
83 0x65, 0x02, /* M_RC_CTR_SWAP | M_RC_CTR_WRITE -> ring.ctl; */
86 0xA5, 0x02, /* M_RC_CTR_SWAP | M_RC_CTR_READ -> ring.ctl; */
90 0x65, 0x02, /* M_RC_CTR_SWAP | M_RC_CTR_WRITE -> ring.ctl; */
139 0xA5, 0x02, /* M_RC_CTR_SWAP | M_RC_CTR_READ -> ring.ctl; */
144 0x65, 0x02, /* M_RC_CTR_SWAP | M_RC_CTR_WRITE -> ring.ctl; */
147 0xA5, 0x02, /* M_RC_CTR_SWAP | M_RC_CTR_READ -> ring.ctl; */
151 0x65, 0x02, /* M_RC_CTR_SWAP | M_RC_CTR_WRITE -> ring.ctl; */
H A Dz0194a.h53 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
/linux-4.1.27/net/core/
H A Dneighbour.c2817 static int proc_unres_qlen(struct ctl_table *ctl, int write, proc_unres_qlen() argument
2821 struct ctl_table tmp = *ctl; proc_unres_qlen()
2827 size = *(int *)ctl->data / SKB_TRUESIZE(ETH_FRAME_LEN); proc_unres_qlen()
2831 *(int *)ctl->data = size * SKB_TRUESIZE(ETH_FRAME_LEN); proc_unres_qlen()
2864 static void neigh_proc_update(struct ctl_table *ctl, int write) neigh_proc_update() argument
2866 struct net_device *dev = ctl->extra1; neigh_proc_update()
2867 struct neigh_parms *p = ctl->extra2; neigh_proc_update()
2869 int index = (int *) ctl->data - p->data; neigh_proc_update()
2879 static int neigh_proc_dointvec_zero_intmax(struct ctl_table *ctl, int write, neigh_proc_dointvec_zero_intmax() argument
2883 struct ctl_table tmp = *ctl; neigh_proc_dointvec_zero_intmax()
2890 neigh_proc_update(ctl, write); neigh_proc_dointvec_zero_intmax()
2894 int neigh_proc_dointvec(struct ctl_table *ctl, int write, neigh_proc_dointvec() argument
2897 int ret = proc_dointvec(ctl, write, buffer, lenp, ppos); neigh_proc_dointvec()
2899 neigh_proc_update(ctl, write); neigh_proc_dointvec()
2904 int neigh_proc_dointvec_jiffies(struct ctl_table *ctl, int write, neigh_proc_dointvec_jiffies() argument
2908 int ret = proc_dointvec_jiffies(ctl, write, buffer, lenp, ppos); neigh_proc_dointvec_jiffies()
2910 neigh_proc_update(ctl, write); neigh_proc_dointvec_jiffies()
2915 static int neigh_proc_dointvec_userhz_jiffies(struct ctl_table *ctl, int write, neigh_proc_dointvec_userhz_jiffies() argument
2919 int ret = proc_dointvec_userhz_jiffies(ctl, write, buffer, lenp, ppos); neigh_proc_dointvec_userhz_jiffies()
2921 neigh_proc_update(ctl, write); neigh_proc_dointvec_userhz_jiffies()
2925 int neigh_proc_dointvec_ms_jiffies(struct ctl_table *ctl, int write, neigh_proc_dointvec_ms_jiffies() argument
2929 int ret = proc_dointvec_ms_jiffies(ctl, write, buffer, lenp, ppos); neigh_proc_dointvec_ms_jiffies()
2931 neigh_proc_update(ctl, write); neigh_proc_dointvec_ms_jiffies()
2936 static int neigh_proc_dointvec_unres_qlen(struct ctl_table *ctl, int write, neigh_proc_dointvec_unres_qlen() argument
2940 int ret = proc_unres_qlen(ctl, write, buffer, lenp, ppos); neigh_proc_dointvec_unres_qlen()
2942 neigh_proc_update(ctl, write); neigh_proc_dointvec_unres_qlen()
2946 static int neigh_proc_base_reachable_time(struct ctl_table *ctl, int write, neigh_proc_base_reachable_time() argument
2950 struct neigh_parms *p = ctl->extra2; neigh_proc_base_reachable_time()
2953 if (strcmp(ctl->procname, "base_reachable_time") == 0) neigh_proc_base_reachable_time()
2954 ret = neigh_proc_dointvec_jiffies(ctl, write, buffer, lenp, ppos); neigh_proc_base_reachable_time()
2955 else if (strcmp(ctl->procname, "base_reachable_time_ms") == 0) neigh_proc_base_reachable_time()
2956 ret = neigh_proc_dointvec_ms_jiffies(ctl, write, buffer, lenp, ppos); neigh_proc_base_reachable_time()
/linux-4.1.27/sound/isa/sb/
H A Dsb_mixer.c494 struct snd_kcontrol *ctl; snd_sbmixer_add_ctl() local
497 ctl = snd_ctl_new1(&newctls[type], chip); snd_sbmixer_add_ctl()
498 if (! ctl) snd_sbmixer_add_ctl()
500 strlcpy(ctl->id.name, name, sizeof(ctl->id.name)); snd_sbmixer_add_ctl()
501 ctl->id.index = index; snd_sbmixer_add_ctl()
502 ctl->private_value = value; snd_sbmixer_add_ctl()
503 if ((err = snd_ctl_add(chip->card, ctl)) < 0) snd_sbmixer_add_ctl()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb3/
H A Dt3cdev.h60 int (*ctl)(struct t3cdev *dev, unsigned int req, void *data); member in struct:t3cdev
/linux-4.1.27/drivers/media/usb/stk1160/
H A Dstk1160-core.c133 static const struct regval ctl[] = { stk1160_reg_reset() local
157 for (i = 0; ctl[i].reg != 0xffff; i++) stk1160_reg_reset()
158 stk1160_write_reg(dev, ctl[i].reg, ctl[i].val); stk1160_reg_reset()
/linux-4.1.27/arch/sparc/include/asm/
H A Dsbi.h15 /* 0x0004 */ u32 ctl; /* Control */ member in struct:sbi_regs
/linux-4.1.27/arch/mips/include/asm/mach-rc32434/
H A Drb.h64 u32 ctl; member in struct:dev_reg
/linux-4.1.27/include/uapi/linux/
H A Dshm.h57 /* ipcs ctl commands */
H A Dmsg.h6 /* ipcs ctl commands */
H A Dsem.h18 /* ipcs ctl cmds */
/linux-4.1.27/net/ipv6/
H A Dndisc.c1684 static void ndisc_warn_deprecated_sysctl(struct ctl_table *ctl, ndisc_warn_deprecated_sysctl() argument
1693 dev_name, ctl->procname, ndisc_warn_deprecated_sysctl()
1694 dev_name, ctl->procname); ndisc_warn_deprecated_sysctl()
1699 int ndisc_ifinfo_sysctl_change(struct ctl_table *ctl, int write, void __user *buffer, size_t *lenp, loff_t *ppos) ndisc_ifinfo_sysctl_change() argument
1701 struct net_device *dev = ctl->extra1; ndisc_ifinfo_sysctl_change()
1705 if ((strcmp(ctl->procname, "retrans_time") == 0) || ndisc_ifinfo_sysctl_change()
1706 (strcmp(ctl->procname, "base_reachable_time") == 0)) ndisc_ifinfo_sysctl_change()
1707 ndisc_warn_deprecated_sysctl(ctl, "syscall", dev ? dev->name : "default"); ndisc_ifinfo_sysctl_change()
1709 if (strcmp(ctl->procname, "retrans_time") == 0) ndisc_ifinfo_sysctl_change()
1710 ret = neigh_proc_dointvec(ctl, write, buffer, lenp, ppos); ndisc_ifinfo_sysctl_change()
1712 else if (strcmp(ctl->procname, "base_reachable_time") == 0) ndisc_ifinfo_sysctl_change()
1713 ret = neigh_proc_dointvec_jiffies(ctl, write, ndisc_ifinfo_sysctl_change()
1716 else if ((strcmp(ctl->procname, "retrans_time_ms") == 0) || ndisc_ifinfo_sysctl_change()
1717 (strcmp(ctl->procname, "base_reachable_time_ms") == 0)) ndisc_ifinfo_sysctl_change()
1718 ret = neigh_proc_dointvec_ms_jiffies(ctl, write, ndisc_ifinfo_sysctl_change()
1724 if (ctl->data == &NEIGH_VAR(idev->nd_parms, BASE_REACHABLE_TIME)) ndisc_ifinfo_sysctl_change()
/linux-4.1.27/drivers/media/platform/blackfin/
H A Dppi.c154 bfin_write32(&reg->ctl, ppi->ppi_control); ppi_start()
187 bfin_write32(&reg->ctl, ppi->ppi_control); ppi_stop()
275 bfin_write32(&reg->ctl, ppi->ppi_control); ppi_set_params()
/linux-4.1.27/drivers/net/ethernet/smsc/
H A Dsmc91x.c254 unsigned int ctl, cfg; smc_reset() local
322 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE; smc_reset()
330 ctl |= CTL_AUTO_RELEASE; smc_reset()
332 ctl &= ~CTL_AUTO_RELEASE; smc_reset()
333 SMC_SET_CTL(lp, ctl); smc_reset()
596 * Send the packet length (+6 for status words, length, and ctl. smc_hardware_send_pkt()
604 /* Send final ctl word with the last byte if there is one */ smc_hardware_send_pkt()
658 * words, length and ctl) smc_hard_start_xmit()
660 * If odd size then last byte is included in ctl word. smc_hard_start_xmit()
1196 unsigned int ctl; smc_eph_interrupt() local
1201 ctl = SMC_GET_CTL(lp); smc_eph_interrupt()
1202 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE); smc_eph_interrupt()
1203 SMC_SET_CTL(lp, ctl); smc_eph_interrupt()
1636 u16 ctl; smc_write_eeprom_word() local
1649 ctl = SMC_GET_CTL(lp); smc_write_eeprom_word()
1650 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE)); smc_write_eeprom_word()
1656 SMC_SET_CTL(lp, ctl); smc_write_eeprom_word()
1664 u16 ctl; smc_read_eeprom_word() local
1675 ctl = SMC_GET_CTL(lp); smc_read_eeprom_word()
1676 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD)); smc_read_eeprom_word()
1684 SMC_SET_CTL(lp, ctl); smc_read_eeprom_word()
/linux-4.1.27/drivers/idle/
H A Di7300_idle.c144 static int __init i7300_idle_ioat_selftest(u8 *ctl, i7300_idle_ioat_selftest() argument
153 desc[0].ctl = 0; i7300_idle_ioat_selftest()
254 ioat_desc[0].ctl = IOAT_DESC_SADDR_SNP_CTL | IOAT_DESC_DADDR_SNP_CTL; i7300_idle_ioat_init()
260 ioat_desc[1].ctl = ioat_desc[0].ctl; i7300_idle_ioat_init()
/linux-4.1.27/drivers/media/usb/tm6000/
H A Dtm6000-cards.c932 struct xc2028_ctrl ctl; tm6000_config_tuner() local
935 memset(&ctl, 0, sizeof(ctl)); tm6000_config_tuner()
937 ctl.demod = XC3028_FE_ZARLINK456; tm6000_config_tuner()
940 xc2028_cfg.priv = &ctl; tm6000_config_tuner()
946 ctl.max_len = 80; tm6000_config_tuner()
947 ctl.fname = "xc3028L-v36.fw"; tm6000_config_tuner()
951 ctl.fname = "xc3028-v27.fw"; tm6000_config_tuner()
953 ctl.fname = "xc3028-v24.fw"; tm6000_config_tuner()
965 struct xc5000_config ctl = { tm6000_config_tuner() local
972 xc5000_cfg.priv = &ctl; tm6000_config_tuner()
/linux-4.1.27/arch/x86/kernel/cpu/
H A Dperf_event_intel_pt.c192 u64 ctl; pt_is_running() local
194 rdmsrl(MSR_IA32_RTIT_CTL, ctl); pt_is_running()
196 return !!(ctl & RTIT_CTL_TRACEEN); pt_is_running()
217 u64 ctl; pt_config_start() local
219 rdmsrl(MSR_IA32_RTIT_CTL, ctl); pt_config_start()
221 ctl |= RTIT_CTL_TRACEEN; pt_config_start()
223 ctl &= ~RTIT_CTL_TRACEEN; pt_config_start()
224 wrmsrl(MSR_IA32_RTIT_CTL, ctl); pt_config_start()
1068 u64 ctl; for_each_online_cpu() local
1070 ret = rdmsrl_safe_on_cpu(cpu, MSR_IA32_RTIT_CTL, &ctl); for_each_online_cpu()
1071 if (!ret && (ctl & RTIT_CTL_TRACEEN)) for_each_online_cpu()
/linux-4.1.27/drivers/net/ethernet/
H A Dlantiq_etop.c124 ch->dma.desc_base[ch->dma.desc].ctl = ltq_etop_alloc_skb()
137 int len = (desc->ctl & LTQ_DMA_SIZE_MASK) - MAX_DMA_CRC_LEN; ltq_etop_hw_receive()
166 if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { ltq_etop_poll_rx()
191 while ((ch->dma.desc_base[ch->tx_free].ctl & ltq_etop_poll_tx()
531 if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) { ltq_etop_tx()
548 desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | ltq_etop_tx()
554 if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN) ltq_etop_tx()
/linux-4.1.27/drivers/media/pci/ddbridge/
H A Dddbridge-core.c693 struct stv6110x_devctl *ctl; tuner_attach_stv6110() local
695 ctl = dvb_attach(stv6110x_attach, input->fe, tunerconf, i2c); tuner_attach_stv6110()
696 if (!ctl) { tuner_attach_stv6110()
703 feconf->tuner_init = ctl->tuner_init; tuner_attach_stv6110()
704 feconf->tuner_sleep = ctl->tuner_sleep; tuner_attach_stv6110()
705 feconf->tuner_set_mode = ctl->tuner_set_mode; tuner_attach_stv6110()
706 feconf->tuner_set_frequency = ctl->tuner_set_frequency; tuner_attach_stv6110()
707 feconf->tuner_get_frequency = ctl->tuner_get_frequency; tuner_attach_stv6110()
708 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth; tuner_attach_stv6110()
709 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth; tuner_attach_stv6110()
710 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain; tuner_attach_stv6110()
711 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain; tuner_attach_stv6110()
712 feconf->tuner_set_refclk = ctl->tuner_set_refclk; tuner_attach_stv6110()
713 feconf->tuner_get_status = ctl->tuner_get_status; tuner_attach_stv6110()
/linux-4.1.27/drivers/media/usb/gspca/
H A Dstk1135.c219 /* mode ctl: AWB on, AE both, clip aper corr, defect corr, AE */ stk1135_configure_mt9m112()
228 { 0x224, 0x5f20 }, { 0x228, 0xea02 }, /* mtx adj lim, adv ctl */ stk1135_configure_mt9m112()
234 /* AWB adv ctl 2, gain offs */ stk1135_configure_mt9m112()
286 /* default prg conf, prg ctl - by 0x2d2, prg advance - PA1 */ stk1135_configure_mt9m112()
289 { 0x22e, 0x0c3c }, { 0x267, 0x1010 }, /* AE tgt ctl, gain lim */ stk1135_configure_mt9m112()
292 { 0x065, 0xa000 }, /* clk ctl - enable PLL (clear bit 14) */ stk1135_configure_mt9m112()
/linux-4.1.27/kernel/time/
H A Dtimer_stats.c362 char ctl[2]; tstats_write() local
367 if (copy_from_user(ctl, buf, count)) tstats_write()
371 switch (ctl[0]) { tstats_write()
/linux-4.1.27/drivers/i2c/algos/
H A Di2c-algo-pcf.c47 #define set_pcf(adap, ctl, val) adap->setpcf(adap->data, ctl, val)
48 #define get_pcf(adap, ctl) adap->getpcf(adap->data, ctl)
/linux-4.1.27/drivers/net/ethernet/sfc/
H A Dtxc43128_phy.c365 int ctl = efx_mdio_read(efx, mmd, TXC_GLRGS_GLCMD); txc_glrgs_lane_power() local
368 ctl &= ~pd; txc_glrgs_lane_power()
370 ctl |= pd; txc_glrgs_lane_power()
372 efx_mdio_write(efx, mmd, TXC_GLRGS_GLCMD, ctl); txc_glrgs_lane_power()
/linux-4.1.27/arch/x86/include/uapi/asm/
H A Ddebugreg.h35 #define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */
/linux-4.1.27/arch/s390/kernel/
H A Dbase.S107 larl %r4,.Lfpctl # Restore floating point ctl register
/linux-4.1.27/arch/mips/sgi-ip22/
H A Dip28-berr.c325 u32 ctl = sgimc->dma_ctrl; check_microtlb() local
326 if (ctl & 1) { check_microtlb()
327 unsigned int pgsz = (ctl & 2) ? 14:12; /* 16k:4k */ check_microtlb()
426 " ctl %08x, ndp %08x, cbp %08x\n", ip28_be_interrupt()
/linux-4.1.27/net/ipv4/
H A Ddevinet.c2016 static int devinet_conf_proc(struct ctl_table *ctl, int write, devinet_conf_proc() argument
2020 int old_value = *(int *)ctl->data; devinet_conf_proc()
2021 int ret = proc_dointvec(ctl, write, buffer, lenp, ppos); devinet_conf_proc()
2022 int new_value = *(int *)ctl->data; devinet_conf_proc()
2025 struct ipv4_devconf *cnf = ctl->extra1; devinet_conf_proc()
2026 struct net *net = ctl->extra2; devinet_conf_proc()
2027 int i = (int *)ctl->data - cnf->data; devinet_conf_proc()
2056 static int devinet_sysctl_forward(struct ctl_table *ctl, int write, devinet_sysctl_forward() argument
2060 int *valp = ctl->data; devinet_sysctl_forward()
2063 int ret = proc_dointvec(ctl, write, buffer, lenp, ppos); devinet_sysctl_forward()
2066 struct net *net = ctl->extra2; devinet_sysctl_forward()
2078 struct ipv4_devconf *cnf = ctl->extra1; devinet_sysctl_forward()
2099 static int ipv4_doint_and_flush(struct ctl_table *ctl, int write, ipv4_doint_and_flush() argument
2103 int *valp = ctl->data; ipv4_doint_and_flush()
2105 int ret = proc_dointvec(ctl, write, buffer, lenp, ppos); ipv4_doint_and_flush()
2106 struct net *net = ctl->extra2; ipv4_doint_and_flush()

Completed in 4611 milliseconds

123