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/linux-4.1.27/drivers/gpu/drm/radeon/
Drs600d.h33 #define S_000040_SCRATCH_INT_MASK(x) (((x) & 0x1) << 18) argument
34 #define G_000040_SCRATCH_INT_MASK(x) (((x) >> 18) & 0x1) argument
36 #define S_000040_GUI_IDLE_MASK(x) (((x) & 0x1) << 19) argument
37 #define G_000040_GUI_IDLE_MASK(x) (((x) >> 19) & 0x1) argument
39 #define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13) argument
40 #define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1) argument
42 #define S_000040_DMA_VIPH2_INT_EN(x) (((x) & 0x1) << 14) argument
43 #define G_000040_DMA_VIPH2_INT_EN(x) (((x) >> 14) & 0x1) argument
45 #define S_000040_DMA_VIPH3_INT_EN(x) (((x) & 0x1) << 15) argument
46 #define G_000040_DMA_VIPH3_INT_EN(x) (((x) >> 15) & 0x1) argument
[all …]
Dr100d.h69 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) argument
70 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) argument
72 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) argument
73 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) argument
75 #define S_0000F0_SOFT_RESET_SE(x) (((x) & 0x1) << 2) argument
76 #define G_0000F0_SOFT_RESET_SE(x) (((x) >> 2) & 0x1) argument
78 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) argument
79 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) argument
81 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) argument
82 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) argument
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Drs690d.h34 #define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF) argument
36 #define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0) argument
37 #define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF) argument
39 #define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9) argument
40 #define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1) argument
43 #define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0) argument
44 #define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF) argument
47 #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) argument
48 #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) argument
51 #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) argument
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Drv515d.h210 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) argument
211 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) argument
213 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) argument
214 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) argument
216 #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) argument
217 #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) argument
219 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) argument
220 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) argument
222 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) argument
223 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) argument
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Dr420d.h32 #define S_0001F8_MC_IND_ADDR(x) (((x) & 0x7F) << 0) argument
33 #define G_0001F8_MC_IND_ADDR(x) (((x) >> 0) & 0x7F) argument
35 #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8) argument
36 #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1) argument
39 #define S_0001FC_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0) argument
40 #define G_0001FC_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF) argument
43 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
44 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
46 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) argument
47 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) argument
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Dr300d.h70 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
71 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
73 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
74 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
77 #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) argument
78 #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) argument
80 #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) argument
81 #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) argument
84 #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) argument
85 #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) argument
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Dr520d.h33 #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) argument
34 #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) argument
37 #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) argument
38 #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) argument
41 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
42 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
44 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) argument
45 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) argument
47 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) argument
48 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) argument
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Dr600d.h60 #define BACKEND_DISABLE(x) ((x) << 16) argument
63 #define S_028808_SPECIAL_OP(x) (((x) & 0x7) << 4) argument
64 #define G_028808_SPECIAL_OP(x) (((x) >> 4) & 0x7) argument
83 #define S_028080_SLICE_START(x) (((x) & 0x7FF) << 0) argument
84 #define G_028080_SLICE_START(x) (((x) >> 0) & 0x7FF) argument
86 #define S_028080_SLICE_MAX(x) (((x) & 0x7FF) << 13) argument
87 #define G_028080_SLICE_MAX(x) (((x) >> 13) & 0x7FF) argument
97 #define S_028100_CMASK_BLOCK_MAX(x) (((x) & 0xFFF) << 0) argument
98 #define G_028100_CMASK_BLOCK_MAX(x) (((x) >> 0) & 0xFFF) argument
100 #define S_028100_FMASK_TILE_MAX(x) (((x) & 0xFFFFF) << 12) argument
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Drs400d.h33 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
34 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
36 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
37 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
40 #define S_00015C_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
41 #define G_00015C_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
43 #define S_00015C_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
44 #define G_00015C_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
47 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
48 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
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Drv250d.h32 #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) argument
33 #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) argument
35 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) argument
36 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) argument
38 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) argument
39 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) argument
41 #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) argument
42 #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) argument
44 #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) argument
45 #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) argument
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Devergreend.h53 #define HOST_SMC_MSG(x) ((x) << 0) argument
56 #define HOST_SMC_RESP(x) ((x) << 8) argument
59 #define SMC_HOST_MSG(x) ((x) << 16) argument
62 #define SMC_HOST_RESP(x) ((x) << 24) argument
67 #define DCCG_DISP1_SLOW_SELECT(x) ((x) << 0) argument
70 #define DCCG_DISP2_SLOW_SELECT(x) ((x) << 4) argument
78 #define SPLL_REF_DIV(x) ((x) << 4) argument
80 #define SPLL_PDIV_A(x) ((x) << 20) argument
83 #define SCLK_MUX_SEL(x) ((x) << 0) argument
87 #define SPLL_FB_DIV(x) ((x) << 0) argument
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Drv770d.h47 # define UPLL_REF_DIV(x) ((x) << 16) argument
52 # define UPLL_SW_HILEN(x) ((x) << 0) argument
53 # define UPLL_SW_LOLEN(x) ((x) << 4) argument
54 # define UPLL_SW_HILEN2(x) ((x) << 8) argument
55 # define UPLL_SW_LOLEN2(x) ((x) << 12) argument
57 # define VCLK_SRC_SEL(x) ((x) << 20) argument
59 # define DCLK_SRC_SEL(x) ((x) << 25) argument
62 # define UPLL_FB_DIV(x) ((x) << 0) argument
74 #define HOST_SMC_MSG(x) ((x) << 0) argument
77 #define HOST_SMC_RESP(x) ((x) << 8) argument
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Dnid.h53 #define RINGID(x) (((x) & 0x3) << 0) argument
54 #define VMID(x) (((x) & 0x7) << 0) argument
94 #define REQUEST_TYPE(x) (((x) & 0xf) << 0) argument
102 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) argument
103 #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 18) argument
114 #define BANK_SELECT(x) ((x) << 0) argument
115 #define CACHE_UPDATE_MODE(x) ((x) << 6) argument
117 #define L2_CACHE_BIGK_FRAGMENT_SIZE(x) ((x) << 15) argument
122 #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) argument
135 #define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) argument
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Dsid.h78 #define DCCG_DISP1_SLOW_SELECT(x) ((x) << 0) argument
81 #define DCCG_DISP2_SLOW_SELECT(x) ((x) << 4) argument
89 #define SPLL_REF_DIV(x) ((x) << 4) argument
91 #define SPLL_PDIV_A(x) ((x) << 20) argument
95 #define SCLK_MUX_SEL(x) ((x) << 0) argument
100 #define SPLL_FB_DIV(x) ((x) << 0) argument
110 # define SPLL_REFCLK_SEL(x) ((x) << 26) argument
115 #define CLK_S(x) ((x) << 4) argument
119 #define CLK_V(x) ((x) << 0) argument
137 # define UPLL_PDIV_A(x) ((x) << 0) argument
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Dni_reg.h30 # define NI_GRPH_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 0) argument
35 # define NI_OVL_INPUT_GAMMA_MODE(x) (((x) & 0x3) << 4) argument
44 # define NI_INPUT_CSC_GRPH_MODE(x) (((x) & 0x3) << 0) argument
48 # define NI_INPUT_CSC_OVL_MODE(x) (((x) & 0x3) << 4) argument
51 # define NI_OUTPUT_CSC_GRPH_MODE(x) (((x) & 0x7) << 0) argument
58 # define NI_OUTPUT_CSC_OVL_MODE(x) (((x) & 0x7) << 4) argument
61 # define NI_GRPH_DEGAMMA_MODE(x) (((x) & 0x3) << 0) argument
65 # define NI_OVL_DEGAMMA_MODE(x) (((x) & 0x3) << 4) argument
66 # define NI_ICON_DEGAMMA_MODE(x) (((x) & 0x3) << 8) argument
67 # define NI_CURSOR_DEGAMMA_MODE(x) (((x) & 0x3) << 12) argument
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Dsumod.h37 # define PCV(x) ((x) << 3) argument
40 # define PCP(x) ((x) << 8) argument
43 # define RPW(x) ((x) << 16) argument
46 # define ID(x) ((x) << 24) argument
49 # define PGS(x) ((x) << 28) argument
57 # define LCLK_SCALING_TIMER_PRESCALER(x) ((x) << 4) argument
60 # define LCLK_SCALING_TIMER_PERIOD(x) ((x) << 16) argument
65 # define MPPU(x) ((x) << 0) argument
68 # define MPPD(x) ((x) << 16) argument
72 # define DPPU(x) ((x) << 0) argument
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Dtrinityd.h35 # define STATE_VALID(x) ((x) << 0) argument
38 # define CLK_DIVIDER(x) ((x) << 8) argument
41 # define VID(x) ((x) << 16) argument
44 # define LVRT(x) ((x) << 24) argument
48 # define DS_DIV(x) ((x) << 0) argument
51 # define DS_SH_DIV(x) ((x) << 8) argument
54 # define DISPLAY_WM(x) ((x) << 16) argument
57 # define VCE_WM(x) ((x) << 24) argument
62 # define GNB_SLOW(x) ((x) << 0) argument
65 # define FORCE_NBPS1(x) ((x) << 8) argument
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Dcikd.h44 # define SamuBootLevel(x) ((x) << 0) argument
47 # define AcpBootLevel(x) ((x) << 8) argument
50 # define VceBootLevel(x) ((x) << 16) argument
53 # define UvdBootLevel(x) ((x) << 24) argument
61 # define Dpm0PgNbPsLo(x) ((x) << 0) argument
64 # define Dpm0PgNbPsHi(x) ((x) << 8) argument
67 # define DpmXNbPsLo(x) ((x) << 16) argument
70 # define DpmXNbPsHi(x) ((x) << 24) argument
96 # define SW_SMIO_INDEX(x) ((x) << 6) argument
104 # define GNB_SLOW_MODE(x) ((x) << 0) argument
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Drv6xxd.h37 # define SW_GPIO_INDEX(x) ((x) << 6) argument
79 # define LEVEL0_MPLL_POST_DIV(x) ((x) << 0) argument
81 # define LEVEL0_MPLL_FB_DIV(x) ((x) << 8) argument
83 # define LEVEL0_MPLL_REF_DIV(x) ((x) << 20) argument
90 # define VID_CRT(x) ((x) << 0) argument
92 # define VID_CRTU(x) ((x) << 13) argument
94 # define SSTU(x) ((x) << 16) argument
96 # define VID_SWT(x) ((x) << 19) argument
98 # define BRT(x) ((x) << 24) argument
106 # define DYN_PWR_ENTER_INDEX(x) ((x) << 4) argument
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Drs780d.h29 # define SPLL_REF_DIV(x) ((x) << 2) argument
32 # define SPLL_FB_DIV(x) ((x) << 5) argument
36 # define SPLL_PULSENUM(x) ((x) << 14) argument
38 # define SPLL_SW_HILEN(x) ((x) << 16) argument
41 # define SPLL_SW_LOLEN(x) ((x) << 20) argument
53 #define MINIMUM_CIP(x) ((x) << 1) argument
56 #define REFRESH_RATE_DIVISOR(x) ((x) << 25) argument
65 #define TARGET_IDLE_COUNT(x) ((x) << 0) argument
83 #define MIN_FEEDBACK_DIV(x) ((x) << 0) argument
86 #define MAX_FEEDBACK_DIV(x) ((x) << 12) argument
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Drv730d.h31 #define SPLL_REF_DIV(x) ((x) << 4) argument
33 #define SPLL_HILEN(x) ((x) << 12) argument
35 #define SPLL_LOLEN(x) ((x) << 16) argument
38 #define SCLK_MUX_SEL(x) ((x) << 0) argument
41 #define SPLL_FB_DIV(x) ((x) << 0) argument
50 #define MPLL_REF_DIV(x) ((x) << 4) argument
52 #define MPLL_HILEN(x) ((x) << 12) argument
54 #define MPLL_LOLEN(x) ((x) << 16) argument
57 #define MCLK_MUX_SEL(x) ((x) << 0) argument
60 #define MPLL_FB_DIV(x) ((x) << 0) argument
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Dbtcd.h36 # define SW_SMIO_INDEX(x) ((x) << 6) argument
52 #define CG_CLIENT_REQ(x) ((x) << 0) argument
55 #define CG_CLIENT_RESP(x) ((x) << 8) argument
58 #define CLIENT_CG_REQ(x) ((x) << 16) argument
61 #define CLIENT_CG_RESP(x) ((x) << 24) argument
66 #define PSKIP_ON_ALLOW_STOP_HI(x) ((x) << 16) argument
77 #define POWERMODE0(x) ((x) << 0) argument
80 #define POWERMODE1(x) ((x) << 8) argument
83 #define POWERMODE2(x) ((x) << 16) argument
86 #define POWERMODE3(x) ((x) << 24) argument
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Drv350d.h33 #define S_00000D_FORCE_VAP(x) (((x) & 0x1) << 21) argument
34 #define G_00000D_FORCE_VAP(x) (((x) >> 21) & 0x1) argument
36 #define S_00000D_FORCE_SR(x) (((x) & 0x1) << 25) argument
37 #define G_00000D_FORCE_SR(x) (((x) >> 25) & 0x1) argument
39 #define S_00000D_FORCE_PX(x) (((x) & 0x1) << 26) argument
40 #define G_00000D_FORCE_PX(x) (((x) >> 26) & 0x1) argument
42 #define S_00000D_FORCE_TX(x) (((x) & 0x1) << 27) argument
43 #define G_00000D_FORCE_TX(x) (((x) >> 27) & 0x1) argument
45 #define S_00000D_FORCE_US(x) (((x) & 0x1) << 28) argument
46 #define G_00000D_FORCE_US(x) (((x) >> 28) & 0x1) argument
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Drv740d.h30 #define SPLL_REF_DIV(x) ((x) << 4) argument
32 #define SPLL_PDIV_A(x) ((x) << 20) argument
35 #define SCLK_MUX_SEL(x) ((x) << 0) argument
38 #define SPLL_FB_DIV(x) ((x) << 0) argument
46 #define CLKF(x) ((x) << 0) argument
48 #define CLKR(x) ((x) << 7) argument
50 #define CLKFRAC(x) ((x) << 12) argument
52 #define YCLK_POST_DIV(x) ((x) << 17) argument
54 #define IBIAS(x) ((x) << 20) argument
67 #define DLL_SPEED(x) ((x) << 0) argument
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Devergreen_reg.h62 # define EVERGREEN_GRPH_DEPTH(x) (((x) & 0x3) << 0) argument
66 # define EVERGREEN_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) argument
71 # define EVERGREEN_GRPH_Z(x) (((x) & 0x3) << 4) argument
72 # define EVERGREEN_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) argument
77 # define EVERGREEN_GRPH_FORMAT(x) (((x) & 0x7) << 8) argument
96 # define EVERGREEN_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) argument
101 # define EVERGREEN_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) argument
109 # define EVERGREEN_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) argument
114 # define EVERGREEN_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) argument
122 # define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) argument
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Dcik_reg.h36 # define CIK_GRPH_DEPTH(x) (((x) & 0x3) << 0) argument
40 # define CIK_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) argument
45 # define CIK_GRPH_Z(x) (((x) & 0x3) << 4) argument
46 # define CIK_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) argument
51 # define CIK_GRPH_FORMAT(x) (((x) & 0x7) << 8) argument
70 # define CIK_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) argument
75 # define CIK_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) argument
83 # define CIK_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) argument
88 # define CIK_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) argument
93 # define CIK_GRPH_PIPE_CONFIG(x) (((x) & 0x1f) << 24) argument
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Dradeon_drv.h629 # define RS600_EFFECTIVE_L2_CACHE_SIZE(x) ((x) << 15) argument
630 # define RS600_EFFECTIVE_L2_QUEUE_SIZE(x) ((x) << 21) argument
652 # define RS600_EFFECTIVE_L1_CACHE_SIZE(x) ((x) << 11) argument
654 # define RS600_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15) argument
738 #define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x)) argument
742 #define GET_SCRATCH(dev_priv, x) radeon_get_scratch(dev_priv, x) argument
755 #define R600_SCRATCHOFF(x) (R600_SCRATCH_REG_OFFSET + 4*(x)) argument
1131 # define R600_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) argument
1414 # define R600_MCD_EFFECTIVE_L1_TLB_SIZE(x) ((x) << 12) argument
1415 # define R600_MCD_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15) argument
[all …]
Dsi_reg.h34 # define SI_GRPH_DEPTH(x) (((x) & 0x3) << 0) argument
38 # define SI_GRPH_NUM_BANKS(x) (((x) & 0x3) << 2) argument
43 # define SI_GRPH_Z(x) (((x) & 0x3) << 4) argument
44 # define SI_GRPH_BANK_WIDTH(x) (((x) & 0x3) << 6) argument
49 # define SI_GRPH_FORMAT(x) (((x) & 0x7) << 8) argument
68 # define SI_GRPH_BANK_HEIGHT(x) (((x) & 0x3) << 11) argument
73 # define SI_GRPH_TILE_SPLIT(x) (((x) & 0x7) << 13) argument
81 # define SI_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18) argument
86 # define SI_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20) argument
91 # define SI_GRPH_PIPE_CONFIG(x) (((x) & 0x1f) << 24) argument
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb/
Dregs.h45 #define V_CMDQ0_ENABLE(x) ((x) << S_CMDQ0_ENABLE) argument
49 #define V_CMDQ1_ENABLE(x) ((x) << S_CMDQ1_ENABLE) argument
53 #define V_FL0_ENABLE(x) ((x) << S_FL0_ENABLE) argument
57 #define V_FL1_ENABLE(x) ((x) << S_FL1_ENABLE) argument
61 #define V_CPL_ENABLE(x) ((x) << S_CPL_ENABLE) argument
65 #define V_RESPONSE_QUEUE_ENABLE(x) ((x) << S_RESPONSE_QUEUE_ENABLE) argument
70 #define V_CMDQ_PRIORITY(x) ((x) << S_CMDQ_PRIORITY) argument
71 #define G_CMDQ_PRIORITY(x) (((x) >> S_CMDQ_PRIORITY) & M_CMDQ_PRIORITY) argument
74 #define V_DISABLE_CMDQ0_GTS(x) ((x) << S_DISABLE_CMDQ0_GTS) argument
78 #define V_DISABLE_CMDQ1_GTS(x) ((x) << S_DISABLE_CMDQ1_GTS) argument
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Dfpga_defs.h55 #define V_MI0_CLK_DIV(x) ((x) << S_MI0_CLK_DIV) argument
56 #define G_MI0_CLK_DIV(x) (((x) >> S_MI0_CLK_DIV) & M_MI0_CLK_DIV) argument
60 #define V_MI0_CLK_CNT(x) ((x) << S_MI0_CLK_CNT) argument
61 #define G_MI0_CLK_CNT(x) (((x) >> S_MI0_CLK_CNT) & M_MI0_CLK_CNT) argument
66 #define V_MI0_CSR_POLL(x) ((x) << S_MI0_CSR_POLL) argument
70 #define V_MI0_PREAMBLE(x) ((x) << S_MI0_PREAMBLE) argument
74 #define V_MI0_INTR_ENABLE(x) ((x) << S_MI0_INTR_ENABLE) argument
78 #define V_MI0_BUSY(x) ((x) << S_MI0_BUSY) argument
82 #define V_MI0_MDIO(x) ((x) << S_MI0_MDIO) argument
89 #define V_MI0_PHY_REG_ADDR(x) ((x) << S_MI0_PHY_REG_ADDR) argument
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Delmer0.h58 #define V_MI1_MDI_ENABLE(x) ((x) << S_MI1_MDI_ENABLE) argument
62 #define V_MI1_MDI_INVERT(x) ((x) << S_MI1_MDI_INVERT) argument
66 #define V_MI1_PREAMBLE_ENABLE(x) ((x) << S_MI1_PREAMBLE_ENABLE) argument
71 #define V_MI1_SOF(x) ((x) << S_MI1_SOF) argument
72 #define G_MI1_SOF(x) (((x) >> S_MI1_SOF) & M_MI1_SOF) argument
76 #define V_MI1_CLK_DIV(x) ((x) << S_MI1_CLK_DIV) argument
77 #define G_MI1_CLK_DIV(x) (((x) >> S_MI1_CLK_DIV) & M_MI1_CLK_DIV) argument
83 #define V_MI1_REG_ADDR(x) ((x) << S_MI1_REG_ADDR) argument
84 #define G_MI1_REG_ADDR(x) (((x) >> S_MI1_REG_ADDR) & M_MI1_REG_ADDR) argument
88 #define V_MI1_PHY_ADDR(x) ((x) << S_MI1_PHY_ADDR) argument
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/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb3/
Dregs.h4 #define V_CONGMODE(x) ((x) << S_CONGMODE) argument
8 #define V_TNLFLMODE(x) ((x) << S_TNLFLMODE) argument
12 #define V_FATLPERREN(x) ((x) << S_FATLPERREN) argument
16 #define V_DROPPKT(x) ((x) << S_DROPPKT) argument
20 #define V_EGRGENCTRL(x) ((x) << S_EGRGENCTRL) argument
25 #define V_USERSPACESIZE(x) ((x) << S_USERSPACESIZE) argument
29 #define V_HOSTPAGESIZE(x) ((x) << S_HOSTPAGESIZE) argument
32 #define V_FLMODE(x) ((x) << S_FLMODE) argument
37 #define V_PKTSHIFT(x) ((x) << S_PKTSHIFT) argument
40 #define V_ONEINTMULTQ(x) ((x) << S_ONEINTMULTQ) argument
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Dsge_defs.h10 #define V_EC_CREDITS(x) ((x) << S_EC_CREDITS) argument
11 #define G_EC_CREDITS(x) (((x) >> S_EC_CREDITS) & M_EC_CREDITS) argument
14 #define V_EC_GTS(x) ((x) << S_EC_GTS) argument
19 #define V_EC_INDEX(x) ((x) << S_EC_INDEX) argument
20 #define G_EC_INDEX(x) (((x) >> S_EC_INDEX) & M_EC_INDEX) argument
24 #define V_EC_SIZE(x) ((x) << S_EC_SIZE) argument
25 #define G_EC_SIZE(x) (((x) >> S_EC_SIZE) & M_EC_SIZE) argument
29 #define V_EC_BASE_LO(x) ((x) << S_EC_BASE_LO) argument
30 #define G_EC_BASE_LO(x) (((x) >> S_EC_BASE_LO) & M_EC_BASE_LO) argument
34 #define V_EC_BASE_HI(x) ((x) << S_EC_BASE_HI) argument
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Dt3_cpl.h190 #define V_OPCODE(x) ((x) << S_OPCODE) argument
191 #define G_OPCODE(x) (((x) >> S_OPCODE) & 0xFF) argument
192 #define G_TID(x) ((x) & 0xFFFFFF) argument
195 #define G_QNUM(x) (((x) >> S_QNUM) & 0xFFFF) argument
199 #define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE) argument
247 #define V_WR_SGE_CREDITS(x) ((x) << S_WR_SGE_CREDITS) argument
248 #define G_WR_SGE_CREDITS(x) (((x) >> S_WR_SGE_CREDITS) & M_WR_SGE_CREDITS) argument
252 #define V_WR_SGLSFLT(x) ((x) << S_WR_SGLSFLT) argument
253 #define G_WR_SGLSFLT(x) (((x) >> S_WR_SGLSFLT) & M_WR_SGLSFLT) argument
257 #define V_WR_BCNTLFLT(x) ((x) << S_WR_BCNTLFLT) argument
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/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb4/
Dt4_regs.h71 #define QID_V(x) ((x) << QID_S) argument
74 #define DBPRIO_V(x) ((x) << DBPRIO_S) argument
78 #define PIDX_V(x) ((x) << PIDX_S) argument
83 #define DBTYPE_V(x) ((x) << DBTYPE_S) argument
88 #define PIDX_T5_V(x) ((x) << PIDX_T5_S) argument
89 #define PIDX_T5_G(x) (((x) >> PIDX_T5_S) & PIDX_T5_M) argument
94 #define INGRESSQID_V(x) ((x) << INGRESSQID_S) argument
97 #define TIMERREG_V(x) ((x) << TIMERREG_S) argument
100 #define SEINTARM_V(x) ((x) << SEINTARM_S) argument
104 #define CIDXINC_V(x) ((x) << CIDXINC_S) argument
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Dt4fw_api.h115 #define FW_WR_OP_V(x) ((x) << FW_WR_OP_S) argument
116 #define FW_WR_OP_G(x) (((x) >> FW_WR_OP_S) & FW_WR_OP_M) argument
120 #define FW_WR_ATOMIC_V(x) ((x) << FW_WR_ATOMIC_S) argument
126 #define FW_WR_FLUSH_V(x) ((x) << FW_WR_FLUSH_S) argument
130 #define FW_WR_COMPL_V(x) ((x) << FW_WR_COMPL_S) argument
136 #define FW_WR_IMMDLEN_V(x) ((x) << FW_WR_IMMDLEN_S) argument
140 #define FW_WR_EQUIQ_V(x) ((x) << FW_WR_EQUIQ_S) argument
145 #define FW_WR_EQUEQ_V(x) ((x) << FW_WR_EQUEQ_S) argument
150 #define FW_WR_FLOWID_V(x) ((x) << FW_WR_FLOWID_S) argument
154 #define FW_WR_LEN16_V(x) ((x) << FW_WR_LEN16_S) argument
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Dt4_msg.h171 #define CPL_OPCODE_V(x) ((x) << CPL_OPCODE_S) argument
172 #define CPL_OPCODE_G(x) (((x) >> CPL_OPCODE_S) & 0xFF) argument
173 #define TID_G(x) ((x) & 0xFFFFFF) argument
186 #define TID_TID_G(x) (((x) >> TID_TID_S) & TID_TID_M) argument
190 #define TID_QID_V(x) ((x) << TID_QID_S) argument
191 #define TID_QID_G(x) (((x) >> TID_QID_S) & TID_QID_M) argument
222 #define WR_OP_V(x) ((__u64)(x) << WR_OP_S) argument
228 #define TX_CHAN_V(x) ((x) << TX_CHAN_S) argument
231 #define ULP_MODE_V(x) ((x) << ULP_MODE_S) argument
235 #define RCV_BUFSIZ_V(x) ((x) << RCV_BUFSIZ_S) argument
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/linux-4.1.27/drivers/infiniband/hw/cxgb3/
Dtcb.h38 #define V_TCB_T_STATE(x) ((x) << S_TCB_T_STATE) argument
43 #define V_TCB_TIMER(x) ((x) << S_TCB_TIMER) argument
48 #define V_TCB_DACK_TIMER(x) ((x) << S_TCB_DACK_TIMER) argument
53 #define V_TCB_DEL_FLAG(x) ((x) << S_TCB_DEL_FLAG) argument
58 #define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX) argument
63 #define V_TCB_SMAC_SEL(x) ((x) << S_TCB_SMAC_SEL) argument
68 #define V_TCB_TOS(x) ((x) << S_TCB_TOS) argument
73 #define V_TCB_MAX_RT(x) ((x) << S_TCB_MAX_RT) argument
78 #define V_TCB_T_RXTSHIFT(x) ((x) << S_TCB_T_RXTSHIFT) argument
83 #define V_TCB_T_DUPACKS(x) ((x) << S_TCB_T_DUPACKS) argument
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Dcxio_wr.h59 #define SEQ32_GE(x,y) (!( (((u32) (x)) - ((u32) (y))) & 0x80000000 )) argument
139 #define V_FW_RIWR_OP(x) ((x) << S_FW_RIWR_OP) argument
140 #define G_FW_RIWR_OP(x) ((((x) >> S_FW_RIWR_OP)) & M_FW_RIWR_OP) argument
144 #define V_FW_RIWR_SOPEOP(x) ((x) << S_FW_RIWR_SOPEOP) argument
148 #define V_FW_RIWR_FLAGS(x) ((x) << S_FW_RIWR_FLAGS) argument
149 #define G_FW_RIWR_FLAGS(x) ((((x) >> S_FW_RIWR_FLAGS)) & M_FW_RIWR_FLAGS) argument
152 #define V_FW_RIWR_TID(x) ((x) << S_FW_RIWR_TID) argument
155 #define V_FW_RIWR_LEN(x) ((x) << S_FW_RIWR_LEN) argument
158 #define V_FW_RIWR_GEN(x) ((x) << S_FW_RIWR_GEN) argument
204 #define V_FR_PAGE_COUNT(x) ((x) << S_FR_PAGE_COUNT) argument
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/linux-4.1.27/arch/arm/include/asm/
Dopcodes.h27 #define ___asm_opcode_swab32(x) ( \ argument
28 (((x) << 24) & 0xFF000000) \
29 | (((x) << 8) & 0x00FF0000) \
30 | (((x) >> 8) & 0x0000FF00) \
31 | (((x) >> 24) & 0x000000FF) \
33 #define ___asm_opcode_swab16(x) ( \ argument
34 (((x) << 8) & 0xFF00) \
35 | (((x) >> 8) & 0x00FF) \
37 #define ___asm_opcode_swahb32(x) ( \ argument
38 (((x) << 8) & 0xFF00FF00) \
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Dpgtable-3level-types.h41 #define pte_val(x) ((x).pte) argument
42 #define pmd_val(x) ((x).pmd) argument
43 #define pgd_val(x) ((x).pgd) argument
44 #define pgprot_val(x) ((x).pgprot) argument
46 #define __pte(x) ((pte_t) { (x) } ) argument
47 #define __pmd(x) ((pmd_t) { (x) } ) argument
48 #define __pgd(x) ((pgd_t) { (x) } ) argument
49 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
58 #define pte_val(x) (x) argument
59 #define pmd_val(x) (x) argument
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Dpgtable-2level-types.h38 #define pte_val(x) ((x).pte) argument
39 #define pmd_val(x) ((x).pmd) argument
40 #define pgd_val(x) ((x).pgd[0]) argument
41 #define pgprot_val(x) ((x).pgprot) argument
43 #define __pte(x) ((pte_t) { (x) } ) argument
44 #define __pmd(x) ((pmd_t) { (x) } ) argument
45 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
56 #define pte_val(x) (x) argument
57 #define pmd_val(x) (x) argument
58 #define pgd_val(x) ((x)[0]) argument
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Dmemory.h31 #define UL(x) _AC(x, UL) argument
212 #define __pv_add_carry_stub(x, y) \ argument
220 : "r" (x), "I" (__PV_BITS_31_24) \
223 static inline phys_addr_t __virt_to_phys(unsigned long x) in __virt_to_phys() argument
228 __pv_stub(x, t, "add", __PV_BITS_31_24); in __virt_to_phys()
231 __pv_add_carry_stub(x, t); in __virt_to_phys()
236 static inline unsigned long __phys_to_virt(phys_addr_t x) in __phys_to_virt() argument
246 __pv_stub((unsigned long) x, t, "sub", __PV_BITS_31_24); in __phys_to_virt()
255 static inline phys_addr_t __virt_to_phys(unsigned long x) in __virt_to_phys() argument
257 return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET; in __virt_to_phys()
[all …]
/linux-4.1.27/drivers/video/fbdev/exynos/
Dexynos_mipi_dsi_regs.h48 #define DSIM_STOP_STATE_DAT(x) (((x) & 0xf) << 0) argument
57 #define DSIM_LPDR_TOUT_SHIFT(x) ((x) << 0) argument
58 #define DSIM_BTA_TOUT_SHIFT(x) ((x) << 16) argument
61 #define DSIM_LANE_ESC_CLKEN(x) (((x) & 0x1f) << 19) argument
62 #define DSIM_BYTE_CLKEN_SHIFT(x) ((x) << 24) argument
63 #define DSIM_BYTE_CLK_SRC_SHIFT(x) ((x) << 25) argument
64 #define DSIM_PLL_BYPASS_SHIFT(x) ((x) << 27) argument
65 #define DSIM_ESC_CLKEN_SHIFT(x) ((x) << 28) argument
66 #define DSIM_TX_REQUEST_HSCLK_SHIFT(x) ((x) << 31) argument
69 #define DSIM_LANE_ENx(x) (((x) & 0x1f) << 0) argument
[all …]
/linux-4.1.27/arch/mips/include/asm/sibyte/
Dbcm1480_mc.h44 #define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0) argument
45 #define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV0) argument
50 #define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1) argument
51 #define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV1) argument
56 #define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV2) argument
57 #define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV2, M_BCM1480_MC_INTLV2) argument
62 #define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS_MODE) argument
63 #define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_CS_MODE, M_BCM1480_MC_CS_MODE) argument
85 #define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_START) argument
86 #define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_START, M_BCM1480_MC_CS0_STAR… argument
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Dsb1250_genbus.h53 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
58 #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x, S_IO_WIDTH_SEL) argument
59 #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL) argument
63 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
75 #define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x, S_IO_TIMEOUT) argument
76 #define G_IO_TIMEOUT(x) _SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT) argument
84 #define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x, S_IO_MULT_SIZE) argument
85 #define G_IO_MULT_SIZE(x) _SB_GETVALUE(x, S_IO_MULT_SIZE, M_IO_MULT_SIZE) argument
95 #define V_IO_START_ADDR(x) _SB_MAKEVALUE(x, S_IO_START_ADDR) argument
96 #define G_IO_START_ADDR(x) _SB_GETVALUE(x, S_IO_START_ADDR, M_IO_START_ADDR) argument
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Dsb1250_mc.h47 #define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x, S_MC_CHANNEL_SEL) argument
48 #define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x, S_MC_CHANNEL_SEL, M_MC_CHANNEL_SEL) argument
52 #define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK0_MAP) argument
53 #define G_MC_BANK0_MAP(x) _SB_GETVALUE(x, S_MC_BANK0_MAP, M_MC_BANK0_MAP) argument
60 #define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK1_MAP) argument
61 #define G_MC_BANK1_MAP(x) _SB_GETVALUE(x, S_MC_BANK1_MAP, M_MC_BANK1_MAP) argument
68 #define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK2_MAP) argument
69 #define G_MC_BANK2_MAP(x) _SB_GETVALUE(x, S_MC_BANK2_MAP, M_MC_BANK2_MAP) argument
76 #define V_MC_BANK3_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK3_MAP) argument
77 #define G_MC_BANK3_MAP(x) _SB_GETVALUE(x, S_MC_BANK3_MAP, M_MC_BANK3_MAP) argument
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Dsb1250_ldt.h71 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
85 #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_VENDOR) argument
86 #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_VENDOR, M_LDT_DEVICEID_VENDOR) argument
90 #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_DEVICEID) argument
91 #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_DEVICEID, M_LDT_DEVICEID_DEVIC… argument
115 #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_REV) argument
116 #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_REV, M_LDT_CLASSREV_REV) argument
120 #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_CLASS) argument
121 #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_CLASS, M_LDT_CLASSREV_CLASS) argument
132 #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_CLINESZ) argument
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Dsb1250_scd.h49 #define V_SYS_REVISION(x) _SB_MAKEVALUE(x, S_SYS_REVISION) argument
50 #define G_SYS_REVISION(x) _SB_GETVALUE(x, S_SYS_REVISION, M_SYS_REVISION) argument
98 #define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x, S_SYS_L2C_SIZE) argument
99 #define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x, S_SYS_L2C_SIZE, M_SYS_L2C_SIZE) argument
114 #define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x, S_SYS_NUM_CPUS) argument
115 #define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x, S_SYS_NUM_CPUS, M_SYS_NUM_CPUS) argument
121 #define V_SYS_PART(x) _SB_MAKEVALUE(x, S_SYS_PART) argument
122 #define G_SYS_PART(x) _SB_GETVALUE(x, S_SYS_PART, M_SYS_PART) argument
135 #define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x, S_SYS_SOC_TYPE) argument
136 #define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x, S_SYS_SOC_TYPE, M_SYS_SOC_TYPE) argument
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Dsb1250_mac.h59 #define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x, S_MAC_TX_PAUSE) argument
101 #define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x, S_MAC_SPEED_SEL) argument
102 #define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x, S_MAC_SPEED_SEL, M_MAC_SPEED_SEL) argument
121 #define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x, S_MAC_BYPASS_CFG) argument
122 #define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x, S_MAC_BYPASS_CFG, M_MAC_BYPASS_CFG) argument
132 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
136 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
142 #define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x, S_MAC_BYPASS_IFG) argument
143 #define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x, S_MAC_BYPASS_IFG, M_MAC_BYPASS_IFG) argument
157 #define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x, S_MAC_FC_CMD) argument
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Dbcm1480_l2c.h44 #define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_INDEX) argument
45 #define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_INDEX, M_BCM1480_L2C_MGM… argument
49 #define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_WAY) argument
50 #define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_WAY, M_BCM1480_L2C_MGMT_WA… argument
57 #define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG) argument
58 #define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG, M_BCM1480_L… argument
75 #define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_INDEX) argument
76 #define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_INDEX, M_BCM1480_L2C_TAG_I… argument
81 #define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_TAG) argument
82 #define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_TAG, M_BCM1480_L2C_TAG_TAG) argument
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Dbcm1480_scd.h103 #define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_PLL_DIV) argument
104 #define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_PLL_DIV, M_BCM1480_SYS_PLL_DIV) argument
108 #define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_SW_DIV) argument
109 #define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_SW_DIV, M_BCM1480_SYS_SW_DIV) argument
116 #define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_BOOT_MODE) argument
117 #define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_BCM1480_SYS_BOOT_MODE, M_BCM1480_SYS_BOOT_… argument
133 #define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_CONFIG) argument
134 #define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x, S_BCM1480_SYS_CONFIG, M_BCM1480_SYS_CONFIG) argument
140 #define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_NODEID) argument
141 #define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x, S_BCM1480_SYS_NODEID, M_BCM1480_SYS_NODEID) argument
[all …]
Dsb1250_l2c.h47 #define V_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_L2C_TAG_INDEX) argument
48 #define G_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_L2C_TAG_INDEX, M_L2C_TAG_INDEX) argument
52 #define V_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_L2C_TAG_TAG) argument
53 #define G_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_L2C_TAG_TAG, M_L2C_TAG_TAG) argument
57 #define V_L2C_TAG_ECC(x) _SB_MAKEVALUE(x, S_L2C_TAG_ECC) argument
58 #define G_L2C_TAG_ECC(x) _SB_GETVALUE(x, S_L2C_TAG_ECC, M_L2C_TAG_ECC) argument
62 #define V_L2C_TAG_WAY(x) _SB_MAKEVALUE(x, S_L2C_TAG_WAY) argument
63 #define G_L2C_TAG_WAY(x) _SB_GETVALUE(x, S_L2C_TAG_WAY, M_L2C_TAG_WAY) argument
74 #define V_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_L2C_MGMT_INDEX) argument
75 #define G_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_L2C_MGMT_INDEX, M_L2C_MGMT_INDEX) argument
[all …]
Dsb1250_dma.h61 #define V_DMA_DESC_TYPE(x) _SB_MAKEVALUE(x, S_DMA_DESC_TYPE) argument
62 #define G_DMA_DESC_TYPE(x) _SB_GETVALUE(x, S_DMA_DESC_TYPE, M_DMA_DESC_TYPE) argument
67 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
80 #define V_DMA_INT_PKTCNT(x) _SB_MAKEVALUE(x, S_DMA_INT_PKTCNT) argument
81 #define G_DMA_INT_PKTCNT(x) _SB_GETVALUE(x, S_DMA_INT_PKTCNT, M_DMA_INT_PKTCNT) argument
85 #define V_DMA_RINGSZ(x) _SB_MAKEVALUE(x, S_DMA_RINGSZ) argument
86 #define G_DMA_RINGSZ(x) _SB_GETVALUE(x, S_DMA_RINGSZ, M_DMA_RINGSZ) argument
90 #define V_DMA_HIGH_WATERMARK(x) _SB_MAKEVALUE(x, S_DMA_HIGH_WATERMARK) argument
91 #define G_DMA_HIGH_WATERMARK(x) _SB_GETVALUE(x, S_DMA_HIGH_WATERMARK, M_DMA_HIGH_WATERMARK) argument
95 #define V_DMA_LOW_WATERMARK(x) _SB_MAKEVALUE(x, S_DMA_LOW_WATERMARK) argument
[all …]
Dsb1250_smbus.h45 #define V_SMB_FREQ_DIV(x) _SB_MAKEVALUE(x, S_SMB_FREQ_DIV) argument
53 #define V_SMB_CMD(x) _SB_MAKEVALUE(x, S_SMB_CMD) argument
64 #define V_SMB_DATA_OUT(x) _SB_MAKEVALUE(x, S_SMB_DATA_OUT) argument
79 #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1…
82 #define V_SMB_SCL_IN(x) _SB_MAKEVALUE(x, S_SMB_SCL_IN) argument
83 #define G_SMB_SCL_IN(x) _SB_GETVALUE(x, S_SMB_SCL_IN, M_SMB_SCL_IN) argument
88 #define V_SMB_REF(x) _SB_MAKEVALUE(x, S_SMB_REF) argument
89 #define G_SMB_REF(x) _SB_GETVALUE(x, S_SMB_REF, M_SMB_REF) argument
93 #define V_SMB_DATA_IN(x) _SB_MAKEVALUE(x, S_SMB_DATA_IN) argument
94 #define G_SMB_DATA_IN(x) _SB_GETVALUE(x, S_SMB_DATA_IN, M_SMB_DATA_IN) argument
[all …]
/linux-4.1.27/drivers/infiniband/hw/cxgb4/
Dt4fw_ri_api.h167 #define FW_RI_TPTE_VALID_V(x) ((x) << FW_RI_TPTE_VALID_S) argument
168 #define FW_RI_TPTE_VALID_G(x) \ argument
169 (((x) >> FW_RI_TPTE_VALID_S) & FW_RI_TPTE_VALID_M)
174 #define FW_RI_TPTE_STAGKEY_V(x) ((x) << FW_RI_TPTE_STAGKEY_S) argument
175 #define FW_RI_TPTE_STAGKEY_G(x) \ argument
176 (((x) >> FW_RI_TPTE_STAGKEY_S) & FW_RI_TPTE_STAGKEY_M)
180 #define FW_RI_TPTE_STAGSTATE_V(x) ((x) << FW_RI_TPTE_STAGSTATE_S) argument
181 #define FW_RI_TPTE_STAGSTATE_G(x) \ argument
182 (((x) >> FW_RI_TPTE_STAGSTATE_S) & FW_RI_TPTE_STAGSTATE_M)
187 #define FW_RI_TPTE_STAGTYPE_V(x) ((x) << FW_RI_TPTE_STAGTYPE_S) argument
[all …]
/linux-4.1.27/include/uapi/linux/byteorder/
Dbig_endian.h14 #define __constant_htonl(x) ((__force __be32)(__u32)(x)) argument
15 #define __constant_ntohl(x) ((__force __u32)(__be32)(x)) argument
16 #define __constant_htons(x) ((__force __be16)(__u16)(x)) argument
17 #define __constant_ntohs(x) ((__force __u16)(__be16)(x)) argument
18 #define __constant_cpu_to_le64(x) ((__force __le64)___constant_swab64((x))) argument
19 #define __constant_le64_to_cpu(x) ___constant_swab64((__force __u64)(__le64)(x)) argument
20 #define __constant_cpu_to_le32(x) ((__force __le32)___constant_swab32((x))) argument
21 #define __constant_le32_to_cpu(x) ___constant_swab32((__force __u32)(__le32)(x)) argument
22 #define __constant_cpu_to_le16(x) ((__force __le16)___constant_swab16((x))) argument
23 #define __constant_le16_to_cpu(x) ___constant_swab16((__force __u16)(__le16)(x)) argument
[all …]
Dlittle_endian.h14 #define __constant_htonl(x) ((__force __be32)___constant_swab32((x))) argument
15 #define __constant_ntohl(x) ___constant_swab32((__force __be32)(x)) argument
16 #define __constant_htons(x) ((__force __be16)___constant_swab16((x))) argument
17 #define __constant_ntohs(x) ___constant_swab16((__force __be16)(x)) argument
18 #define __constant_cpu_to_le64(x) ((__force __le64)(__u64)(x)) argument
19 #define __constant_le64_to_cpu(x) ((__force __u64)(__le64)(x)) argument
20 #define __constant_cpu_to_le32(x) ((__force __le32)(__u32)(x)) argument
21 #define __constant_le32_to_cpu(x) ((__force __u32)(__le32)(x)) argument
22 #define __constant_cpu_to_le16(x) ((__force __le16)(__u16)(x)) argument
23 #define __constant_le16_to_cpu(x) ((__force __u16)(__le16)(x)) argument
[all …]
/linux-4.1.27/arch/m68k/include/asm/
Dm53xxsim.h192 #define MCF_CCM_CCR_BOOTPS(x) (((x)&0x0003)<<3|0x0001) argument
195 #define MCF_CCM_CCR_CSC(x) (((x)&0x0003)<<8|0x0001) argument
201 #define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3|0x0001) argument
204 #define MCF_CCM_RCON_CSC(x) (((x)&0x0003)<<8|0x0001) argument
207 #define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) argument
208 #define MCF_CCM_CIR_PIN(x) (((x)&0x03FF)<<6) argument
222 #define MCF_CCM_CDR_SSIDIV(x) (((x)&0x000F)<<0) argument
223 #define MCF_CCM_CDR_LPDIV(x) (((x)&0x000F)<<8) argument
229 #define MCF_CCM_UHCSR_PORTIND(x) (((x)&0x0003)<<14) argument
246 #define MCF_CCM_UOCSR_PORTIND(x) (((x)&0x0003)<<14) argument
[all …]
Dm54xxgpt.h35 #define MCF_GPT_GMS(x) (MCF_MBAR + 0x000800 + ((x) * 0x010)) argument
36 #define MCF_GPT_GCIR(x) (MCF_MBAR + 0x000804 + ((x) * 0x010)) argument
37 #define MCF_GPT_GPWM(x) (MCF_MBAR + 0x000808 + ((x) * 0x010)) argument
38 #define MCF_GPT_GSR(x) (MCF_MBAR + 0x00080C + ((x) * 0x010)) argument
41 #define MCF_GPT_GMS_TMS(x) (((x)&0x00000007)<<0) argument
42 #define MCF_GPT_GMS_GPIO(x) (((x)&0x00000003)<<4) argument
48 #define MCF_GPT_GMS_ICT(x) (((x)&0x00000003)<<16) argument
49 #define MCF_GPT_GMS_OCT(x) (((x)&0x00000003)<<20) argument
50 #define MCF_GPT_GMS_OCPW(x) (((x)&0x000000FF)<<24) argument
71 #define MCF_GPT_GCIR_CNT(x) (((x)&0x0000FFFF)<<0) argument
[all …]
/linux-4.1.27/drivers/staging/comedi/drivers/
Dni_tio_internal.h24 #define NITIO_AUTO_INC_REG(x) (NITIO_G0_AUTO_INC + (x)) argument
26 #define NITIO_CMD_REG(x) (NITIO_G0_CMD + (x)) argument
31 #define GI_CNT_DIR(x) (((x) & 0x3) << 5) argument
42 #define NITIO_HW_SAVE_REG(x) (NITIO_G0_HW_SAVE + (x)) argument
43 #define NITIO_SW_SAVE_REG(x) (NITIO_G0_SW_SAVE + (x)) argument
44 #define NITIO_MODE_REG(x) (NITIO_G0_MODE + (x)) argument
74 #define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x)) argument
75 #define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x)) argument
76 #define NITIO_INPUT_SEL_REG(x) (NITIO_G0_INPUT_SEL + (x)) argument
79 #define GI_BITS_TO_SRC(x) (((x) >> 2) & 0x1f) argument
[all …]
Ds626.h222 #define S626_LP_RDDIN(x) (0x0040 + (x) * 0x10) /* R: digital input */ argument
223 #define S626_LP_WRINTSEL(x) (0x0042 + (x) * 0x10) /* W: int enable */ argument
224 #define S626_LP_WREDGSEL(x) (0x0044 + (x) * 0x10) /* W: edge selection */ argument
225 #define S626_LP_WRCAPSEL(x) (0x0046 + (x) * 0x10) /* W: capture enable */ argument
226 #define S626_LP_RDCAPFLG(x) (0x0048 + (x) * 0x10) /* R: edges captured */ argument
227 #define S626_LP_WRDOUT(x) (0x0048 + (x) * 0x10) /* W: digital output */ argument
228 #define S626_LP_RDINTSEL(x) (0x004a + (x) * 0x10) /* R: int enable */ argument
229 #define S626_LP_RDEDGSEL(x) (0x004c + (x) * 0x10) /* R: edge selection */ argument
230 #define S626_LP_RDCAPSEL(x) (0x004e + (x) * 0x10) /* R: capture enable */ argument
233 #define S626_LP_CRA(x) (0x0000 + (((x) % 3) * 0x4)) argument
[all …]
/linux-4.1.27/crypto/
Dsalsa20_generic.c60 u32 x[16]; in salsa20_wordtobyte() local
63 memcpy(x, input, sizeof(x)); in salsa20_wordtobyte()
65 x[ 4] ^= rol32((x[ 0] + x[12]), 7); in salsa20_wordtobyte()
66 x[ 8] ^= rol32((x[ 4] + x[ 0]), 9); in salsa20_wordtobyte()
67 x[12] ^= rol32((x[ 8] + x[ 4]), 13); in salsa20_wordtobyte()
68 x[ 0] ^= rol32((x[12] + x[ 8]), 18); in salsa20_wordtobyte()
69 x[ 9] ^= rol32((x[ 5] + x[ 1]), 7); in salsa20_wordtobyte()
70 x[13] ^= rol32((x[ 9] + x[ 5]), 9); in salsa20_wordtobyte()
71 x[ 1] ^= rol32((x[13] + x[ 9]), 13); in salsa20_wordtobyte()
72 x[ 5] ^= rol32((x[ 1] + x[13]), 18); in salsa20_wordtobyte()
[all …]
Dtgr192.c401 static void tgr192_round(u64 * ra, u64 * rb, u64 * rc, u64 x, int mul) in tgr192_round() argument
407 c ^= x; in tgr192_round()
420 static void tgr192_pass(u64 * ra, u64 * rb, u64 * rc, u64 * x, int mul) in tgr192_pass() argument
426 tgr192_round(&a, &b, &c, x[0], mul); in tgr192_pass()
427 tgr192_round(&b, &c, &a, x[1], mul); in tgr192_pass()
428 tgr192_round(&c, &a, &b, x[2], mul); in tgr192_pass()
429 tgr192_round(&a, &b, &c, x[3], mul); in tgr192_pass()
430 tgr192_round(&b, &c, &a, x[4], mul); in tgr192_pass()
431 tgr192_round(&c, &a, &b, x[5], mul); in tgr192_pass()
432 tgr192_round(&a, &b, &c, x[6], mul); in tgr192_pass()
[all …]
/linux-4.1.27/drivers/net/ethernet/intel/ixgbevf/
Dregs.h41 #define IXGBE_VTEITR(x) (0x00820 + (4 * (x))) argument
42 #define IXGBE_VTIVAR(x) (0x00120 + (4 * (x))) argument
44 #define IXGBE_VTRSCINT(x) (0x00180 + (4 * (x))) argument
45 #define IXGBE_VFRDBAL(x) (0x01000 + (0x40 * (x))) argument
46 #define IXGBE_VFRDBAH(x) (0x01004 + (0x40 * (x))) argument
47 #define IXGBE_VFRDLEN(x) (0x01008 + (0x40 * (x))) argument
48 #define IXGBE_VFRDH(x) (0x01010 + (0x40 * (x))) argument
49 #define IXGBE_VFRDT(x) (0x01018 + (0x40 * (x))) argument
50 #define IXGBE_VFRXDCTL(x) (0x01028 + (0x40 * (x))) argument
51 #define IXGBE_VFSRRCTL(x) (0x01014 + (0x40 * (x))) argument
[all …]
/linux-4.1.27/arch/arm/mach-s3c24xx/include/mach/
Dregs-lcd.h15 #define S3C2410_LCDREG(x) (x) argument
24 #define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8) argument
48 #define S3C2410_LCDCON2_VBPD(x) ((x) << 24) argument
49 #define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) argument
50 #define S3C2410_LCDCON2_VFPD(x) ((x) << 6) argument
51 #define S3C2410_LCDCON2_VSPW(x) ((x) << 0) argument
53 #define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) argument
54 #define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) argument
55 #define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) argument
57 #define S3C2410_LCDCON3_HBPD(x) ((x) << 19) argument
[all …]
/linux-4.1.27/drivers/gpu/drm/exynos/
Dregs-gsc.h97 #define GSC_SRCIMG_HEIGHT(x) ((x) << 16) argument
99 #define GSC_SRCIMG_WIDTH(x) ((x) << 0) argument
104 #define GSC_SRCIMG_OFFSET_Y(x) ((x) << 16) argument
106 #define GSC_SRCIMG_OFFSET_X(x) ((x) << 0) argument
111 #define GSC_CROPPED_HEIGHT(x) ((x) << 16) argument
113 #define GSC_CROPPED_WIDTH(x) ((x) << 0) argument
118 #define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24) argument
153 #define GSC_SCALED_HEIGHT(x) ((x) << 16) argument
155 #define GSC_SCALED_WIDTH(x) ((x) << 0) argument
160 #define GSC_PRESC_SHFACTOR(x) ((x) << 28) argument
[all …]
Dregs-fimc.h324 #define EXYNOS_CISRCFMT_SOURCEHSIZE(x) ((x) << 16) argument
325 #define EXYNOS_CISRCFMT_SOURCEVSIZE(x) ((x) << 0) argument
327 #define EXYNOS_CIWDOFST_WINHOROFST(x) ((x) << 16) argument
328 #define EXYNOS_CIWDOFST_WINVEROFST(x) ((x) << 0) argument
330 #define EXYNOS_CIWDOFST2_WINHOROFST2(x) ((x) << 16) argument
331 #define EXYNOS_CIWDOFST2_WINVEROFST2(x) ((x) << 0) argument
333 #define EXYNOS_CITRGFMT_TARGETHSIZE(x) (((x) & 0x1fff) << 16) argument
334 #define EXYNOS_CITRGFMT_TARGETVSIZE(x) (((x) & 0x1fff) << 0) argument
336 #define EXYNOS_CISCPRERATIO_SHFACTOR(x) ((x) << 28) argument
337 #define EXYNOS_CISCPRERATIO_PREHORRATIO(x) ((x) << 16) argument
[all …]
Dregs-mixer.h116 #define MXR_GRP_CFG_FORMAT_VAL(x) MXR_MASK_VAL(x, 11, 8) argument
118 #define MXR_GRP_CFG_ALPHA_VAL(x) MXR_MASK_VAL(x, 7, 0) argument
121 #define MXR_GRP_WH_H_SCALE(x) MXR_MASK_VAL(x, 28, 28) argument
122 #define MXR_GRP_WH_V_SCALE(x) MXR_MASK_VAL(x, 12, 12) argument
123 #define MXR_GRP_WH_WIDTH(x) MXR_MASK_VAL(x, 26, 16) argument
124 #define MXR_GRP_WH_HEIGHT(x) MXR_MASK_VAL(x, 10, 0) argument
127 #define MXR_MXR_RES_HEIGHT(x) MXR_MASK_VAL(x, 26, 16) argument
128 #define MXR_MXR_RES_WIDTH(x) MXR_MASK_VAL(x, 10, 0) argument
131 #define MXR_GRP_SXY_SX(x) MXR_MASK_VAL(x, 26, 16) argument
132 #define MXR_GRP_SXY_SY(x) MXR_MASK_VAL(x, 10, 0) argument
[all …]
Dregs-rotator.h37 #define ROT_STATUS_IRQ_PENDING(x) (1 << (x)) argument
38 #define ROT_STATUS_IRQ(x) (((x) >> 8) & 0x3) argument
49 #define ROT_SET_BUF_SIZE_H(x) ((x) << 16) argument
50 #define ROT_SET_BUF_SIZE_W(x) ((x) << 0) argument
51 #define ROT_GET_BUF_SIZE_H(x) ((x) >> 16) argument
52 #define ROT_GET_BUF_SIZE_W(x) ((x) & 0xffff) argument
57 #define ROT_CROP_POS_Y(x) ((x) << 16) argument
58 #define ROT_CROP_POS_X(x) ((x) << 0) argument
62 #define ROT_SRC_CROP_SIZE_H(x) ((x) << 16) argument
63 #define ROT_SRC_CROP_SIZE_W(x) ((x) << 0) argument
[all …]
/linux-4.1.27/drivers/atm/
Dhe.h55 #define TPDRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TPDRQ_SIZE<<3)-1)) argument
59 #define RBRQ_MASK(x) (((unsigned long)(x))&((CONFIG_RBRQ_SIZE<<3)-1)) argument
63 #define TBRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TBRQ_SIZE<<2)-1)) argument
68 #define RBPL_MASK(x) (((unsigned long)(x))&((CONFIG_RBPL_SIZE<<3)-1)) argument
109 #define ITYPE_GROUP(x) (x & 0x7) argument
110 #define ITYPE_TYPE(x) (x & 0xf8) argument
144 #define TPD_ADDR(x) ((x) & TPD_MASK) argument
145 #define TPD_INDEX(x) (TPD_ADDR(x) >> TPD_ADDR_SHIFT) argument
374 #define SWAP_RNUM_MAX(x) (x<<27) argument
411 #define IRQ_BASE(x) (x<<12) argument
[all …]
/linux-4.1.27/arch/sparc/include/asm/
Dpage_32.h62 #define pte_val(x) ((x).pte) argument
63 #define iopte_val(x) ((x).iopte) argument
64 #define pmd_val(x) ((x).pmdv[0]) argument
65 #define pgd_val(x) ((x).pgd) argument
66 #define ctxd_val(x) ((x).ctxd) argument
67 #define pgprot_val(x) ((x).pgprot) argument
68 #define iopgprot_val(x) ((x).iopgprot) argument
70 #define __pte(x) ((pte_t) { (x) } ) argument
71 #define __iopte(x) ((iopte_t) { (x) } ) argument
73 #define __pgd(x) ((pgd_t) { (x) } ) argument
[all …]
Dpage_64.h64 #define pte_val(x) ((x).pte) argument
65 #define iopte_val(x) ((x).iopte) argument
66 #define pmd_val(x) ((x).pmd) argument
67 #define pud_val(x) ((x).pud) argument
68 #define pgd_val(x) ((x).pgd) argument
69 #define pgprot_val(x) ((x).pgprot) argument
71 #define __pte(x) ((pte_t) { (x) } ) argument
72 #define __iopte(x) ((iopte_t) { (x) } ) argument
73 #define __pmd(x) ((pmd_t) { (x) } ) argument
74 #define __pud(x) ((pud_t) { (x) } ) argument
[all …]
/linux-4.1.27/arch/cris/include/arch-v10/arch/
Dio.h39 #define CRIS_LED_NETWORK_SET_G(x) argument
40 #define CRIS_LED_NETWORK_SET_R(x) argument
41 #define CRIS_LED_ACTIVE_SET_G(x) argument
42 #define CRIS_LED_ACTIVE_SET_R(x) argument
43 #define CRIS_LED_DISK_WRITE(x) argument
44 #define CRIS_LED_DISK_READ(x) argument
48 #define CRIS_LED_BIT_SET(x) argument
49 #define CRIS_LED_BIT_CLR(x) argument
58 #define CRIS_LED_NETWORK_SET(x) argument
61 #define CRIS_LED_NETWORK_SET(x) \ argument
[all …]
/linux-4.1.27/drivers/edac/
Dmce_amd.h8 #define EC(x) ((x) & 0xffff) argument
9 #define XEC(x, mask) (((x) >> 16) & mask) argument
11 #define LOW_SYNDROME(x) (((x) >> 15) & 0xff) argument
12 #define HIGH_SYNDROME(x) (((x) >> 24) & 0xff) argument
14 #define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010) argument
15 #define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100) argument
16 #define BUS_ERROR(x) (((x) & 0xF800) == 0x0800) argument
17 #define INT_ERROR(x) (((x) & 0xF4FF) == 0x0400) argument
19 #define TT(x) (((x) >> 2) & 0x3) argument
20 #define TT_MSG(x) tt_msgs[TT(x)] argument
[all …]
/linux-4.1.27/drivers/rapidio/devices/
Dtsi721.h111 #define TSI721_RIO_PW_RX_CAPT(x) (0x10a20 + (x)*4) argument
119 #define TSI721_IDQ_CTL(x) (0x20000 + (x) * 0x1000) argument
123 #define TSI721_IDQ_STS(x) (0x20004 + (x) * 0x1000) argument
126 #define TSI721_IDQ_MASK(x) (0x20008 + (x) * 0x1000) argument
130 #define TSI721_IDQ_RP(x) (0x2000c + (x) * 0x1000) argument
133 #define TSI721_IDQ_WP(x) (0x20010 + (x) * 0x1000) argument
136 #define TSI721_IDQ_BASEL(x) (0x20014 + (x) * 0x1000) argument
138 #define TSI721_IDQ_BASEU(x) (0x20018 + (x) * 0x1000) argument
139 #define TSI721_IDQ_SIZE(x) (0x2001c + (x) * 0x1000) argument
144 #define TSI721_SR_CHINT(x) (0x20040 + (x) * 0x1000) argument
[all …]
/linux-4.1.27/drivers/video/fbdev/mbx/
Dreg_bits.h32 #define Core_Pll_M(x) ((x) << FShft(CORE_PLL_M)) argument
34 #define Core_Pll_N(x) ((x) << FShft(CORE_PLL_N)) argument
36 #define Core_Pll_P(x) ((x) << FShft(CORE_PLL_P)) argument
41 #define Disp_Pll_M(x) ((x) << FShft(DISP_PLL_M)) argument
43 #define Disp_Pll_N(x) ((x) << FShft(DISP_PLL_N)) argument
45 #define Disp_Pll_P(x) ((x) << FShft(DISP_PLL_P)) argument
87 #define Pixclkdiv_Pd(x) ((x) << FShft(PIXCLKDIV_PD)) argument
91 #define Lcdcfg_In_Fmt(x) ((x) << FShft(LCDCFG_IN_FMT)) argument
167 #define Lmtim_Tras(x) ((x) << FShft(LMTIM_TRAS)) argument
169 #define Lmtim_Trp(x) ((x) << FShft(LMTIM_TRP)) argument
[all …]
/linux-4.1.27/arch/ia64/include/asm/sn/
Daddrs.h112 #define NODE_OFFSET(x) ((x) & (NODE_ADDRSPACE_SIZE - 1)) argument
114 #define NASID_GET(x) (int) (((u64) (x) >> NASID_SHIFT) & NASID_BITMASK) argument
119 #define CHANGE_NASID(n,x) ((void *)(((u64)(x) & ~NASID_MASK) | NASID_SPACE(n))) argument
137 #define TO_PHYS(x) (TO_PHYS_MASK & (x)) argument
138 #define TO_CAC(x) (CAC_BASE | TO_PHYS(x)) argument
140 #define TO_AMO(x) (AMO_BASE | TO_PHYS(x)) argument
141 #define TO_GET(x) (GET_BASE | TO_PHYS(x)) argument
143 #define TO_AMO(x) ({ BUG(); x; }) argument
144 #define TO_GET(x) ({ BUG(); x; }) argument
155 #define SH1_TIO_PHYS_TO_DMA(x) \ argument
[all …]
/linux-4.1.27/drivers/gpu/drm/tegra/
Dhdmi.h85 #define INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0) argument
86 #define INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8) argument
87 #define INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16) argument
123 #define ACR_SUBPACK_CTS(x) (((x) & 0xffffff) << 8) argument
124 #define ACR_SUBPACK_N(x) (((x) & 0xffffff) << 0) argument
128 #define HDMI_CTRL_REKEY(x) (((x) & 0x7f) << 0) argument
129 #define HDMI_CTRL_MAX_AC_PACKET(x) (((x) & 0x1f) << 16) argument
134 #define VSYNC_WINDOW_END(x) (((x) & 0x3ff) << 0) argument
135 #define VSYNC_WINDOW_START(x) (((x) & 0x3ff) << 16) argument
150 #define SPARE_CTS_RESET_VAL(x) (((x) & 0x7) << 16) argument
[all …]
Dsor.h41 #define SOR_STATE_ASY_OWNER(x) (((x) & 0xf) << 0) argument
43 #define SOR_HEAD_STATE_0(x) (0x05 + (x)) argument
44 #define SOR_HEAD_STATE_1(x) (0x07 + (x)) argument
45 #define SOR_HEAD_STATE_2(x) (0x09 + (x)) argument
46 #define SOR_HEAD_STATE_3(x) (0x0b + (x)) argument
47 #define SOR_HEAD_STATE_4(x) (0x0d + (x)) argument
48 #define SOR_HEAD_STATE_5(x) (0x0f + (x)) argument
55 #define SOR_CLK_CNTRL_DP_LINK_SPEED(x) (((x) & 0x1f) << 2) argument
80 #define SOR_PLL_0_ICHPMP(x) (((x) & 0xf) << 24) argument
82 #define SOR_PLL_0_VCOCAP(x) (((x) & 0xf) << 8) argument
[all …]
Ddc.h90 #define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x)) argument
91 #define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x)) argument
94 #define DC_COM_PIN_OUTPUT_DATA(x) (0x30a + (x)) argument
95 #define DC_COM_PIN_INPUT_ENABLE(x) (0x30e + (x)) argument
96 #define DC_COM_PIN_INPUT_DATA(x) (0x312 + (x)) argument
97 #define DC_COM_PIN_OUTPUT_SELECT(x) (0x314 + (x)) argument
130 #define CURSOR_THRESHOLD(x) (((x) & 0x03) << 24) argument
131 #define WINDOW_A_THRESHOLD(x) (((x) & 0x7f) << 16) argument
132 #define WINDOW_B_THRESHOLD(x) (((x) & 0x7f) << 8) argument
133 #define WINDOW_C_THRESHOLD(x) (((x) & 0xff) << 0) argument
[all …]
Ddsi.h40 #define DSI_CONTROL_TX_TRIG(x) (((x) & 0x3) << 8) argument
91 #define DSI_TIMEOUT_LRX(x) (((x) & 0xffff) << 16) argument
92 #define DSI_TIMEOUT_HTX(x) (((x) & 0xffff) << 0) argument
94 #define DSI_TIMEOUT_PR(x) (((x) & 0xffff) << 16) argument
95 #define DSI_TIMEOUT_TA(x) (((x) & 0xffff) << 0) argument
97 #define DSI_TALLY_TA(x) (((x) & 0xff) << 16) argument
98 #define DSI_TALLY_LRX(x) (((x) & 0xff) << 8) argument
99 #define DSI_TALLY_HTX(x) (((x) & 0xff) << 0) argument
101 #define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0) argument
103 #define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16) argument
[all …]
Ddpaux.h21 #define DPAUX_DP_AUXDATA_WRITE(x) (0x09 + ((x) << 2)) argument
22 #define DPAUX_DP_AUXDATA_READ(x) (0x19 + ((x) << 2)) argument
36 #define DPAUX_DP_AUXCTL_CMDLEN(x) ((x) & 0xff) argument
51 #define DPAUX_HPD_CONFIG_UNPLUG_MIN_TIME(x) (((x) & 0xffff) << 16) argument
52 #define DPAUX_HPD_CONFIG_PLUG_MIN_TIME(x) ((x) & 0xffff) argument
55 #define DPAUX_HPD_IRQ_CONFIG_MIN_LOW_TIME(x) ((x) & 0xffff) argument
60 #define DPAUX_HYBRID_PADCTL_AUX_CMH(x) (((x) & 0x3) << 12) argument
61 #define DPAUX_HYBRID_PADCTL_AUX_DRVZ(x) (((x) & 0x7) << 8) argument
62 #define DPAUX_HYBRID_PADCTL_AUX_DRVI(x) (((x) & 0x3f) << 2) argument
/linux-4.1.27/include/linux/usb/
Dphy.h70 int (*read)(struct usb_phy *x, u32 reg);
71 int (*write)(struct usb_phy *x, u32 val, u32 reg);
99 int (*init)(struct usb_phy *x);
100 void (*shutdown)(struct usb_phy *x);
103 int (*set_vbus)(struct usb_phy *x, int on);
106 int (*set_power)(struct usb_phy *x,
110 int (*set_suspend)(struct usb_phy *x,
118 int (*set_wakeup)(struct usb_phy *x, bool enabled);
121 int (*notify_connect)(struct usb_phy *x,
123 int (*notify_disconnect)(struct usb_phy *x,
[all …]
/linux-4.1.27/arch/arm64/include/asm/
Dpgtable-types.h38 #define pte_val(x) ((x).pte) argument
39 #define __pte(x) ((pte_t) { (x) } ) argument
43 #define pmd_val(x) ((x).pmd) argument
44 #define __pmd(x) ((pmd_t) { (x) } ) argument
49 #define pud_val(x) ((x).pud) argument
50 #define __pud(x) ((pud_t) { (x) } ) argument
54 #define pgd_val(x) ((x).pgd) argument
55 #define __pgd(x) ((pgd_t) { (x) } ) argument
58 #define pgprot_val(x) ((x).pgprot) argument
59 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
[all …]
/linux-4.1.27/arch/sh/include/mach-common/mach/
Dmangle-port.h27 # define ioswabb(x) (x) argument
28 # define __mem_ioswabb(x) (x) argument
29 # define ioswabw(x) le16_to_cpu(x) argument
30 # define __mem_ioswabw(x) (x) argument
31 # define ioswabl(x) le32_to_cpu(x) argument
32 # define __mem_ioswabl(x) (x) argument
33 # define ioswabq(x) le64_to_cpu(x) argument
34 # define __mem_ioswabq(x) (x) argument
38 # define ioswabb(x) (x) argument
39 # define __mem_ioswabb(x) (x) argument
[all …]
/linux-4.1.27/drivers/media/dvb-frontends/drx39xyj/
Ddrx_driver.h451 #define DRX_16TO8(x) ((u8) (((u16)x) & 0xFF)), \ argument
452 ((u8)((((u16)x)>>8)&0xFF))
457 #define DRX_S9TOS16(x) ((((u16)x)&0x100) ? ((s16)((u16)(x)|0xFF00)) : (x)) argument
462 #define DRX_S24TODRXFREQ(x) ((((u32) x) & 0x00800000UL) ? \ argument
464 (((u32) x) | 0xFF000000)) : \
465 ((s32) x))
470 #define DRX_U16TODRXFREQ(x) ((x & 0x8000) ? \ argument
472 (((u32) x) | 0xFFFF0000)) : \
473 ((s32) x))
1938 #define DRX_STR_STANDARD(x) ( \ argument
[all …]
/linux-4.1.27/arch/mips/include/asm/
Dinst.h20 #define MIPSInst(x) x argument
23 #define MIPSInst_OPCODE(x) (MIPSInst(x) >> I_OPCODE_SFT) argument
26 #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff) argument
29 #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT) argument
32 #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT) argument
35 #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff))) argument
36 #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff) argument
39 #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT) argument
42 #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT) argument
45 #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT) argument
[all …]
Ddebug.h30 #define db_assert(x) if (!(x)) { \ argument
31 panic("assertion failed at %s:%d: %s", __FILE__, __LINE__, #x); }
32 #define db_warn(x) if (!(x)) { \ argument
33 printk(KERN_WARNING "warning at %s:%d: %s", __FILE__, __LINE__, #x); }
34 #define db_verify(x, y) db_assert(x y) argument
35 #define db_verify_warn(x, y) db_warn(x y) argument
36 #define db_run(x) do { x; } while (0) argument
40 #define db_assert(x) argument
41 #define db_warn(x) argument
42 #define db_verify(x, y) x argument
[all …]
Dpage.h120 #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) argument
121 #define __pte(x) ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) argument
124 #define pte_val(x) ((x).pte) argument
125 #define __pte(x) ((pte_t) { (x) } ) argument
129 #define pte_val(x) ((x).pte) argument
130 #define __pte(x) ((pte_t) { (x) } ) argument
143 #define pgd_val(x) ((x).pgd) argument
144 #define __pgd(x) ((pgd_t) { (x) } ) argument
150 #define pgprot_val(x) ((x).pgprot) argument
151 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
[all …]
/linux-4.1.27/include/asm-generic/
Dint-ll64.h27 #define S8_C(x) x argument
28 #define U8_C(x) x ## U argument
29 #define S16_C(x) x argument
30 #define U16_C(x) x ## U argument
31 #define S32_C(x) x argument
32 #define U32_C(x) x ## U argument
33 #define S64_C(x) x ## LL argument
34 #define U64_C(x) x ## ULL argument
38 #define S8_C(x) x argument
39 #define U8_C(x) x argument
[all …]
/linux-4.1.27/arch/avr32/mach-at32ap/include/mach/
Dio.h10 # define ioswabb(a, x) (x) argument
11 # define ioswabw(a, x) (x) argument
12 # define ioswabl(a, x) (x) argument
13 # define __mem_ioswabb(a, x) (x) argument
14 # define __mem_ioswabw(a, x) swab16(x) argument
15 # define __mem_ioswabl(a, x) swab32(x) argument
20 # define ioswabb(a, x) (x) argument
21 # define ioswabw(a, x) (x) argument
22 # define ioswabl(a, x) swahw32(x) argument
23 # define __mem_ioswabb(a, x) (x) argument
[all …]
/linux-4.1.27/net/xfrm/
Dxfrm_state.c71 struct xfrm_state *x; in xfrm_hash_transfer() local
73 hlist_for_each_entry_safe(x, tmp, list, bydst) { in xfrm_hash_transfer()
76 h = __xfrm_dst_hash(&x->id.daddr, &x->props.saddr, in xfrm_hash_transfer()
77 x->props.reqid, x->props.family, in xfrm_hash_transfer()
79 hlist_add_head(&x->bydst, ndsttable+h); in xfrm_hash_transfer()
81 h = __xfrm_src_hash(&x->id.daddr, &x->props.saddr, in xfrm_hash_transfer()
82 x->props.family, in xfrm_hash_transfer()
84 hlist_add_head(&x->bysrc, nsrctable+h); in xfrm_hash_transfer()
86 if (x->id.spi) { in xfrm_hash_transfer()
87 h = __xfrm_spi_hash(&x->id.daddr, x->id.spi, in xfrm_hash_transfer()
[all …]
Dxfrm_replay.c24 u32 xfrm_replay_seqhi(struct xfrm_state *x, __be32 net_seq) in xfrm_replay_seqhi() argument
27 struct xfrm_replay_state_esn *replay_esn = x->replay_esn; in xfrm_replay_seqhi()
29 if (!(x->props.flags & XFRM_STATE_ESN)) in xfrm_replay_seqhi()
49 static void xfrm_replay_notify(struct xfrm_state *x, int event) in xfrm_replay_notify() argument
64 if (!x->replay_maxdiff || in xfrm_replay_notify()
65 ((x->replay.seq - x->preplay.seq < x->replay_maxdiff) && in xfrm_replay_notify()
66 (x->replay.oseq - x->preplay.oseq < x->replay_maxdiff))) { in xfrm_replay_notify()
67 if (x->xflags & XFRM_TIME_DEFER) in xfrm_replay_notify()
76 if (memcmp(&x->replay, &x->preplay, in xfrm_replay_notify()
78 x->xflags |= XFRM_TIME_DEFER; in xfrm_replay_notify()
[all …]
/linux-4.1.27/drivers/gpu/drm/amd/amdkfd/
Dcik_regs.h31 #define PIPEID(x) ((x) << 0) argument
32 #define MEID(x) ((x) << 2) argument
33 #define VMID(x) ((x) << 4) argument
34 #define QUEUEID(x) ((x) << 8) argument
40 #define PRIVATE_BASE(x) ((x) << 0) /* scratch */ argument
41 #define SHARED_BASE(x) ((x) << 16) /* LDS */ argument
49 #define ALIGNMENT_MODE(x) ((x) << 2) argument
54 #define DEFAULT_MTYPE(x) ((x) << 4) argument
55 #define APE1_MTYPE(x) ((x) << 7) argument
114 #define EOP_SIZE(x) ((x) << 0) argument
[all …]
/linux-4.1.27/drivers/usb/c67x00/
Dc67x00.h43 #define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A) argument
45 #define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400) argument
47 #define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080) argument
48 #define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001) argument
51 #define USB_STAT_REG(x) ((x) ? 0xC0B0 : 0xC090) argument
70 #define HOST_CTL_REG(x) ((x) ? 0xC0A0 : 0xC080) argument
78 #define HOST_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) argument
88 #define PORT_CONNECT_CHANGE(x) ((x) ? 0x0020 : 0x0010) argument
89 #define PORT_SE0_STATUS(x) ((x) ? 0x0008 : 0x0004) argument
92 #define HOST_FRAME_REG(x) ((x) ? 0xC0B6 : 0xC096) argument
[all …]
/linux-4.1.27/arch/mips/include/asm/mach-generic/
Dmangle-port.h30 # define ioswabb(a, x) (x) argument
31 # define __mem_ioswabb(a, x) (x) argument
32 # define ioswabw(a, x) le16_to_cpu(x) argument
33 # define __mem_ioswabw(a, x) (x) argument
34 # define ioswabl(a, x) le32_to_cpu(x) argument
35 # define __mem_ioswabl(a, x) (x) argument
36 # define ioswabq(a, x) le64_to_cpu(x) argument
37 # define __mem_ioswabq(a, x) (x) argument
41 # define ioswabb(a, x) (x) argument
42 # define __mem_ioswabb(a, x) (x) argument
[all …]
/linux-4.1.27/kernel/sched/
Dcompletion.c29 void complete(struct completion *x) in complete() argument
33 spin_lock_irqsave(&x->wait.lock, flags); in complete()
34 x->done++; in complete()
35 __wake_up_locked(&x->wait, TASK_NORMAL, 1); in complete()
36 spin_unlock_irqrestore(&x->wait.lock, flags); in complete()
49 void complete_all(struct completion *x) in complete_all() argument
53 spin_lock_irqsave(&x->wait.lock, flags); in complete_all()
54 x->done += UINT_MAX/2; in complete_all()
55 __wake_up_locked(&x->wait, TASK_NORMAL, 0); in complete_all()
56 spin_unlock_irqrestore(&x->wait.lock, flags); in complete_all()
[all …]
/linux-4.1.27/arch/parisc/include/asm/
Dpage.h48 #define pte_val(x) ((x).pte) argument
50 #define pmd_val(x) ((x).pmd + 0) argument
51 #define pgd_val(x) ((x).pgd + 0) argument
52 #define pgprot_val(x) ((x).pgprot) argument
54 #define __pte(x) ((pte_t) { (x) } ) argument
55 #define __pmd(x) ((pmd_t) { (x) } ) argument
56 #define __pgd(x) ((pgd_t) { (x) } ) argument
57 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
59 #define __pmd_val_set(x,n) (x).pmd = (n) argument
60 #define __pgd_val_set(x,n) (x).pgd = (n) argument
[all …]
/linux-4.1.27/drivers/macintosh/
Dtherm_windtunnel.c69 } x; variable
71 #define T(x,y) (((x)<<8) | (y)*0x100/10 ) argument
101 return sprintf(buf, "%d.%d\n", x.temp>>8, (x.temp & 255)*10/256 ); in show_cpu_temperature()
107 return sprintf(buf, "%d.%d\n", x.casetemp>>8, (x.casetemp & 255)*10/256 ); in show_case_temperature()
158 write_reg( x.fan, 0x25, val, 1 ); in tune_fan()
159 write_reg( x.fan, 0x20, 0, 1 ); in tune_fan()
160 print_temp("CPU-temp: ", x.temp ); in tune_fan()
161 if( x.casetemp ) in tune_fan()
162 print_temp(", Case: ", x.casetemp ); in tune_fan()
163 printk(", Fan: %d (tuned %+d)\n", 11-fan_setting, x.fan_level-fan_setting ); in tune_fan()
[all …]
/linux-4.1.27/include/linux/mfd/
Dmc13xxx.h135 #define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11) argument
136 #define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14) argument
141 #define MC13783_LED_C2_CURRENT_MD(x) (((x) & 0x7) << 0) argument
142 #define MC13783_LED_C2_CURRENT_AD(x) (((x) & 0x7) << 3) argument
143 #define MC13783_LED_C2_CURRENT_KP(x) (((x) & 0x7) << 6) argument
144 #define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21) argument
147 #define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0) argument
148 #define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2) argument
149 #define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4) argument
150 #define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21) argument
[all …]
/linux-4.1.27/arch/powerpc/include/asm/
Dpage.h208 #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + VIRT_PHYS_OFFSET)) argument
209 #define __pa(x) ((unsigned long)(x) - VIRT_PHYS_OFFSET) argument
216 #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) | PAGE_OFFSET)) argument
217 #define __pa(x) ((unsigned long)(x) & 0x0fffffffffffffffUL) argument
220 #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + PAGE_OFFSET - MEMORY_START)) argument
221 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START) argument
254 #define is_kernel_addr(x) ((x) >= 0x8000000000000000ul) argument
256 #define is_kernel_addr(x) ((x) >= PAGE_OFFSET) argument
288 #define pte_val(x) ((x).pte) argument
289 #define __pte(x) ((pte_t) { (x) }) argument
[all …]
Dpasemi_dma.h90 #define PAS_DMA_RXINT_CFG_DHL(x) (((x) << PAS_DMA_RXINT_CFG_DHL_S) & \ argument
102 #define PAS_DMA_RXINT_INCR_INCR(x) ((x) & 0x0000ffff) argument
104 #define PAS_DMA_RXINT_BASEL_BRBL(x) ((x) & ~0x3f) argument
106 #define PAS_DMA_RXINT_BASEU_BRBH(x) ((x) & 0xfff) argument
109 #define PAS_DMA_RXINT_BASEU_SIZ(x) (((x) << PAS_DMA_RXINT_BASEU_SIZ_S) & \ argument
136 #define PAS_DMA_TXCHAN_CFG_TATTR(x) (((x) << PAS_DMA_TXCHAN_CFG_TATTR_S) & \ argument
142 #define PAS_DMA_TXCHAN_CFG_WT(x) (((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \ argument
153 #define PAS_DMA_TXCHAN_BASEL_BRBL(x) (((x) << PAS_DMA_TXCHAN_BASEL_BRBL_S) & \ argument
158 #define PAS_DMA_TXCHAN_BASEU_BRBH(x) (((x) << PAS_DMA_TXCHAN_BASEU_BRBH_S) & \ argument
163 #define PAS_DMA_TXCHAN_BASEU_SIZ(x) (((x) << PAS_DMA_TXCHAN_BASEU_SIZ_S) & \ argument
[all …]
/linux-4.1.27/arch/arm/mach-imx/
Diomux-v1.h26 #define MXC_DDIR(x) (0x00 + ((x) << 8)) argument
27 #define MXC_OCR1(x) (0x04 + ((x) << 8)) argument
28 #define MXC_OCR2(x) (0x08 + ((x) << 8)) argument
29 #define MXC_ICONFA1(x) (0x0c + ((x) << 8)) argument
30 #define MXC_ICONFA2(x) (0x10 + ((x) << 8)) argument
31 #define MXC_ICONFB1(x) (0x14 + ((x) << 8)) argument
32 #define MXC_ICONFB2(x) (0x18 + ((x) << 8)) argument
33 #define MXC_DR(x) (0x1c + ((x) << 8)) argument
34 #define MXC_GIUS(x) (0x20 + ((x) << 8)) argument
35 #define MXC_SSR(x) (0x24 + ((x) << 8)) argument
[all …]
/linux-4.1.27/include/video/
Dili9320.h15 #define ILI9320_REG(x) (x) argument
87 #define ILI9320_ENTRYMODE_ID(x) ((x) << 4) argument
95 #define ILI9320_RESIZING_RSZ(x) ((x) << 0) argument
96 #define ILI9320_RESIZING_RCH(x) ((x) << 4) argument
97 #define ILI9320_RESIZING_RCV(x) ((x) << 8) argument
100 #define ILI9320_DISPLAY1_D(x) ((x) << 0) argument
105 #define ILI9320_DISPLAY1_PTDE(x) ((x) << 12) argument
108 #define ILI9320_DISPLAY2_BP(x) ((x) << 0) argument
109 #define ILI9320_DISPLAY2_FP(x) ((x) << 8) argument
122 #define ILI9320_RGBIF1_ENC_FRAMES(x) (((x) - 1)<< 13) argument
[all …]
/linux-4.1.27/arch/arm/mach-omap1/
Dpm.h144 #define omap_serial_wake_trigger(x) {} argument
147 #define ARM_SAVE(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] = omap_readl(x) argument
148 #define ARM_RESTORE(x) omap_writel((arm_sleep_save[ARM_SLEEP_SAVE_##x]), (x)) argument
149 #define ARM_SHOW(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] argument
151 #define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x) argument
152 #define DSP_RESTORE(x) __raw_writew((dsp_sleep_save[DSP_SLEEP_SAVE_##x]), (x)) argument
153 #define DSP_SHOW(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] argument
155 #define ULPD_SAVE(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] = omap_readw(x) argument
156 #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) argument
157 #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] argument
[all …]
/linux-4.1.27/arch/mips/include/asm/mach-cavium-octeon/
Dmangle-port.h52 # define ioswabb(a, x) (x) argument
53 # define __mem_ioswabb(a, x) (x) argument
54 # define ioswabw(a, x) le16_to_cpu(x) argument
55 # define __mem_ioswabw(a, x) (x) argument
56 # define ioswabl(a, x) le32_to_cpu(x) argument
57 # define __mem_ioswabl(a, x) (x) argument
58 # define ioswabq(a, x) le64_to_cpu(x) argument
59 # define __mem_ioswabq(a, x) (x) argument
63 # define ioswabb(a, x) (x) argument
64 # define __mem_ioswabb(a, x) (x) argument
[all …]
/linux-4.1.27/include/scsi/
Dscsi_transport_spi.h75 #define spi_period(x) (((struct spi_transport_attrs *)&(x)->starget_data)->period) argument
76 #define spi_min_period(x) (((struct spi_transport_attrs *)&(x)->starget_data)->min_period) argument
77 #define spi_offset(x) (((struct spi_transport_attrs *)&(x)->starget_data)->offset) argument
78 #define spi_max_offset(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_offset) argument
79 #define spi_width(x) (((struct spi_transport_attrs *)&(x)->starget_data)->width) argument
80 #define spi_max_width(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_width) argument
81 #define spi_iu(x) (((struct spi_transport_attrs *)&(x)->starget_data)->iu) argument
82 #define spi_max_iu(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_iu) argument
83 #define spi_dt(x) (((struct spi_transport_attrs *)&(x)->starget_data)->dt) argument
84 #define spi_qas(x) (((struct spi_transport_attrs *)&(x)->starget_data)->qas) argument
[all …]
Dscsi_transport_fc.h395 #define fc_starget_node_name(x) \ argument
396 (((struct fc_starget_attrs *)&(x)->starget_data)->node_name)
397 #define fc_starget_port_name(x) \ argument
398 (((struct fc_starget_attrs *)&(x)->starget_data)->port_name)
399 #define fc_starget_port_id(x) \ argument
400 (((struct fc_starget_attrs *)&(x)->starget_data)->port_id)
548 #define shost_to_fc_host(x) \ argument
549 ((struct fc_host_attrs *)(x)->shost_data)
551 #define fc_host_node_name(x) \ argument
552 (((struct fc_host_attrs *)(x)->shost_data)->node_name)
[all …]
/linux-4.1.27/include/linux/
Dpxa2xx_ssp.h50 #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */ argument
57 #define SSCR0_SCR(x) ((x) << 8) /* Serial Clock Rate (mask) */ argument
65 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ argument
94 #define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..16] */ argument
96 #define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */ argument
107 #define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..4] */ argument
109 #define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..4] */ argument
114 #define QUARK_X1000_SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..32] */ argument
125 #define QUARK_X1000_SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..32] */ argument
127 #define QUARK_X1000_SSCR1_RxTresh(x) (((x) - 1) << 11) /* level [1..32] */ argument
[all …]
Drio_regs.h56 #define RIO_GET_TOTAL_PORTS(x) ((x & RIO_SWP_INFO_PORT_TOTAL_MASK) >> 8) argument
57 #define RIO_GET_PORT_NUM(x) (x & RIO_SWP_INFO_PORT_NUM_MASK) argument
193 #define RIO_GET_BLOCK_PTR(x) ((x & RIO_EFB_PTR_MASK) >> 16) argument
194 #define RIO_GET_BLOCK_ID(x) (x & RIO_EFB_ID_MASK) argument
229 #define RIO_PORT_N_MNT_REQ_CSR(x) (0x0040 + x*0x20) /* 0x0002 */ argument
232 #define RIO_PORT_N_MNT_RSP_CSR(x) (0x0044 + x*0x20) /* 0x0002 */ argument
236 #define RIO_PORT_N_ACK_STS_CSR(x) (0x0048 + x*0x20) /* 0x0002 */ argument
241 #define RIO_PORT_N_ERR_STS_CSR(x) (0x0058 + x*0x20) argument
248 #define RIO_PORT_N_CTL_CSR(x) (0x005c + x*0x20) argument
283 #define RIO_EM_PN_ERR_DETECT(x) (0x040 + x*0x40) /* Port N Error Detect CSR */ argument
[all …]
Dcompiler.h13 # define __must_hold(x) __attribute__((context(x,1,1))) argument
14 # define __acquires(x) __attribute__((context(x,0,1))) argument
15 # define __releases(x) __attribute__((context(x,1,0))) argument
16 # define __acquire(x) __context__(x,1) argument
17 # define __release(x) __context__(x,-1) argument
18 # define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) argument
34 # define __chk_user_ptr(x) (void)0 argument
35 # define __chk_io_ptr(x) (void)0 argument
36 # define __builtin_warning(x, y...) (1) argument
37 # define __must_hold(x) argument
[all …]
/linux-4.1.27/drivers/media/platform/exynos-gsc/
Dgsc-regs.h70 #define GSC_SRCIMG_HEIGHT(x) ((x) << 16) argument
71 #define GSC_SRCIMG_WIDTH(x) ((x) << 0) argument
75 #define GSC_SRCIMG_OFFSET_Y(x) ((x) << 16) argument
76 #define GSC_SRCIMG_OFFSET_X(x) ((x) << 0) argument
80 #define GSC_CROPPED_HEIGHT(x) ((x) << 16) argument
81 #define GSC_CROPPED_WIDTH(x) ((x) << 0) argument
86 #define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24) argument
115 #define GSC_SCALED_HEIGHT(x) ((x) << 16) argument
116 #define GSC_SCALED_WIDTH(x) ((x) << 0) argument
120 #define GSC_PRESC_SHFACTOR(x) ((x) << 28) argument
[all …]
/linux-4.1.27/drivers/scsi/
Dppa.h122 #define IN_EPP_MODE(x) (x == PPA_EPP_8 || x == PPA_EPP_16 || x == PPA_EPP_32) argument
128 #define r_dtr(x) (unsigned char)inb((x)) argument
129 #define r_str(x) (unsigned char)inb((x)+1) argument
130 #define r_ctr(x) (unsigned char)inb((x)+2) argument
131 #define r_epp(x) (unsigned char)inb((x)+4) argument
132 #define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */ argument
134 #define r_ecr(x) (unsigned char)inb((x)+0x2) /* x must be base_hi */ argument
136 #define w_dtr(x,y) outb(y, (x)) argument
137 #define w_str(x,y) outb(y, (x)+1) argument
138 #define w_epp(x,y) outb(y, (x)+4) argument
[all …]
Dimm.h115 #define IN_EPP_MODE(x) (x == IMM_EPP_8 || x == IMM_EPP_16 || x == IMM_EPP_32) argument
121 #define r_dtr(x) (unsigned char)inb((x)) argument
122 #define r_str(x) (unsigned char)inb((x)+1) argument
123 #define r_ctr(x) (unsigned char)inb((x)+2) argument
124 #define r_epp(x) (unsigned char)inb((x)+4) argument
125 #define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */ argument
127 #define r_ecr(x) (unsigned char)inb((x)+2) /* x must be base_hi */ argument
129 #define w_dtr(x,y) outb(y, (x)) argument
130 #define w_str(x,y) outb(y, (x)+1) argument
131 #define w_epp(x,y) outb(y, (x)+4) argument
[all …]
D3w-sas.h158 #define TW_OPRES_IN(x,y) ((x << 5) | (y & 0x1f)) argument
159 #define TW_OP_OUT(x) (x & 0x1f) argument
162 #define TW_OPSGL_IN(x,y) ((x << 5) | (y & 0x1f)) argument
163 #define TW_SGL_OUT(x) ((x >> 5) & 0x7) argument
166 #define TW_SEV_OUT(x) (x & 0x7) argument
169 #define TW_RESID_OUT(x) ((x >> 16) & 0xffff) argument
170 #define TW_NOTMFA_OUT(x) (x & 0x1) argument
177 #define TWL_STATUS_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_STATUS) argument
178 #define TWL_HOBQPL_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HOBQPL) argument
179 #define TWL_HOBQPH_REG_ADDR(x) ((unsigned char __iomem *)x->base_addr + TWL_HOBQPH) argument
[all …]
D3w-xxxx.h238 #define TW_OPSGL_IN(x,y) ((x << 5) | (y & 0x1f)) argument
239 #define TW_SGL_OUT(x) ((x >> 5) & 0x7) argument
242 #define TW_RESID_OUT(x) ((x >> 4) & 0xff) argument
245 #define TW_UNITHOST_IN(x,y) ((x << 4) | ( y & 0xf)) argument
246 #define TW_UNIT_OUT(x) (x & 0xf) argument
249 #define TW_CONTROL_REG_ADDR(x) (x->base_addr) argument
250 #define TW_STATUS_REG_ADDR(x) (x->base_addr + 0x4) argument
251 #define TW_COMMAND_QUEUE_REG_ADDR(x) (x->base_addr + 0x8) argument
252 #define TW_RESPONSE_QUEUE_REG_ADDR(x) (x->base_addr + 0xC) argument
253 #define TW_CLEAR_ALL_INTERRUPTS(x) (outl(TW_STATUS_VALID_INTERRUPT, TW_CONTROL_REG_ADDR(x))) argument
[all …]
/linux-4.1.27/arch/alpha/include/asm/
Dpage.h35 #define pte_val(x) ((x).pte) argument
36 #define pmd_val(x) ((x).pmd) argument
37 #define pgd_val(x) ((x).pgd) argument
38 #define pgprot_val(x) ((x).pgprot) argument
40 #define __pte(x) ((pte_t) { (x) } ) argument
41 #define __pmd(x) ((pmd_t) { (x) } ) argument
42 #define __pgd(x) ((pgd_t) { (x) } ) argument
43 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
54 #define pte_val(x) (x) argument
55 #define pmd_val(x) (x) argument
[all …]
/linux-4.1.27/drivers/scsi/qla4xxx/
Dql4_dbg.h20 #define DEBUG(x) do {x;} while (0); argument
22 #define DEBUG(x) do {} while (0); argument
26 #define DEBUG2(x) do {if(ql4xextended_error_logging == 2) x;} while (0); argument
27 #define DEBUG2_3(x) do {x;} while (0); argument
29 #define DEBUG2(x) do {} while (0); argument
33 #define DEBUG3(x) do {if(ql4xextended_error_logging == 3) x;} while (0); argument
35 #define DEBUG3(x) do {} while (0); argument
37 #define DEBUG2_3(x) do {} while (0); argument
41 #define DEBUG4(x) do {x;} while (0); argument
43 #define DEBUG4(x) do {} while (0); argument
[all …]
/linux-4.1.27/drivers/net/ethernet/faraday/
Dftgmac100.h92 #define FTGMAC100_ITC_RXINT_CNT(x) (((x) & 0xf) << 0) argument
93 #define FTGMAC100_ITC_RXINT_THR(x) (((x) & 0x7) << 4) argument
95 #define FTGMAC100_ITC_TXINT_CNT(x) (((x) & 0xf) << 8) argument
96 #define FTGMAC100_ITC_TXINT_THR(x) (((x) & 0x7) << 12) argument
102 #define FTGMAC100_APTC_RXPOLL_CNT(x) (((x) & 0xf) << 0) argument
104 #define FTGMAC100_APTC_TXPOLL_CNT(x) (((x) & 0xf) << 8) argument
110 #define FTGMAC100_DBLAC_RXFIFO_LTHR(x) (((x) & 0x7) << 0) argument
111 #define FTGMAC100_DBLAC_RXFIFO_HTHR(x) (((x) & 0x7) << 3) argument
113 #define FTGMAC100_DBLAC_RXBURST_SIZE(x) (((x) & 0x3) << 8) argument
114 #define FTGMAC100_DBLAC_TXBURST_SIZE(x) (((x) & 0x3) << 10) argument
[all …]
Dftmac100.h75 #define FTMAC100_ITC_RXINT_CNT(x) (((x) & 0xf) << 0) argument
76 #define FTMAC100_ITC_RXINT_THR(x) (((x) & 0x7) << 4) argument
78 #define FTMAC100_ITC_TXINT_CNT(x) (((x) & 0xf) << 8) argument
79 #define FTMAC100_ITC_TXINT_THR(x) (((x) & 0x7) << 12) argument
85 #define FTMAC100_APTC_RXPOLL_CNT(x) (((x) & 0xf) << 0) argument
87 #define FTMAC100_APTC_TXPOLL_CNT(x) (((x) & 0xf) << 8) argument
96 #define FTMAC100_DBLAC_RXFIFO_LTHR(x) (((x) & 0x7) << 3) argument
97 #define FTMAC100_DBLAC_RXFIFO_HTHR(x) (((x) & 0x7) << 6) argument
124 #define FTMAC100_PHYCR_PHYAD(x) (((x) & 0x1f) << 16) argument
125 #define FTMAC100_PHYCR_REGAD(x) (((x) & 0x1f) << 21) argument
[all …]
/linux-4.1.27/tools/include/tools/
Dendian.h9 #define htole16(x) (x) argument
12 #define htole32(x) (x) argument
15 #define htole64(x) (x) argument
19 #define le16toh(x) (x) argument
23 #define le32toh(x) (x) argument
27 #define le64toh(x) (x) argument
33 #define htole16(x) __bswap_16(x) argument
36 #define htole32(x) __bswap_32(x) argument
39 #define htole64(x) __bswap_64(x) argument
43 #define le16toh(x) __bswap_16(x) argument
[all …]
/linux-4.1.27/drivers/net/wireless/iwlwifi/
Diwl-drv.h75 #define NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */ argument
76 #define NVM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ argument
77 #define NVM_RF_CFG_TYPE_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ argument
78 #define NVM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ argument
79 #define NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ argument
80 #define NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ argument
82 #define NVM_RF_CFG_FLAVOR_MSK_FAMILY_8000(x) (x & 0xF) argument
83 #define NVM_RF_CFG_DASH_MSK_FAMILY_8000(x) ((x >> 4) & 0xF) argument
84 #define NVM_RF_CFG_STEP_MSK_FAMILY_8000(x) ((x >> 8) & 0xF) argument
85 #define NVM_RF_CFG_TYPE_MSK_FAMILY_8000(x) ((x >> 12) & 0xFFF) argument
[all …]
/linux-4.1.27/arch/x86/mm/
Dphysaddr.c13 unsigned long __phys_addr(unsigned long x) in __phys_addr() argument
15 unsigned long y = x - __START_KERNEL_map; in __phys_addr()
18 if (unlikely(x > y)) { in __phys_addr()
19 x = y + phys_base; in __phys_addr()
23 x = y + (__START_KERNEL_map - PAGE_OFFSET); in __phys_addr()
26 VIRTUAL_BUG_ON((x > y) || !phys_addr_valid(x)); in __phys_addr()
29 return x; in __phys_addr()
33 unsigned long __phys_addr_symbol(unsigned long x) in __phys_addr_symbol() argument
35 unsigned long y = x - __START_KERNEL_map; in __phys_addr_symbol()
45 bool __virt_addr_valid(unsigned long x) in __virt_addr_valid() argument
[all …]
/linux-4.1.27/include/linux/iio/frequency/
Dadf4350.h21 #define ADF4350_REG0_FRACT(x) (((x) & 0xFFF) << 3) argument
22 #define ADF4350_REG0_INT(x) (((x) & 0xFFFF) << 15) argument
25 #define ADF4350_REG1_MOD(x) (((x) & 0xFFF) << 3) argument
26 #define ADF4350_REG1_PHASE(x) (((x) & 0xFFF) << 15) argument
38 #define ADF4350_REG2_CHARGE_PUMP_CURR_uA(x) (((((x)-312) / 312) & 0xF) << 9) argument
40 #define ADF4350_REG2_10BIT_R_CNT(x) ((x) << 14) argument
43 #define ADF4350_REG2_MUXOUT(x) ((x) << 26) argument
44 #define ADF4350_REG2_NOISE_MODE(x) (((unsigned)(x)) << 29) argument
54 #define ADF4350_REG3_12BIT_CLKDIV(x) ((x) << 3) argument
55 #define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 16) argument
[all …]
/linux-4.1.27/drivers/pcmcia/
Dvrc4173_cardu.h134 #define IO_WIN_EN(x) (0x40 << (x)) argument
135 #define MEM_WIN_EN(x) (0x01 << (x)) argument
138 #define IO_WIN_CNT_MASK(x) (0x03 << ((x) << 2)) argument
139 #define IO_WIN_DATA_AUTOSZ(x) (0x02 << ((x) << 2)) argument
140 #define IO_WIN_DATA_16BIT(x) (0x01 << ((x) << 2)) argument
142 #define IO_WIN_SA(x) (0x008 + ((x) << 2)) argument
143 #define IO_WIN_EA(x) (0x00a + ((x) << 2)) argument
145 #define MEM_WIN_SA(x) (0x010 + ((x) << 3)) argument
148 #define MEM_WIN_EA(x) (0x012 + ((x) << 3)) argument
150 #define MEM_WIN_OA(x) (0x014 + ((x) << 3)) argument
[all …]
/linux-4.1.27/include/uapi/linux/
Dswab.h12 #define ___constant_swab16(x) ((__u16)( \ argument
13 (((__u16)(x) & (__u16)0x00ffU) << 8) | \
14 (((__u16)(x) & (__u16)0xff00U) >> 8)))
16 #define ___constant_swab32(x) ((__u32)( \ argument
17 (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \
18 (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
19 (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
20 (((__u32)(x) & (__u32)0xff000000UL) >> 24)))
22 #define ___constant_swab64(x) ((__u64)( \ argument
23 (((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \
[all …]
Da.out.h76 #define N_BADMAG(x) (N_MAGIC(x) != OMAGIC \ argument
77 && N_MAGIC(x) != NMAGIC \
78 && N_MAGIC(x) != ZMAGIC \
79 && N_MAGIC(x) != QMAGIC)
82 #define _N_HDROFF(x) (1024 - sizeof (struct exec)) argument
85 #define N_TXTOFF(x) \ argument
86 (N_MAGIC(x) == ZMAGIC ? _N_HDROFF((x)) + sizeof (struct exec) : \
87 (N_MAGIC(x) == QMAGIC ? 0 : sizeof (struct exec)))
91 #define N_DATOFF(x) (N_TXTOFF(x) + (x).a_text) argument
95 #define N_TRELOFF(x) (N_DATOFF(x) + (x).a_data) argument
[all …]
Dmtio.h139 #define GMT_EOF(x) ((x) & 0x80000000) argument
140 #define GMT_BOT(x) ((x) & 0x40000000) argument
141 #define GMT_EOT(x) ((x) & 0x20000000) argument
142 #define GMT_SM(x) ((x) & 0x10000000) /* DDS setmark */ argument
143 #define GMT_EOD(x) ((x) & 0x08000000) /* DDS EOD */ argument
144 #define GMT_WR_PROT(x) ((x) & 0x04000000) argument
146 #define GMT_ONLINE(x) ((x) & 0x01000000) argument
147 #define GMT_D_6250(x) ((x) & 0x00800000) argument
148 #define GMT_D_1600(x) ((x) & 0x00400000) argument
149 #define GMT_D_800(x) ((x) & 0x00200000) argument
[all …]
/linux-4.1.27/arch/arm/crypto/
Dbsaes-armv7.pl221 my @x=@_[0..7];
225 veor @t[0], @x[0], @x[2]
226 veor @t[1], @x[1], @x[3]
228 &Mul_GF4 (@x[0], @x[1], @y[0], @y[1], @t[2..3]);
234 @x[2], @x[3], @y[2], @y[3], @t[2]);
236 veor @x[0], @x[0], @t[0]
237 veor @x[2], @x[2], @t[0]
238 veor @x[1], @x[1], @t[1]
239 veor @x[3], @x[3], @t[1]
241 veor @t[0], @x[4], @x[6]
[all …]
/linux-4.1.27/drivers/staging/rtl8712/
Drtl871x_eeprom.c34 static void up_clk(struct _adapter *padapter, u16 *x) in up_clk() argument
36 *x = *x | _EESK; in up_clk()
37 r8712_write8(padapter, EE_9346CR, (u8)*x); in up_clk()
41 static void down_clk(struct _adapter *padapter, u16 *x) in down_clk() argument
43 *x = *x & ~_EESK; in down_clk()
44 r8712_write8(padapter, EE_9346CR, (u8)*x); in down_clk()
50 u16 x, mask; in shift_out_bits() local
55 x = r8712_read8(padapter, EE_9346CR); in shift_out_bits()
56 x &= ~(_EEDO | _EEDI); in shift_out_bits()
58 x &= ~_EEDI; in shift_out_bits()
[all …]
/linux-4.1.27/arch/ia64/include/asm/
Dpage.h59 # define __pa(x) ((x) - PAGE_OFFSET) argument
60 # define __va(x) ((x) + PAGE_OFFSET) argument
142 #define __pa(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg = 0; _v.l;}) argument
143 #define __va(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg = -1; _v.p;}) argument
145 #define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;}) argument
146 #define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;}) argument
149 # define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \ argument
150 | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT)))
183 # define pte_val(x) ((x).pte) argument
184 # define pmd_val(x) ((x).pmd) argument
[all …]
Dbitops.h347 ffz (unsigned long x) in ffz() argument
351 result = ia64_popcnt(x & (~x - 1)); in ffz()
362 __ffs (unsigned long x) in __ffs() argument
366 result = ia64_popcnt((x-1) & ~x); in __ffs()
377 ia64_fls (unsigned long x) in ia64_fls() argument
379 long double d = x; in ia64_fls()
393 unsigned long x = t & 0xffffffffu; in fls() local
395 if (!x) in fls()
397 x |= x >> 1; in fls()
398 x |= x >> 2; in fls()
[all …]
/linux-4.1.27/arch/powerpc/boot/
Dof.h27 #define cpu_to_be16(x) swab16(x) argument
28 #define be16_to_cpu(x) swab16(x) argument
29 #define cpu_to_be32(x) swab32(x) argument
30 #define be32_to_cpu(x) swab32(x) argument
31 #define cpu_to_be64(x) swab64(x) argument
32 #define be64_to_cpu(x) swab64(x) argument
34 #define cpu_to_be16(x) (x) argument
35 #define be16_to_cpu(x) (x) argument
36 #define cpu_to_be32(x) (x) argument
37 #define be32_to_cpu(x) (x) argument
[all …]
Dswab.h4 static inline u16 swab16(u16 x) in swab16() argument
6 return ((x & (u16)0x00ffU) << 8) | in swab16()
7 ((x & (u16)0xff00U) >> 8); in swab16()
10 static inline u32 swab32(u32 x) in swab32() argument
12 return ((x & (u32)0x000000ffUL) << 24) | in swab32()
13 ((x & (u32)0x0000ff00UL) << 8) | in swab32()
14 ((x & (u32)0x00ff0000UL) >> 8) | in swab32()
15 ((x & (u32)0xff000000UL) >> 24); in swab32()
18 static inline u64 swab64(u64 x) in swab64() argument
20 return (u64)((x & (u64)0x00000000000000ffULL) << 56) | in swab64()
[all …]
/linux-4.1.27/include/uapi/sound/
Demu10k1.h56 #define FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x0f */ argument
57 #define EXTIN(x) (0x10 + (x)) /* x = 0x00 - 0x0f */ argument
58 #define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f physical outs -> FXWC low 16 bits */ argument
59 #define FXBUS2(x) (0x30 + (x)) /* x = 0x00 - 0x0f copies of fx buses for capture -> FXWC high 16 bi… argument
90 #define GPR(x) (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */ argument
91 #define ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */ argument
92 #define ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */ argument
93 #define ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */ argument
94 #define ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */ argument
96 #define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */ argument
[all …]
/linux-4.1.27/arch/arm/mach-netx/
Dxc.c53 int xc_stop(struct xc *x) in xc_stop() argument
55 writel(RPU_HOLD_PC, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); in xc_stop()
56 writel(TPU_HOLD_PC, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); in xc_stop()
57 writel(XPU_HOLD_PC, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS); in xc_stop()
61 int xc_start(struct xc *x) in xc_start() argument
63 writel(0, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); in xc_start()
64 writel(0, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); in xc_start()
65 writel(0, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS); in xc_start()
69 int xc_running(struct xc *x) in xc_running() argument
71 return (readl(x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS) & RPU_HOLD_PC) in xc_running()
[all …]
/linux-4.1.27/sound/soc/fsl/
Dimx-ssi.h106 #define SSI_SRCCR_WL(x) ((((x) - 2) >> 1) << 13) argument
107 #define SSI_SRCCR_DC(x) (((x) & 0x1f) << 8) argument
108 #define SSI_SRCCR_PM(x) (((x) & 0xff) << 0) argument
116 #define SSI_STCCR_WL(x) ((((x) - 2) >> 1) << 13) argument
117 #define SSI_STCCR_DC(x) (((x) & 0x1f) << 8) argument
118 #define SSI_STCCR_PM(x) (((x) & 0xff) << 0) argument
124 #define SSI_SFCSR_RFCNT1(x) (((x) & 0xf) << 28) argument
126 #define SSI_SFCSR_TFCNT1(x) (((x) & 0xf) << 24) argument
128 #define SSI_SFCSR_RFWM1(x) (((x) & 0xf) << 20) argument
129 #define SSI_SFCSR_TFWM1(x) (((x) & 0xf) << 16) argument
[all …]
Dfsl_ssi.h133 #define CCSR_SSI_SxCCR_WL(x) \ argument
134 (((((x) / 2) - 1) << CCSR_SSI_SxCCR_WL_SHIFT) & CCSR_SSI_SxCCR_WL_MASK)
137 #define CCSR_SSI_SxCCR_DC(x) \ argument
138 ((((x) - 1) << CCSR_SSI_SxCCR_DC_SHIFT) & CCSR_SSI_SxCCR_DC_MASK)
141 #define CCSR_SSI_SxCCR_PM(x) \ argument
142 ((((x) - 1) << CCSR_SSI_SxCCR_PM_SHIFT) & CCSR_SSI_SxCCR_PM_MASK)
151 #define CCSR_SSI_SFCSR_RFCNT1(x) \ argument
152 (((x) & CCSR_SSI_SFCSR_RFCNT1_MASK) >> CCSR_SSI_SFCSR_RFCNT1_SHIFT)
155 #define CCSR_SSI_SFCSR_TFCNT1(x) \ argument
156 (((x) & CCSR_SSI_SFCSR_TFCNT1_MASK) >> CCSR_SSI_SFCSR_TFCNT1_SHIFT)
[all …]
/linux-4.1.27/drivers/crypto/
Dmv_cesa.h17 #define SEC_DESC_P0_PTR(x) (x) argument
20 #define SEC_DESC_P1_PTR(x) (x) argument
84 #define ENC_P_SRC(x) (x) argument
85 #define ENC_P_DST(x) ((x) << 16) argument
88 #define ENC_LEN(x) (x) argument
91 #define ENC_KEY_P(x) (x) argument
94 #define ENC_IV_POINT(x) ((x) << 0) argument
95 #define ENC_IV_BUF_POINT(x) ((x) << 16) argument
98 #define MAC_SRC_DATA_P(x) (x) argument
99 #define MAC_SRC_TOTAL_LEN(x) ((x) << 16) argument
[all …]
/linux-4.1.27/drivers/gpu/drm/i2c/
Dadv7511.h37 #define ADV7511_REG_CSC_UPPER(x) (0x18 + (x) * 2) argument
38 #define ADV7511_REG_CSC_LOWER(x) (0x19 + (x) * 2) argument
39 #define ADV7511_REG_SYNC_DECODER(x) (0x30 + (x)) argument
40 #define ADV7511_REG_DE_GENERATOR (0x35 + (x))
55 #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */ argument
59 #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */ argument
63 #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */ argument
64 #define ADV7511_REG_INT_ENABLE(x) (0x94 + (x)) argument
65 #define ADV7511_REG_INT(x) (0x96 + (x)) argument
70 #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */ argument
[all …]
/linux-4.1.27/fs/gfs2/
Dlops.h52 int x; in lops_before_commit() local
53 for (x = 0; gfs2_log_ops[x]; x++) in lops_before_commit()
54 if (gfs2_log_ops[x]->lo_before_commit) in lops_before_commit()
55 gfs2_log_ops[x]->lo_before_commit(sdp, tr); in lops_before_commit()
61 int x; in lops_after_commit() local
62 for (x = 0; gfs2_log_ops[x]; x++) in lops_after_commit()
63 if (gfs2_log_ops[x]->lo_after_commit) in lops_after_commit()
64 gfs2_log_ops[x]->lo_after_commit(sdp, tr); in lops_after_commit()
71 int x; in lops_before_scan() local
72 for (x = 0; gfs2_log_ops[x]; x++) in lops_before_scan()
[all …]
/linux-4.1.27/drivers/scsi/csiostor/
Dt4fw_api_stor.h171 #define FW_RDEV_WR_FLOWID_GET(x) (((x) >> 8) & 0xfffff) argument
172 #define FW_RDEV_WR_ASSOC_FLOWID_GET(x) (((x) >> 0) & 0xfffff) argument
173 #define FW_RDEV_WR_RPORT_TYPE_GET(x) (((x) >> 0) & 0x1f) argument
174 #define FW_RDEV_WR_NPIV_GET(x) (((x) >> 6) & 0x1) argument
175 #define FW_RDEV_WR_CLASS_GET(x) (((x) >> 4) & 0x3) argument
176 #define FW_RDEV_WR_TASK_RETRY_ID_GET(x) (((x) >> 5) & 0x1) argument
177 #define FW_RDEV_WR_RETRY_GET(x) (((x) >> 4) & 0x1) argument
178 #define FW_RDEV_WR_CONF_CMPL_GET(x) (((x) >> 3) & 0x1) argument
179 #define FW_RDEV_WR_INI_GET(x) (((x) >> 1) & 0x1) argument
180 #define FW_RDEV_WR_TGT_GET(x) (((x) >> 0) & 0x1) argument
[all …]
/linux-4.1.27/arch/mips/math-emu/
Dieee754d.c34 union ieee754dp ieee754dp_dump(char *m, union ieee754dp x) in ieee754dp_dump() argument
39 printk("<%08x,%08x>\n", (unsigned) (x.bits >> 32), in ieee754dp_dump()
40 (unsigned) x.bits); in ieee754dp_dump()
42 switch (ieee754dp_class(x)) { in ieee754dp_dump()
45 printk("Nan %c", DPSIGN(x) ? '-' : '+'); in ieee754dp_dump()
47 printk("%c", DPMANT(x) & DP_MBIT(i) ? '1' : '0'); in ieee754dp_dump()
50 printk("%cInfinity", DPSIGN(x) ? '-' : '+'); in ieee754dp_dump()
53 printk("%cZero", DPSIGN(x) ? '-' : '+'); in ieee754dp_dump()
56 printk("%c0.", DPSIGN(x) ? '-' : '+'); in ieee754dp_dump()
58 printk("%c", DPMANT(x) & DP_MBIT(i) ? '1' : '0'); in ieee754dp_dump()
[all …]
/linux-4.1.27/include/linux/mtd/
Dcfi_endian.h41 #define cpu_to_cfi8(map, x) (x) argument
42 #define cfi8_to_cpu(map, x) (x) argument
43 #define cpu_to_cfi16(map, x) _cpu_to_cfi(16, (map)->swap, (x)) argument
44 #define cpu_to_cfi32(map, x) _cpu_to_cfi(32, (map)->swap, (x)) argument
45 #define cpu_to_cfi64(map, x) _cpu_to_cfi(64, (map)->swap, (x)) argument
46 #define cfi16_to_cpu(map, x) _cfi_to_cpu(16, (map)->swap, (x)) argument
47 #define cfi32_to_cpu(map, x) _cfi_to_cpu(32, (map)->swap, (x)) argument
48 #define cfi64_to_cpu(map, x) _cfi_to_cpu(64, (map)->swap, (x)) argument
50 #define _cpu_to_cfi(w, s, x) (cfi_host(s)?(x):_swap_to_cfi(w, s, x)) argument
51 #define _cfi_to_cpu(w, s, x) (cfi_host(s)?(x):_swap_to_cpu(w, s, x)) argument
[all …]
/linux-4.1.27/sound/pci/au88x0/
Dau8830.h104 #define ADB_DMA(x) (x) argument
105 #define ADB_SRCOUT(x) (x + OFFSET_SRCOUT) argument
106 #define ADB_SRCIN(x) (x + OFFSET_SRCIN) argument
107 #define ADB_MIXOUT(x) (x + OFFSET_MIXOUT) argument
108 #define ADB_MIXIN(x) (x + OFFSET_MIXIN) argument
109 #define ADB_CODECIN(x) (x + OFFSET_CODECIN) argument
110 #define ADB_CODECOUT(x) (x + OFFSET_CODECOUT) argument
111 #define ADB_SPORTIN(x) (x + OFFSET_SPORTIN) argument
112 #define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT) argument
113 #define ADB_SPDIFIN(x) (x + OFFSET_SPDIFIN) argument
[all …]
Dau8810.h83 #define ADB_DMA(x) (x) argument
84 #define ADB_SRCOUT(x) (x + OFFSET_SRCOUT) argument
85 #define ADB_SRCIN(x) (x + OFFSET_SRCIN) argument
86 #define ADB_MIXOUT(x) (x + OFFSET_MIXOUT) argument
87 #define ADB_MIXIN(x) (x + OFFSET_MIXIN) argument
88 #define ADB_CODECIN(x) (x + OFFSET_CODECIN) argument
89 #define ADB_CODECOUT(x) (x + OFFSET_CODECOUT) argument
90 #define ADB_SPORTIN(x) (x + OFFSET_SPORTIN) argument
91 #define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT) argument
92 #define ADB_SPDIFOUT(x) (x + OFFSET_SPDIFOUT) argument
[all …]
/linux-4.1.27/arch/arm/mach-pxa/include/mach/
Dregs-lcd.h37 #define LCCR3_BPP(x) ((((x) & 0x7) << 24) | (((x) & 0x8) ? (1 << 29) : 0)) argument
137 #define LCCR5_IUM(x) (1 << ((x) + 23)) /* input underrun mask */ argument
138 #define LCCR5_BSM(x) (1 << ((x) + 15)) /* branch mask */ argument
139 #define LCCR5_EOFM(x) (1 << ((x) + 7)) /* end of frame mask */ argument
140 #define LCCR5_SOFM(x) (1 << ((x) + 0)) /* start of frame mask */ argument
156 #define LCSR1_IU(x) (1 << ((x) + 23)) /* Input FIFO underrun */ argument
157 #define LCSR1_BS(x) (1 << ((x) + 15)) /* Branch Status */ argument
158 #define LCSR1_EOF(x) (1 << ((x) + 7)) /* End of Frame Status */ argument
159 #define LCSR1_SOF(x) (1 << ((x) - 1)) /* Start of Frame Status */ argument
164 #define OVLxC1_PPL(x) ((((x) - 1) & 0x3ff) << 0) /* Pixels Per Line */ argument
[all …]
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/sound/
Dfsl-imx-audmux.h28 #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) argument
32 #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) argument
33 #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) argument
36 #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) argument
42 #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) argument
44 #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) argument
46 #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) argument
48 #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) argument
51 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) argument
53 #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) argument
[all …]
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/sound/
Dfsl-imx-audmux.h28 #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) argument
32 #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) argument
33 #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) argument
36 #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) argument
42 #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) argument
44 #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) argument
46 #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) argument
48 #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) argument
51 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) argument
53 #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) argument
[all …]
/linux-4.1.27/sound/soc/au1x/
Dpsc.h30 #define PSC_CTRL(x) ((x)->mmio + PSC_CTRL_OFFSET) argument
31 #define PSC_SEL(x) ((x)->mmio + PSC_SEL_OFFSET) argument
32 #define I2S_STAT(x) ((x)->mmio + PSC_I2SSTAT_OFFSET) argument
33 #define I2S_CFG(x) ((x)->mmio + PSC_I2SCFG_OFFSET) argument
34 #define I2S_PCR(x) ((x)->mmio + PSC_I2SPCR_OFFSET) argument
35 #define AC97_CFG(x) ((x)->mmio + PSC_AC97CFG_OFFSET) argument
36 #define AC97_CDC(x) ((x)->mmio + PSC_AC97CDC_OFFSET) argument
37 #define AC97_EVNT(x) ((x)->mmio + PSC_AC97EVNT_OFFSET) argument
38 #define AC97_PCR(x) ((x)->mmio + PSC_AC97PCR_OFFSET) argument
39 #define AC97_RST(x) ((x)->mmio + PSC_AC97RST_OFFSET) argument
[all …]
/linux-4.1.27/include/dt-bindings/sound/
Dfsl-imx-audmux.h28 #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) argument
32 #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) argument
33 #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) argument
36 #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) argument
42 #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) argument
44 #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) argument
46 #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) argument
48 #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) argument
51 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) argument
53 #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) argument
[all …]
/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/sound/
Dfsl-imx-audmux.h28 #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) argument
32 #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) argument
33 #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) argument
36 #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) argument
42 #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) argument
44 #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) argument
46 #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) argument
48 #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) argument
51 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) argument
53 #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) argument
[all …]
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/sound/
Dfsl-imx-audmux.h28 #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) argument
32 #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) argument
33 #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) argument
36 #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) argument
42 #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) argument
44 #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) argument
46 #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) argument
48 #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) argument
51 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) argument
53 #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) argument
[all …]
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/sound/
Dfsl-imx-audmux.h28 #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) argument
32 #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) argument
33 #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) argument
36 #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) argument
42 #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) argument
44 #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) argument
46 #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) argument
48 #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) argument
51 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) argument
53 #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) argument
[all …]
/linux-4.1.27/sound/soc/codecs/
Dtlv320dac33.h117 #define DAC33_ADJSTEP(x) (x << 0) argument
118 #define DAC33_ADJTHRSHLD(x) (x << 4) argument
121 #define DAC33_REFDIV(x) (x << 4) argument
150 #define DAC33_DATA_DELAY(x) (x << 2) argument
163 #define DAC33_THRREG(x) (((x) & 0x1FFF) << 3) argument
181 #define DAC33_UTM(x) (x << 0) argument
182 #define DAC33_UFM(x) (x << 2) argument
183 #define DAC33_OFM(x) (x << 4) argument
186 #define DAC33_NSM(x) (x << 0) argument
187 #define DAC33_PSM(x) (x << 2) argument
[all …]
Dcs42l51.h46 #define CS42L51_MIC_POWER_CTL_SPEED(x) (((x)&3)<<5) argument
60 #define CS42L51_INTF_CTL_DAC_FORMAT(x) (((x)&7)<<3) argument
76 #define CS42L51_MIC_CTL_MICBIAS_LVL(x) (((x)&3)<<2) argument
91 #define CS42L51_ADC_INPUT_AINB_MUX(x) (((x)&3)<<6) argument
92 #define CS42L51_ADC_INPUT_AINA_MUX(x) (((x)&3)<<4) argument
99 #define CS42L51_DAC_OUT_CTL_HP_GAIN(x) (((x)&7)<<5) argument
107 #define CS42L51_DAC_CTL_DATA_SEL(x) (((x)&3)<<6) argument
111 #define CS42L51_DAC_CTL_DACSZ(x) (((x)&3)<<0) argument
117 #define CS42L51_ALC_PGX_PGX_VOL(x) (((x)&0x1f)<<0) argument
127 #define CS42L51_MIX_VOLUME(x) (((x)&0x7f)<<0) argument
[all …]
/linux-4.1.27/arch/ia64/include/asm/sn/sn2/
Dsn_hwperf.h45 #define SN_HWPERF_IS_NODE(x) ((x) && strstr((x)->name, "SHub")) argument
46 #define SN_HWPERF_IS_NODE_SHUB2(x) ((x) && strstr((x)->name, "SHub 2.")) argument
47 #define SN_HWPERF_IS_IONODE(x) ((x) && strstr((x)->name, "TIO")) argument
48 #define SN_HWPERF_IS_NL3ROUTER(x) ((x) && strstr((x)->name, "NL3Router")) argument
49 #define SN_HWPERF_IS_NL4ROUTER(x) ((x) && strstr((x)->name, "NL4Router")) argument
50 #define SN_HWPERF_IS_OLDROUTER(x) ((x) && strstr((x)->name, "Router")) argument
51 #define SN_HWPERF_IS_ROUTER(x) (SN_HWPERF_IS_NL3ROUTER(x) || \ argument
52 SN_HWPERF_IS_NL4ROUTER(x) || \
53 SN_HWPERF_IS_OLDROUTER(x))
54 #define SN_HWPERF_FOREIGN(x) ((x) && !(x)->sn_hwp_this_part && !(x)->sn_hwp_is_shared) argument
[all …]
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
Dreg_wow.h71 #define AR_WOW_BACK_OFF_SHIFT(x) ((x & 0xf) << 27) /* in usecs */ argument
74 #define AR_WOW_PATTERN_EN(x) (x & 0xff) argument
76 #define AR_WOW_PATTERN_FOUND(x) (x & (0xff << AR_WOW_PAT_FOUND_SHIFT)) argument
83 #define AR_WOW_STATUS(x) (x & (AR_WOW_PATTERN_FOUND_MASK | \ argument
87 #define AR_WOW_CLEAR_EVENTS(x) (x & ~(AR_WOW_PATTERN_EN(0xff) | \ argument
93 #define AR_WOW2_PATTERN_EN(x) ((x & 0xff) << 0) argument
95 #define AR_WOW2_PATTERN_FOUND(x) (x & (0xff << AR_WOW2_PATTERN_FOUND_SHIFT)) argument
98 #define AR_WOW_STATUS2(x) (x & AR_WOW2_PATTERN_FOUND_MASK) argument
99 #define AR_WOW_CLEAR_EVENTS2(x) (x & ~(AR_WOW2_PATTERN_EN(0xff))) argument
101 #define AR_WOW_AIFS_CNT(x) (x & 0xff) argument
[all …]
/linux-4.1.27/drivers/net/ethernet/ibm/emac/
Ddebug.h44 # define emac_dbg_register(x) do { } while(0) argument
45 # define emac_dbg_unregister(x) do { } while(0) argument
46 # define mal_dbg_register(x) do { } while(0) argument
47 # define mal_dbg_unregister(x) do { } while(0) argument
60 # define DBG(d,f,x...) EMAC_DBG(d, emac, f, ##x) argument
61 # define MAL_DBG(d,f,x...) EMAC_DBG(d, mal, f, ##x) argument
62 # define ZMII_DBG(d,f,x...) EMAC_DBG(d, zmii, f, ##x) argument
63 # define RGMII_DBG(d,f,x...) EMAC_DBG(d, rgmii, f, ##x) argument
66 # define DBG(f,x...) ((void)0) argument
67 # define MAL_DBG(d,f,x...) ((void)0) argument
[all …]
/linux-4.1.27/fs/ntfs/
Dendian.h33 static inline s16 sle16_to_cpu(sle16 x) in sle16_to_cpu() argument
35 return le16_to_cpu((__force le16)x); in sle16_to_cpu()
38 static inline s32 sle32_to_cpu(sle32 x) in sle32_to_cpu() argument
40 return le32_to_cpu((__force le32)x); in sle32_to_cpu()
43 static inline s64 sle64_to_cpu(sle64 x) in sle64_to_cpu() argument
45 return le64_to_cpu((__force le64)x); in sle64_to_cpu()
48 static inline s16 sle16_to_cpup(sle16 *x) in sle16_to_cpup() argument
50 return le16_to_cpu(*(__force le16*)x); in sle16_to_cpup()
53 static inline s32 sle32_to_cpup(sle32 *x) in sle32_to_cpup() argument
55 return le32_to_cpu(*(__force le32*)x); in sle32_to_cpup()
[all …]
/linux-4.1.27/arch/unicore32/include/asm/
Dpage.h41 #define pte_val(x) ((x).pte) argument
42 #define pgd_val(x) ((x).pgd) argument
43 #define pgprot_val(x) ((x).pgprot) argument
45 #define __pte(x) ((pte_t) { (x) }) argument
46 #define __pgd(x) ((pgd_t) { (x) }) argument
47 #define __pgprot(x) ((pgprot_t) { (x) }) argument
57 #define pte_val(x) (x) argument
58 #define pgd_val(x) (x) argument
59 #define pgprot_val(x) (x) argument
61 #define __pte(x) (x) argument
[all …]
/linux-4.1.27/drivers/input/touchscreen/
Dsun4i-ts.c63 #define ADC_FIRST_DLY(x) ((x) << 24) /* 8 bits */ argument
64 #define ADC_FIRST_DLY_MODE(x) ((x) << 23) argument
65 #define ADC_CLK_SEL(x) ((x) << 22) argument
66 #define ADC_CLK_DIV(x) ((x) << 20) /* 3 bits */ argument
67 #define FS_DIV(x) ((x) << 16) /* 4 bits */ argument
68 #define T_ACQ(x) ((x) << 0) /* 16 bits */ argument
71 #define STYLUS_UP_DEBOUN(x) ((x) << 12) /* 8 bits */ argument
72 #define STYLUS_UP_DEBOUN_EN(x) ((x) << 9) argument
73 #define TOUCH_PAN_CALI_EN(x) ((x) << 6) argument
74 #define TP_DUAL_EN(x) ((x) << 5) argument
[all …]
/linux-4.1.27/drivers/mtd/devices/
Dlart.c140 #define DATA_TO_FLASH(x) \ argument
142 (((x) & 0x08009000) >> 11) + \
143 (((x) & 0x00002000) >> 10) + \
144 (((x) & 0x04004000) >> 8) + \
145 (((x) & 0x00000010) >> 4) + \
146 (((x) & 0x91000820) >> 3) + \
147 (((x) & 0x22080080) >> 2) + \
148 ((x) & 0x40000400) + \
149 (((x) & 0x00040040) << 1) + \
150 (((x) & 0x00110000) << 4) + \
[all …]
/linux-4.1.27/arch/x86/include/asm/
Duaccess.h32 #define set_fs(x) (current_thread_info()->addr_limit = (x)) argument
140 #define __inttype(x) \ argument
141 __typeof__(__builtin_choose_expr(sizeof(x) > sizeof(0UL), 0ULL, 0UL))
173 #define get_user(x, ptr) \ argument
182 (x) = (__force __typeof__(*(ptr))) __val_gu; \
186 #define __put_user_x(size, x, ptr, __ret_pu) \ argument
188 : "0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
193 #define __put_user_asm_u64(x, addr, err, errret) \ argument
205 : "A" (x), "r" (addr), "i" (errret), "0" (err))
207 #define __put_user_asm_ex_u64(x, addr) \ argument
[all …]
/linux-4.1.27/arch/arc/include/asm/
Dpage.h48 #define pte_val(x) ((x).pte) argument
49 #define pgd_val(x) ((x).pgd) argument
50 #define pgprot_val(x) ((x).pgprot) argument
52 #define __pte(x) ((pte_t) { (x) }) argument
53 #define __pgd(x) ((pgd_t) { (x) }) argument
54 #define __pgprot(x) ((pgprot_t) { (x) }) argument
56 #define pte_pgprot(x) __pgprot(pte_val(x)) argument
65 #define pte_val(x) (x) argument
66 #define pgd_val(x) (x) argument
67 #define pgprot_val(x) (x) argument
[all …]
/linux-4.1.27/drivers/net/dsa/
Dbcm_sf2_regs.h45 #define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_BASE + \ argument
46 ((x) * REG_RGMII_CNTRL_SIZE))
65 #define REG_LED_CNTRL(x) (REG_LED_CNTRL_BASE + (x) * 4) argument
77 #define P_LINK_UP_IRQ(x) (1 << (0 + (x))) argument
78 #define P_LINK_DOWN_IRQ(x) (1 << (1 + (x))) argument
79 #define P_ENERGY_ON_IRQ(x) (1 << (2 + (x))) argument
80 #define P_ENERGY_OFF_IRQ(x) (1 << (3 + (x))) argument
81 #define P_GPHY_IRQ(x) (1 << (4 + (x))) argument
83 #define P_IRQ_MASK(x) (P_LINK_UP_IRQ((x)) | \ argument
84 P_LINK_DOWN_IRQ((x)) | \
[all …]
/linux-4.1.27/include/linux/platform_data/
Dvideo-imxfb.h32 #define PCR_ACD(x) (((x) & 0x7f) << 8) argument
35 #define PCR_PCD(x) ((x) & 0x3f) argument
37 #define PWMR_CLS(x) (((x) & 0x1ff) << 16) argument
42 #define PWMR_PW(x) ((x) & 0xff) argument
44 #define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) argument
45 #define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) argument
46 #define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) argument
47 #define LSCR1_GRAY2(x) (((x) & 0xf) << 4) argument
48 #define LSCR1_GRAY1(x) (((x) & 0xf)) argument
51 #define DMACR_HM(x) (((x) & 0xf) << 16) argument
[all …]
/linux-4.1.27/arch/avr32/mach-at32ap/
Dsdramc.h42 #define SDRAMC_CR_CAS(x) ((x) << 5) argument
45 #define SDRAMC_CR_TWR(x) ((x) << 8) argument
46 #define SDRAMC_CR_TRC(x) ((x) << 12) argument
47 #define SDRAMC_CR_TRP(x) ((x) << 16) argument
48 #define SDRAMC_CR_TRCD(x) ((x) << 20) argument
49 #define SDRAMC_CR_TRAS(x) ((x) << 24) argument
50 #define SDRAMC_CR_TXSR(x) ((x) << 28) argument
60 #define SDRAMC_LPR_PASR(x) ((x) << 4) argument
61 #define SDRAMC_LPR_TCSR(x) ((x) << 8) argument
62 #define SDRAMC_LPR_DS(x) ((x) << 10) argument
[all …]
/linux-4.1.27/arch/sh/include/asm/
Dpage.h79 #define pte_val(x) \ argument
80 ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
81 #define __pte(x) \ argument
82 ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
87 #define pte_val(x) ((x).pte_low) argument
88 #define __pte(x) ((pte_t) { (x) } ) argument
93 #define pte_val(x) ((x).pte_low) argument
94 #define __pte(x) ((pte_t) { (x) } ) argument
97 #define pgd_val(x) ((x).pgd) argument
98 #define pgprot_val(x) ((x).pgprot) argument
[all …]
/linux-4.1.27/drivers/media/platform/s5p-tv/
Dregs-mixer.h90 #define MXR_GRP_CFG_FORMAT_VAL(x) MXR_MASK_VAL(x, 11, 8) argument
92 #define MXR_GRP_CFG_ALPHA_VAL(x) MXR_MASK_VAL(x, 7, 0) argument
95 #define MXR_GRP_WH_H_SCALE(x) MXR_MASK_VAL(x, 28, 28) argument
96 #define MXR_GRP_WH_V_SCALE(x) MXR_MASK_VAL(x, 12, 12) argument
97 #define MXR_GRP_WH_WIDTH(x) MXR_MASK_VAL(x, 26, 16) argument
98 #define MXR_GRP_WH_HEIGHT(x) MXR_MASK_VAL(x, 10, 0) argument
101 #define MXR_GRP_SXY_SX(x) MXR_MASK_VAL(x, 26, 16) argument
102 #define MXR_GRP_SXY_SY(x) MXR_MASK_VAL(x, 10, 0) argument
105 #define MXR_GRP_DXY_DX(x) MXR_MASK_VAL(x, 26, 16) argument
106 #define MXR_GRP_DXY_DY(x) MXR_MASK_VAL(x, 10, 0) argument
[all …]
/linux-4.1.27/drivers/dma/
Dat_hdmac_regs.h29 #define AT_DMA_SSREQ(x) (0x1 << ((x) << 1)) /* Request a source single transfer on channel x */ argument
30 #define AT_DMA_DSREQ(x) (0x1 << (1 + ((x) << 1))) /* Request a destination single transfer on chan… argument
33 #define AT_DMA_SCREQ(x) (0x1 << ((x) << 1)) /* Request a source chunk transfer on channel x */ argument
34 #define AT_DMA_DCREQ(x) (0x1 << (1 + ((x) << 1))) /* Request a destination chunk transfer on chann… argument
37 #define AT_DMA_SLAST(x) (0x1 << ((x) << 1)) /* This src rq is last tx of buffer on channel x */ argument
38 #define AT_DMA_DLAST(x) (0x1 << (1 + ((x) << 1))) /* This dst rq is last tx of buffer on channel x… argument
50 #define AT_DMA_BTC(x) (0x1 << (x)) argument
51 #define AT_DMA_CBTC(x) (0x1 << (AT_DMA_CBTC_OFFSET + (x))) argument
52 #define AT_DMA_ERR(x) (0x1 << (AT_DMA_ERR_OFFSET + (x))) argument
55 #define AT_DMA_ENA(x) (0x1 << (x)) argument
[all …]
/linux-4.1.27/drivers/video/backlight/
Dltv350qv.h27 #define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */ argument
34 #define LTV_NL(x) (((x) & 0x001f) << 0) argument
65 #define LTV_CLW(x) (((x) & 0x0007) << 12) argument
76 #define LTV_FTI(x) (((x) & 0x0003) << 4) argument
77 #define LTV_FWI(x) (((x) & 0x0003) << 0) argument
80 #define LTV_SDT(x) (((x) & 0x0007) << 10) argument
81 #define LTV_EQ(x) (((x) & 0x0007) << 2) argument
87 #define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */ argument
88 #define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */ argument
92 #define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */ argument
[all …]
/linux-4.1.27/tools/perf/util/
Dutil.h26 #define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) argument
29 #define TYPEOF(x) (__typeof__(x)) argument
31 #define TYPEOF(x) argument
34 #define MSB(x, bits) ((x) & TYPEOF(x)(~0ULL << (sizeof(x) * 8 - (bits)))) argument
38 #define decimal_length(x) ((int)(sizeof(x) * 2.56 + 0.5) + 1) argument
133 #define __attribute__(x) argument
230 #define sane_istest(x,mask) ((sane_ctype[(unsigned char)(x)] & (mask)) != 0) argument
231 #define isascii(x) (((x) & ~0x7f) == 0) argument
232 #define isspace(x) sane_istest(x,GIT_SPACE) argument
233 #define isdigit(x) sane_istest(x,GIT_DIGIT) argument
[all …]
/linux-4.1.27/drivers/net/ethernet/tehuti/
Dtehuti.h81 # define H32_64(x) (u32) ((u64)(x) >> 32) argument
82 # define L32_64(x) (u32) ((u64)(x) & 0xffffffff) argument
84 # define H32_64(x) 0 argument
85 # define L32_64(x) ((u32) (x)) argument
91 # define CPU_CHIP_SWAP32(x) swab32(x) argument
92 # define CPU_CHIP_SWAP16(x) swab16(x) argument
94 # define CPU_CHIP_SWAP32(x) (x) argument
95 # define CPU_CHIP_SWAP16(x) (x) argument
129 #define GET_BITS_SHIFT(x, nbits, nshift) (((x)>>nshift)&BITS_MASK(nbits)) argument
131 #define BITS_SHIFT_VAL(x, nbits, nshift) (((x)&BITS_MASK(nbits))<<nshift) argument
[all …]
/linux-4.1.27/arch/mips/include/asm/mach-au1x00/
Dau1xxx_psc.h93 #define PSC_AC97CFG_TXSLOT_ENA(x) (1 << (((x) - 3) + 11)) argument
94 #define PSC_AC97CFG_RXSLOT_ENA(x) (1 << (((x) - 3) + 1)) argument
101 #define PSC_AC97CFG_SET_LEN(x) (((((x) - 2) / 2) & 0xf) << 21) argument
102 #define PSC_AC97CFG_GET_LEN(x) (((((x) >> 21) & 0xf) * 2) + 2) argument
161 #define PSC_AC97CDC_ID(x) (((x) & 0x03) << 23) argument
162 #define PSC_AC97CDC_INDX(x) (((x) & 0x7f) << 16) argument
204 #define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16) argument
221 #define PSC_I2SCFG_SET_LEN(x) ((((x) - 1) & 0x1f) << 4) argument
222 #define PSC_I2SCFG_GET_LEN(x) ((((x) >> 4) & 0x1f) + 1) argument
300 #define PSC_SPICFG_CLR_BAUD(x) ((x) & ~((0x3f) << 15)) argument
[all …]
Dau1xxx_dbdma.h221 #define DSCR_DEV2CUSTOM_ID(x, d) (((((x) & 0xFFFF) << 8) | 0x32000000) | \ argument
223 #define DSCR_CUSTOM2DEV_ID(x) ((x) & 0xFF) argument
225 #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25) argument
226 #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20) argument
233 #define DSCR_CMD0_SW(x) (((x) & 0x3) << 18) argument
234 #define DSCR_CMD0_DW(x) (((x) & 0x3) << 16) argument
241 #define DSCR_CMD0_DT(x) (((x) & 0x3) << 13) argument
249 #define DSCR_CMD0_ST(x) (((x) & 0x3) << 0) argument
262 #define DSCR_CMD1_FL(x) (((x) & 0x3) << 22) argument
268 #define DSCR_SRC1_SB(x) (((x) & 0x3fff) << 14) argument
[all …]
/linux-4.1.27/arch/mips/include/asm/mach-bcm63xx/
Dbcm63xx_regs.h218 #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10) argument
222 #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c) argument
223 #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10) argument
224 #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10) argument
228 #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10) argument
232 #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c) argument
233 #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10) argument
234 #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10) argument
249 #define EXTIRQ_CFG_SENSE_6348(x) (1 << (x)) argument
250 #define EXTIRQ_CFG_STAT_6348(x) (1 << (x + 5)) argument
[all …]
/linux-4.1.27/drivers/net/ethernet/smsc/
Dsmc911x.h707 #define IS_REV_A(x) ((x & 0xFFFF)==0) argument
716 #define SMC_SET_TX_FIFO(lp, x) SMC_outl( x, lp, TX_DATA_FIFO ) argument
727 #define SMC_SET_IRQ_CFG(lp, x) SMC_outl( x, lp, INT_CFG ) argument
729 #define SMC_ACK_INT(lp, x) SMC_outl( x, lp, INT_STS ) argument
731 #define SMC_SET_INT_EN(lp, x) SMC_outl( x, lp, INT_EN ) argument
733 #define SMC_SET_BYTE_TEST(lp, x) SMC_outl( x, lp, BYTE_TEST ) argument
735 #define SMC_SET_FIFO_INT(lp, x) SMC_outl( x, lp, FIFO_INT ) argument
736 #define SMC_SET_FIFO_TDA(lp, x) \ argument
742 SMC_SET_FIFO_INT( (lp), __mask | (x)<<24 ); \
745 #define SMC_SET_FIFO_TSL(lp, x) \ argument
[all …]
/linux-4.1.27/drivers/scsi/aic7xxx/
Daiclib.h160 #define ID_C(x, c) \ argument
162 GETID(x,32), GETID(x,48), GETID(x,0), GETID(x,16), \
166 #define ID2C(x) \ argument
167 ID_C(x, PCI_CLASS_STORAGE_SCSI), \
168 ID_C(x, PCI_CLASS_STORAGE_RAID)
170 #define IDIROC(x) ((x) | ~ID_ALL_IROC_MASK) argument
177 #define ID16(x) \ argument
178 ID(x), \
179 ID((x) | 0x0001000000000000ull), \
180 ID((x) | 0x0002000000000000ull), \
[all …]
/linux-4.1.27/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.h133 #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4) argument
134 #define FS_INTR_EN(x) ((x) << 5) argument
135 #define LINE_FLAG_INTR_EN(x) ((x) << 6) argument
136 #define BUS_ERROR_INTR_EN(x) ((x) << 7) argument
148 #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12) argument
152 #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24) argument
153 #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16) argument
154 #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6) argument
155 #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5) argument
156 #define SRC_BLEND_M0(x) (((x) & 0x3) << 3) argument
[all …]
/linux-4.1.27/drivers/mmc/host/
Datmel-mci-regs.h27 # define ATMCI_MR_CLKDIV(x) ((x) << 0) /* Clock Divider */ argument
28 # define ATMCI_MR_PWSDIV(x) ((x) << 8) /* Power Saving Divider */ argument
34 # define ATMCI_MR_CLKODD(x) ((x) << 16) /* LSB of Clock Divider */ argument
36 # define ATMCI_DTOCYC(x) ((x) << 0) /* Data Timeout Cycles */ argument
37 # define ATMCI_DTOMUL(x) ((x) << 4) /* Data Timeout Multiplier */ argument
48 # define ATMCI_CMDR_CMDNB(x) ((x) << 0) /* Command Opcode */ argument
71 # define ATMCI_BCNT(x) ((x) << 0) /* Data Block Count */ argument
72 # define ATMCI_BLKLEN(x) ((x) << 16) /* Data Block Length */ argument
74 # define ATMCI_CSTOCYC(x) ((x) << 0) /* CST cycles */ argument
75 # define ATMCI_CSTOMUL(x) ((x) << 4) /* CST multiplier */ argument
[all …]
/linux-4.1.27/arch/cris/include/arch-v32/arch/
Dio.h91 #define CRIS_LED_NETWORK_GRP0_SET(x) \ argument
93 CRIS_LED_NETWORK_GRP0_SET_G((x) & CRIS_LED_GREEN); \
94 CRIS_LED_NETWORK_GRP0_SET_R((x) & CRIS_LED_RED); \
97 #define CRIS_LED_NETWORK_GRP0_SET(x) while (0) {} argument
100 #define CRIS_LED_NETWORK_GRP0_SET_G(x) \ argument
101 crisv32_io_set(&crisv32_led_net0_green, !(x));
103 #define CRIS_LED_NETWORK_GRP0_SET_R(x) \ argument
104 crisv32_io_set(&crisv32_led_net0_red, !(x));
107 #define CRIS_LED_NETWORK_GRP1_SET(x) \ argument
109 CRIS_LED_NETWORK_GRP1_SET_G((x) & CRIS_LED_GREEN); \
[all …]
/linux-4.1.27/sound/pci/ice1712/
Dhoontech.h43 #define ICE1712_STDSP24_0_BOX(r, x) r[0] = ((r[0] & ~3) | ((x)&3)) argument
44 #define ICE1712_STDSP24_0_DAREAR(r, x) r[0] = ((r[0] & ~4) | (((x)&1)<<2)) argument
45 #define ICE1712_STDSP24_1_CHN1(r, x) r[1] = ((r[1] & ~1) | ((x)&1)) argument
46 #define ICE1712_STDSP24_1_CHN2(r, x) r[1] = ((r[1] & ~2) | (((x)&1)<<1)) argument
47 #define ICE1712_STDSP24_1_CHN3(r, x) r[1] = ((r[1] & ~4) | (((x)&1)<<2)) argument
48 #define ICE1712_STDSP24_2_CHN4(r, x) r[2] = ((r[2] & ~1) | ((x)&1)) argument
49 #define ICE1712_STDSP24_2_MIDIIN(r, x) r[2] = ((r[2] & ~2) | (((x)&1)<<1)) argument
50 #define ICE1712_STDSP24_2_MIDI1(r, x) r[2] = ((r[2] & ~4) | (((x)&1)<<2)) argument
51 #define ICE1712_STDSP24_3_MIDI2(r, x) r[3] = ((r[3] & ~1) | ((x)&1)) argument
52 #define ICE1712_STDSP24_3_MUTE(r, x) r[3] = ((r[3] & ~2) | (((x)&1)<<1)) argument
[all …]
/linux-4.1.27/arch/powerpc/kernel/
Dvecemu.c154 static int ctsxs(unsigned int x, int scale, unsigned int *vscrp) in ctsxs() argument
158 exp = (x >> 23) & 0xff; in ctsxs()
159 mant = x & 0x7fffff; in ctsxs()
167 if (x + (scale << 23) != 0xcf000000) in ctsxs()
169 return (x & 0x80000000)? 0x80000000: 0x7fffffff; in ctsxs()
173 return (x & 0x80000000)? -mant: mant; in ctsxs()
176 static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp) in ctuxs() argument
181 exp = (x >> 23) & 0xff; in ctuxs()
182 mant = x & 0x7fffff; in ctuxs()
188 if (x & 0x80000000) { in ctuxs()
[all …]
/linux-4.1.27/arch/arm/mach-lpc32xx/include/mach/
Dplatform.h130 #define _PMREG(x) io_p2v(LPC32XX_CLK_PM_BASE +\ argument
131 (x))
179 #define LPC32XX_CLKPWR_DEVID(x) _PMREG(0x130 + (x)) argument
553 #define LPC32XX_CLKPWR_UART_X_DIV(x) (((x) & 0xFF) << 8) argument
560 #define LPC32XX_CLKPWR_IRDA_X_DIV(x) (((x) & 0xFF) << 8) argument
585 #define LPC32XX_INTC_MASK(x) io_p2v((x) + 0x00) argument
586 #define LPC32XX_INTC_RAW_STAT(x) io_p2v((x) + 0x04) argument
587 #define LPC32XX_INTC_STAT(x) io_p2v((x) + 0x08) argument
588 #define LPC32XX_INTC_POLAR(x) io_p2v((x) + 0x0C) argument
589 #define LPC32XX_INTC_ACT_TYPE(x) io_p2v((x) + 0x10) argument
[all …]
/linux-4.1.27/drivers/staging/rtl8723au/include/
Drtl8723a_spec.h1117 #define _LDA15_VOADJ(x) (((x) & 0x7) << 4) argument
1126 #define _LDV12_VADJ(x) (((x) & 0xF) << 4) argument
1132 #define _XTAL_BOSC(x) (((x) & 0x3) << 2) argument
1133 #define _XTAL_CADJ(x) (((x) & 0xF) << 4) argument
1135 #define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) argument
1137 #define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) argument
1139 #define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) argument
1141 #define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) argument
1143 #define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) argument
1144 #define _XTAL_GPIO(x) (((x) & 0x7) << 23) argument
[all …]
/linux-4.1.27/arch/arm/mach-at91/include/mach/
Dat91sam9_smc.h50 #define AT91_SMC_NWESETUP_(x) ((x) << 0) argument
52 #define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) argument
54 #define AT91_SMC_NRDSETUP_(x) ((x) << 16) argument
56 #define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) argument
60 #define AT91_SMC_NWEPULSE_(x) ((x) << 0) argument
62 #define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) argument
64 #define AT91_SMC_NRDPULSE_(x) ((x) << 16) argument
66 #define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) argument
70 #define AT91_SMC_NWECYCLE_(x) ((x) << 0) argument
72 #define AT91_SMC_NRDCYCLE_(x) ((x) << 16) argument
[all …]
/linux-4.1.27/arch/s390/include/asm/
Dpage.h78 #define pgprot_val(x) ((x).pgprot) argument
79 #define pgste_val(x) ((x).pgste) argument
80 #define pte_val(x) ((x).pte) argument
81 #define pmd_val(x) ((x).pmd) argument
82 #define pud_val(x) ((x).pud) argument
83 #define pgd_val(x) ((x).pgd) argument
85 #define __pgste(x) ((pgste_t) { (x) } ) argument
86 #define __pte(x) ((pte_t) { (x) } ) argument
87 #define __pmd(x) ((pmd_t) { (x) } ) argument
88 #define __pud(x) ((pud_t) { (x) } ) argument
[all …]
/linux-4.1.27/arch/mips/include/asm/mach-tx49xx/
Dmangle-port.h9 #define ioswabb(a, x) (x) argument
10 #define __mem_ioswabb(a, x) (x) argument
15 extern u16 (*ioswabw)(volatile u16 *a, u16 x);
16 extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x);
18 #define ioswabw(a, x) le16_to_cpu(x) argument
19 #define __mem_ioswabw(a, x) (x) argument
21 #define ioswabl(a, x) le32_to_cpu(x) argument
22 #define __mem_ioswabl(a, x) (x) argument
23 #define ioswabq(a, x) le64_to_cpu(x) argument
24 #define __mem_ioswabq(a, x) (x) argument
/linux-4.1.27/tools/perf/util/include/linux/
Dkernel.h11 #define PERF_ALIGN(x, a) __PERF_ALIGN_MASK(x, (typeof(x))(a)-1) argument
12 #define __PERF_ALIGN_MASK(x, mask) (((x)+(mask))&~(mask)) argument
34 #define max(x, y) ({ \ argument
35 typeof(x) _max1 = (x); \
42 #define min(x, y) ({ \ argument
43 typeof(x) _min1 = (x); \
50 #define roundup(x, y) ( \ argument
53 (((x) + (__y - 1)) / __y) * __y; \
70 #define cpu_to_le64(x) (x) argument
71 #define cpu_to_le32(x) (x) argument
[all …]
/linux-4.1.27/arch/tile/lib/
Dstring-endian.h24 #define MASK(x) (__insn_shl(1ULL, (x << 3)) - 1) argument
25 #define NULMASK(x) ((2ULL << x) - 1) argument
26 #define CFZ(x) __insn_ctz(x) argument
27 #define REVCZ(x) __insn_clz(x) argument
29 #define MASK(x) (__insn_shl(-2LL, ((-x << 3) - 1))) argument
30 #define NULMASK(x) (-2LL << (63 - x)) argument
31 #define CFZ(x) __insn_clz(x) argument
32 #define REVCZ(x) __insn_ctz(x) argument
/linux-4.1.27/arch/openrisc/include/asm/
Duaccess.h53 #define set_fs(x) (current_thread_info()->addr_limit = (x)) argument
107 #define get_user(x, ptr) \ argument
108 __get_user_check((x), (ptr), sizeof(*(ptr)))
109 #define put_user(x, ptr) \ argument
110 __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
112 #define __get_user(x, ptr) \ argument
113 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
114 #define __put_user(x, ptr) \ argument
115 __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
119 #define __put_user_nocheck(x, ptr, size) \ argument
[all …]
/linux-4.1.27/sound/soc/pxa/
Dmmp-sspa.h52 #define SSPA_CTL_XFRLEN2(x) ((x) << 24) /* Transmit Frame Length in Phase 2 */ argument
54 #define SSPA_CTL_XWDLEN2(x) ((x) << 21) /* Transmit Word Length in Phase 2 */ argument
55 #define SSPA_CTL_XDATDLY(x) ((x) << 19) /* Tansmit Data Delay */ argument
57 #define SSPA_CTL_XSSZ2(x) ((x) << 16) /* Transmit Sample Audio Size */ argument
59 #define SSPA_CTL_XFRLEN1(x) ((x) << 8) /* Transmit Frame Length in Phase 1 */ argument
61 #define SSPA_CTL_XWDLEN1(x) ((x) << 5) /* Transmit Word Length in Phase 1 */ argument
63 #define SSPA_CTL_XSSZ1(x) ((x) << 0) /* XSSZ1 */ argument
80 #define SSPA_SP_FWID(x) ((x) << 20) /* Frame-Sync Width */ argument
81 #define SSPA_TXSP_FPER(x) ((x) << 4) /* Frame-Sync Active */ argument
/linux-4.1.27/arch/mips/include/asm/mach-ip27/
Dmangle-port.h16 # define ioswabb(a, x) (x) argument
17 # define __mem_ioswabb(a, x) (x) argument
18 # define ioswabw(a, x) (x) argument
19 # define __mem_ioswabw(a, x) cpu_to_le16(x) argument
20 # define ioswabl(a, x) (x) argument
21 # define __mem_ioswabl(a, x) cpu_to_le32(x) argument
22 # define ioswabq(a, x) (x) argument
23 # define __mem_ioswabq(a, x) cpu_to_le32(x) argument
/linux-4.1.27/arch/mips/include/asm/mach-ip32/
Dmangle-port.h17 # define ioswabb(a, x) (x) argument
18 # define __mem_ioswabb(a, x) (x) argument
19 # define ioswabw(a, x) (x) argument
20 # define __mem_ioswabw(a, x) cpu_to_le16(x) argument
21 # define ioswabl(a, x) (x) argument
22 # define __mem_ioswabl(a, x) cpu_to_le32(x) argument
23 # define ioswabq(a, x) (x) argument
24 # define __mem_ioswabq(a, x) cpu_to_le32(x) argument
/linux-4.1.27/arch/blackfin/mach-bf561/include/mach/
Dblackfin.h31 #define __SIC_MUX(base, x) ((base) + ((x) << 2)) argument
32 #define bfin_read_SIC_IMASK(x) bfin_read32(__SIC_MUX(SIC_IMASK0, x)) argument
33 #define bfin_write_SIC_IMASK(x, val) bfin_write32(__SIC_MUX(SIC_IMASK0, x), val) argument
34 #define bfin_read_SICB_IMASK(x) bfin_read32(__SIC_MUX(SICB_IMASK0, x)) argument
35 #define bfin_write_SICB_IMASK(x, val) bfin_write32(__SIC_MUX(SICB_IMASK0, x), val) argument
36 #define bfin_read_SIC_ISR(x) bfin_read32(__SIC_MUX(SIC_ISR0, x)) argument
37 #define bfin_write_SIC_ISR(x, val) bfin_write32(__SIC_MUX(SIC_ISR0, x), val) argument
38 #define bfin_read_SICB_ISR(x) bfin_read32(__SIC_MUX(SICB_ISR0, x)) argument
39 #define bfin_write_SICB_ISR(x, val) bfin_write32(__SIC_MUX(SICB_ISR0, x), val) argument
/linux-4.1.27/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h386 #define P0_IVG(x) ((x)-7) /* Peripheral #0 assigned IVG #x */ argument
387 #define P1_IVG(x) ((x)-7) << 0x4 /* Peripheral #1 assigned IVG #x */ argument
388 #define P2_IVG(x) ((x)-7) << 0x8 /* Peripheral #2 assigned IVG #x */ argument
389 #define P3_IVG(x) ((x)-7) << 0xC /* Peripheral #3 assigned IVG #x */ argument
390 #define P4_IVG(x) ((x)-7) << 0x10 /* Peripheral #4 assigned IVG #x */ argument
391 #define P5_IVG(x) ((x)-7) << 0x14 /* Peripheral #5 assigned IVG #x */ argument
392 #define P6_IVG(x) ((x)-7) << 0x18 /* Peripheral #6 assigned IVG #x */ argument
393 #define P7_IVG(x) ((x)-7) << 0x1C /* Peripheral #7 assigned IVG #x */ argument
397 #define P8_IVG(x) ((x)-7) /* Peripheral #8 assigned IVG #x */ argument
398 #define P9_IVG(x) ((x)-7) << 0x4 /* Peripheral #9 assigned IVG #x */ argument
[all …]
/linux-4.1.27/arch/parisc/include/uapi/asm/
Dswab.h9 static inline __attribute_const__ __u16 __arch_swab16(__u16 x) in __arch_swab16() argument
13 : "=r" (x) in __arch_swab16()
14 : "0" (x)); in __arch_swab16()
15 return x; in __arch_swab16()
19 static inline __attribute_const__ __u32 __arch_swab24(__u32 x) in __arch_swab24() argument
24 : "=r" (x) in __arch_swab24()
25 : "0" (x)); in __arch_swab24()
26 return x; in __arch_swab24()
29 static inline __attribute_const__ __u32 __arch_swab32(__u32 x) in __arch_swab32() argument
35 : "=r" (x), "=&r" (temp) in __arch_swab32()
[all …]
/linux-4.1.27/arch/m32r/include/asm/
Dpage.h29 #define pte_val(x) ((x).pte) argument
35 #define pmd_val(x) ((x).pmd) argument
36 #define pgd_val(x) ((x).pgd) argument
37 #define pgprot_val(x) ((x).pgprot) argument
39 #define __pte(x) ((pte_t) { (x) } ) argument
40 #define __pmd(x) ((pmd_t) { (x) } ) argument
41 #define __pgd(x) ((pgd_t) { (x) } ) argument
42 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
69 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) argument
70 #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET)) argument
[all …]

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