Searched refs:uart (Results 1 - 200 of 344) sorted by relevance

12

/linux-4.1.27/drivers/tty/serial/
H A Dbfin_uart.c15 #define DRIVER_NAME "bfin-uart"
70 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
72 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
81 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_get_mctrl() local
82 if (uart->cts_pin < 0) bfin_serial_get_mctrl()
86 if (UART_GET_CTS(uart)) bfin_serial_get_mctrl()
94 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_set_mctrl() local
95 if (uart->rts_pin < 0) bfin_serial_set_mctrl()
100 UART_ENABLE_RTS(uart); bfin_serial_set_mctrl()
102 UART_DISABLE_RTS(uart); bfin_serial_set_mctrl()
110 struct bfin_serial_port *uart = dev_id; bfin_serial_mctrl_cts_int() local
111 struct uart_port *uport = &uart->port; bfin_serial_mctrl_cts_int()
115 UART_CLEAR_SCTS(uart); bfin_serial_mctrl_cts_int()
147 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_stop_tx() local
149 struct circ_buf *xmit = &uart->port.state->xmit; bfin_serial_stop_tx()
152 while (!(UART_GET_LSR(uart) & TEMT)) bfin_serial_stop_tx()
156 disable_dma(uart->tx_dma_channel); bfin_serial_stop_tx()
157 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1); bfin_serial_stop_tx()
158 uart->port.icount.tx += uart->tx_count; bfin_serial_stop_tx()
159 uart->tx_count = 0; bfin_serial_stop_tx()
160 uart->tx_done = 1; bfin_serial_stop_tx()
164 UART_PUT_LSR(uart, TFI); bfin_serial_stop_tx()
166 UART_CLEAR_IER(uart, ETBEI); bfin_serial_stop_tx()
175 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_start_tx() local
176 struct tty_struct *tty = uart->port.state->port.tty; bfin_serial_start_tx()
186 if (uart->tx_done) bfin_serial_start_tx()
187 bfin_serial_dma_tx_chars(uart); bfin_serial_start_tx()
189 UART_SET_IER(uart, ETBEI); bfin_serial_start_tx()
190 bfin_serial_tx_chars(uart); bfin_serial_start_tx()
199 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_stop_rx() local
201 UART_CLEAR_IER(uart, ERBFI); bfin_serial_stop_rx()
205 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
206 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
208 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
209 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
213 static void bfin_serial_rx_chars(struct bfin_serial_port *uart) bfin_serial_rx_chars() argument
218 status = UART_GET_LSR(uart); bfin_serial_rx_chars()
219 UART_CLEAR_LSR(uart); bfin_serial_rx_chars()
221 ch = UART_GET_CHAR(uart); bfin_serial_rx_chars()
222 uart->port.icount.rx++; bfin_serial_rx_chars()
226 if (kgdb_connected && kgdboc_port_line == uart->port.line bfin_serial_rx_chars()
233 if (!uart->port.state) bfin_serial_rx_chars()
265 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart)) bfin_serial_rx_chars()
285 uart->port.icount.brk++; bfin_serial_rx_chars()
286 if (uart_handle_break(&uart->port)) bfin_serial_rx_chars()
291 uart->port.icount.parity++; bfin_serial_rx_chars()
293 uart->port.icount.overrun++; bfin_serial_rx_chars()
295 uart->port.icount.frame++; bfin_serial_rx_chars()
297 status &= uart->port.read_status_mask; bfin_serial_rx_chars()
308 if (uart_handle_sysrq_char(&uart->port, ch)) bfin_serial_rx_chars()
311 uart_insert_char(&uart->port, status, OE, ch, flg); bfin_serial_rx_chars()
314 tty_flip_buffer_push(&uart->port.state->port); bfin_serial_rx_chars()
317 static void bfin_serial_tx_chars(struct bfin_serial_port *uart) bfin_serial_tx_chars() argument
319 struct circ_buf *xmit = &uart->port.state->xmit; bfin_serial_tx_chars()
321 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { bfin_serial_tx_chars()
324 UART_PUT_LSR(uart, TFI); bfin_serial_tx_chars()
331 UART_CLEAR_IER(uart, ETBEI); bfin_serial_tx_chars()
335 if (uart->port.x_char) { bfin_serial_tx_chars()
336 UART_PUT_CHAR(uart, uart->port.x_char); bfin_serial_tx_chars()
337 uart->port.icount.tx++; bfin_serial_tx_chars()
338 uart->port.x_char = 0; bfin_serial_tx_chars()
341 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) { bfin_serial_tx_chars()
342 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]); bfin_serial_tx_chars()
344 uart->port.icount.tx++; bfin_serial_tx_chars()
348 uart_write_wakeup(&uart->port); bfin_serial_tx_chars()
353 struct bfin_serial_port *uart = dev_id; bfin_serial_rx_int() local
355 while (UART_GET_LSR(uart) & DR) bfin_serial_rx_int()
356 bfin_serial_rx_chars(uart); bfin_serial_rx_int()
363 struct bfin_serial_port *uart = dev_id; bfin_serial_tx_int() local
365 spin_lock(&uart->port.lock); bfin_serial_tx_int()
366 if (UART_GET_LSR(uart) & THRE) bfin_serial_tx_int()
367 bfin_serial_tx_chars(uart); bfin_serial_tx_int()
368 spin_unlock(&uart->port.lock); bfin_serial_tx_int()
375 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) bfin_serial_dma_tx_chars() argument
377 struct circ_buf *xmit = &uart->port.state->xmit; bfin_serial_dma_tx_chars()
379 uart->tx_done = 0; bfin_serial_dma_tx_chars()
381 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { bfin_serial_dma_tx_chars()
382 uart->tx_count = 0; bfin_serial_dma_tx_chars()
383 uart->tx_done = 1; bfin_serial_dma_tx_chars()
387 if (uart->port.x_char) { bfin_serial_dma_tx_chars()
388 UART_PUT_CHAR(uart, uart->port.x_char); bfin_serial_dma_tx_chars()
389 uart->port.icount.tx++; bfin_serial_dma_tx_chars()
390 uart->port.x_char = 0; bfin_serial_dma_tx_chars()
393 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE); bfin_serial_dma_tx_chars()
394 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail)) bfin_serial_dma_tx_chars()
395 uart->tx_count = UART_XMIT_SIZE - xmit->tail; bfin_serial_dma_tx_chars()
397 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count)); bfin_serial_dma_tx_chars()
398 set_dma_config(uart->tx_dma_channel, bfin_serial_dma_tx_chars()
404 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail)); bfin_serial_dma_tx_chars()
405 set_dma_x_count(uart->tx_dma_channel, uart->tx_count); bfin_serial_dma_tx_chars()
406 set_dma_x_modify(uart->tx_dma_channel, 1); bfin_serial_dma_tx_chars()
408 enable_dma(uart->tx_dma_channel); bfin_serial_dma_tx_chars()
410 UART_SET_IER(uart, ETBEI); bfin_serial_dma_tx_chars()
413 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart) bfin_serial_dma_rx_chars() argument
417 status = UART_GET_LSR(uart); bfin_serial_dma_rx_chars()
418 UART_CLEAR_LSR(uart); bfin_serial_dma_rx_chars()
420 uart->port.icount.rx += bfin_serial_dma_rx_chars()
421 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, bfin_serial_dma_rx_chars()
425 uart->port.icount.brk++; bfin_serial_dma_rx_chars()
426 if (uart_handle_break(&uart->port)) bfin_serial_dma_rx_chars()
431 uart->port.icount.parity++; bfin_serial_dma_rx_chars()
433 uart->port.icount.overrun++; bfin_serial_dma_rx_chars()
435 uart->port.icount.frame++; bfin_serial_dma_rx_chars()
437 status &= uart->port.read_status_mask; bfin_serial_dma_rx_chars()
448 for (i = uart->rx_dma_buf.tail; ; i++) { bfin_serial_dma_rx_chars()
451 if (i == uart->rx_dma_buf.head) bfin_serial_dma_rx_chars()
453 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i])) bfin_serial_dma_rx_chars()
454 uart_insert_char(&uart->port, status, OE, bfin_serial_dma_rx_chars()
455 uart->rx_dma_buf.buf[i], flg); bfin_serial_dma_rx_chars()
459 tty_flip_buffer_push(&uart->port.state->port); bfin_serial_dma_rx_chars()
462 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart) bfin_serial_rx_dma_timeout() argument
467 dma_disable_irq_nosync(uart->rx_dma_channel); bfin_serial_rx_dma_timeout()
468 spin_lock_irqsave(&uart->rx_lock, flags); bfin_serial_rx_dma_timeout()
479 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel); bfin_serial_rx_dma_timeout()
480 x_pos = get_dma_curr_xcount(uart->rx_dma_channel); bfin_serial_rx_dma_timeout()
481 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows; bfin_serial_rx_dma_timeout()
482 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0) bfin_serial_rx_dma_timeout()
483 uart->rx_dma_nrows = 0; bfin_serial_rx_dma_timeout()
488 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos; bfin_serial_rx_dma_timeout()
492 if (pos > uart->rx_dma_buf.tail || bfin_serial_rx_dma_timeout()
493 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) { bfin_serial_rx_dma_timeout()
494 uart->rx_dma_buf.head = pos; bfin_serial_rx_dma_timeout()
495 bfin_serial_dma_rx_chars(uart); bfin_serial_rx_dma_timeout()
496 uart->rx_dma_buf.tail = uart->rx_dma_buf.head; bfin_serial_rx_dma_timeout()
499 spin_unlock_irqrestore(&uart->rx_lock, flags); bfin_serial_rx_dma_timeout()
500 dma_enable_irq(uart->rx_dma_channel); bfin_serial_rx_dma_timeout()
502 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES); bfin_serial_rx_dma_timeout()
507 struct bfin_serial_port *uart = dev_id; bfin_serial_dma_tx_int() local
508 struct circ_buf *xmit = &uart->port.state->xmit; bfin_serial_dma_tx_int()
510 spin_lock(&uart->port.lock); bfin_serial_dma_tx_int()
511 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { bfin_serial_dma_tx_int()
512 disable_dma(uart->tx_dma_channel); bfin_serial_dma_tx_int()
513 clear_dma_irqstat(uart->tx_dma_channel); bfin_serial_dma_tx_int()
519 UART_CLEAR_IER(uart, ETBEI); bfin_serial_dma_tx_int()
520 uart->port.icount.tx += uart->tx_count; bfin_serial_dma_tx_int()
522 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1); bfin_serial_dma_tx_int()
525 uart_write_wakeup(&uart->port); bfin_serial_dma_tx_int()
528 bfin_serial_dma_tx_chars(uart); bfin_serial_dma_tx_int()
531 spin_unlock(&uart->port.lock); bfin_serial_dma_tx_int()
537 struct bfin_serial_port *uart = dev_id; bfin_serial_dma_rx_int() local
541 spin_lock(&uart->rx_lock); bfin_serial_dma_rx_int()
542 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel); bfin_serial_dma_rx_int()
543 clear_dma_irqstat(uart->rx_dma_channel); bfin_serial_dma_rx_int()
545 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel); bfin_serial_dma_rx_int()
546 x_pos = get_dma_curr_xcount(uart->rx_dma_channel); bfin_serial_dma_rx_int()
547 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows; bfin_serial_dma_rx_int()
548 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0) bfin_serial_dma_rx_int()
549 uart->rx_dma_nrows = 0; bfin_serial_dma_rx_int()
551 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT; bfin_serial_dma_rx_int()
552 if (pos > uart->rx_dma_buf.tail || bfin_serial_dma_rx_int()
553 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) { bfin_serial_dma_rx_int()
554 uart->rx_dma_buf.head = pos; bfin_serial_dma_rx_int()
555 bfin_serial_dma_rx_chars(uart); bfin_serial_dma_rx_int()
556 uart->rx_dma_buf.tail = uart->rx_dma_buf.head; bfin_serial_dma_rx_int()
559 spin_unlock(&uart->rx_lock); bfin_serial_dma_rx_int()
570 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_tx_empty() local
573 lsr = UART_GET_LSR(uart); bfin_serial_tx_empty()
582 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_break_ctl() local
583 u32 lcr = UART_GET_LCR(uart); bfin_serial_break_ctl()
588 UART_PUT_LCR(uart, lcr); bfin_serial_break_ctl()
594 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_startup() local
599 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) { bfin_serial_startup()
604 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) { bfin_serial_startup()
606 free_dma(uart->rx_dma_channel); bfin_serial_startup()
610 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart); bfin_serial_startup()
611 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart); bfin_serial_startup()
613 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA); bfin_serial_startup()
614 uart->rx_dma_buf.head = 0; bfin_serial_startup()
615 uart->rx_dma_buf.tail = 0; bfin_serial_startup()
616 uart->rx_dma_nrows = 0; bfin_serial_startup()
618 set_dma_config(uart->rx_dma_channel, bfin_serial_startup()
623 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT); bfin_serial_startup()
624 set_dma_x_modify(uart->rx_dma_channel, 1); bfin_serial_startup()
625 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT); bfin_serial_startup()
626 set_dma_y_modify(uart->rx_dma_channel, 1); bfin_serial_startup()
627 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf); bfin_serial_startup()
628 enable_dma(uart->rx_dma_channel); bfin_serial_startup()
630 uart->rx_dma_timer.data = (unsigned long)(uart); bfin_serial_startup()
631 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout; bfin_serial_startup()
632 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES; bfin_serial_startup()
633 add_timer(&(uart->rx_dma_timer)); bfin_serial_startup()
637 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled) bfin_serial_startup()
641 if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0, bfin_serial_startup()
642 "BFIN_UART_RX", uart)) { bfin_serial_startup()
648 (uart->tx_irq, bfin_serial_tx_int, 0, bfin_serial_startup()
649 "BFIN_UART_TX", uart)) { bfin_serial_startup()
651 free_irq(uart->rx_irq, uart); bfin_serial_startup()
666 switch (uart->rx_irq) { bfin_serial_startup()
683 free_irq(uart->rx_irq, uart); bfin_serial_startup()
684 free_irq(uart->tx_irq, uart); bfin_serial_startup()
691 free_irq(uart->rx_irq, uart); bfin_serial_startup()
692 free_irq(uart->tx_irq, uart); bfin_serial_startup()
704 if (uart->cts_pin >= 0) { bfin_serial_startup()
705 if (request_irq(gpio_to_irq(uart->cts_pin), bfin_serial_startup()
708 0, "BFIN_UART_CTS", uart)) { bfin_serial_startup()
709 uart->cts_pin = -1; bfin_serial_startup()
713 if (uart->rts_pin >= 0) { bfin_serial_startup()
714 if (gpio_request(uart->rts_pin, DRIVER_NAME)) { bfin_serial_startup()
715 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin); bfin_serial_startup()
716 uart->rts_pin = -1; bfin_serial_startup()
718 gpio_direction_output(uart->rts_pin, 0); bfin_serial_startup()
722 if (uart->cts_pin >= 0) { bfin_serial_startup()
723 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int, bfin_serial_startup()
724 0, "BFIN_UART_MODEM_STATUS", uart)) { bfin_serial_startup()
725 uart->cts_pin = -1; bfin_serial_startup()
730 UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS); bfin_serial_startup()
731 UART_SET_IER(uart, EDSSI); bfin_serial_startup()
735 UART_SET_IER(uart, ERBFI); bfin_serial_startup()
741 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_shutdown() local
744 disable_dma(uart->tx_dma_channel); bfin_serial_shutdown()
745 free_dma(uart->tx_dma_channel); bfin_serial_shutdown()
746 disable_dma(uart->rx_dma_channel); bfin_serial_shutdown()
747 free_dma(uart->rx_dma_channel); bfin_serial_shutdown()
748 del_timer(&(uart->rx_dma_timer)); bfin_serial_shutdown()
749 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0); bfin_serial_shutdown()
752 switch (uart->port.irq) { bfin_serial_shutdown()
765 free_irq(uart->rx_irq, uart); bfin_serial_shutdown()
766 free_irq(uart->tx_irq, uart); bfin_serial_shutdown()
770 if (uart->cts_pin >= 0) bfin_serial_shutdown()
771 free_irq(gpio_to_irq(uart->cts_pin), uart); bfin_serial_shutdown()
772 if (uart->rts_pin >= 0) bfin_serial_shutdown()
773 gpio_free(uart->rts_pin); bfin_serial_shutdown()
776 if (uart->cts_pin >= 0) bfin_serial_shutdown()
777 free_irq(uart->status_irq, uart); bfin_serial_shutdown()
785 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_set_termios() local
792 if (old == NULL && uart->cts_pin != -1) bfin_serial_set_termios()
794 else if (uart->cts_pin == -1) bfin_serial_set_termios()
833 spin_lock_irqsave(&uart->port.lock, flags); bfin_serial_set_termios()
864 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15); bfin_serial_set_termios()
868 while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT)) bfin_serial_set_termios()
875 ier = UART_GET_IER(uart); bfin_serial_set_termios()
876 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN); bfin_serial_set_termios()
877 UART_DISABLE_INTS(uart); bfin_serial_set_termios()
880 UART_SET_DLAB(uart); bfin_serial_set_termios()
882 UART_PUT_CLK(uart, quot); bfin_serial_set_termios()
886 UART_CLEAR_DLAB(uart); bfin_serial_set_termios()
888 UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr); bfin_serial_set_termios()
891 UART_ENABLE_INTS(uart, ier); bfin_serial_set_termios()
892 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN); bfin_serial_set_termios()
897 spin_unlock_irqrestore(&uart->port.lock, flags); bfin_serial_set_termios()
902 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_type() local
904 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL; bfin_serial_type()
927 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_config_port() local
930 bfin_serial_request_port(&uart->port) == 0) bfin_serial_config_port()
931 uart->port.type = PORT_BFIN; bfin_serial_config_port()
952 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_set_ldisc() local
957 val = UART_GET_GCTL(uart); bfin_serial_set_ldisc()
959 UART_PUT_GCTL(uart, val); bfin_serial_set_ldisc()
962 val = UART_GET_GCTL(uart); bfin_serial_set_ldisc()
964 UART_PUT_GCTL(uart, val); bfin_serial_set_ldisc()
970 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_reset_irda() local
973 val = UART_GET_GCTL(uart); bfin_serial_reset_irda()
975 UART_PUT_GCTL(uart, val); bfin_serial_reset_irda()
978 UART_PUT_GCTL(uart, val); bfin_serial_reset_irda()
989 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_poll_put_char() local
991 while (!(UART_GET_LSR(uart) & THRE)) bfin_serial_poll_put_char()
994 UART_CLEAR_DLAB(uart); bfin_serial_poll_put_char()
995 UART_PUT_CHAR(uart, (unsigned char)chr); bfin_serial_poll_put_char()
1000 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_poll_get_char() local
1003 while (!(UART_GET_LSR(uart) & DR)) bfin_serial_poll_get_char()
1006 UART_CLEAR_DLAB(uart); bfin_serial_poll_get_char()
1007 chr = UART_GET_CHAR(uart); bfin_serial_poll_get_char()
1042 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud, bfin_serial_console_get_options() argument
1047 status = UART_GET_IER(uart) & (ERBFI | ETBEI); bfin_serial_console_get_options()
1052 lcr = UART_GET_LCR(uart); bfin_serial_console_get_options()
1064 UART_SET_DLAB(uart); bfin_serial_console_get_options()
1066 clk = UART_GET_CLK(uart); bfin_serial_console_get_options()
1069 UART_CLEAR_DLAB(uart); bfin_serial_console_get_options()
1080 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; bfin_serial_console_putchar() local
1081 while (!(UART_GET_LSR(uart) & THRE)) bfin_serial_console_putchar()
1083 UART_PUT_CHAR(uart, ch); bfin_serial_console_putchar()
1097 struct bfin_serial_port *uart = bfin_serial_ports[co->index]; bfin_serial_console_write() local
1100 spin_lock_irqsave(&uart->port.lock, flags); bfin_serial_console_write()
1101 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar); bfin_serial_console_write()
1102 spin_unlock_irqrestore(&uart->port.lock, flags); bfin_serial_console_write()
1109 struct bfin_serial_port *uart; bfin_serial_console_setup() local
1121 * Check whether an invalid uart number has been specified, and bfin_serial_console_setup()
1128 uart = bfin_serial_ports[co->index]; bfin_serial_console_setup()
1129 if (!uart) bfin_serial_console_setup()
1135 bfin_serial_console_get_options(uart, &baud, &parity, &bits); bfin_serial_console_setup()
1137 return uart_set_options(&uart->port, co, baud, parity, bits, flow); bfin_serial_console_setup()
1203 struct bfin_serial_port *uart = platform_get_drvdata(pdev); bfin_serial_suspend() local
1205 return uart_suspend_port(&bfin_serial_reg, &uart->port); bfin_serial_suspend()
1210 struct bfin_serial_port *uart = platform_get_drvdata(pdev); bfin_serial_resume() local
1212 return uart_resume_port(&bfin_serial_reg, &uart->port); bfin_serial_resume()
1218 struct bfin_serial_port *uart = NULL; bfin_serial_probe() local
1222 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n"); bfin_serial_probe()
1228 uart = kzalloc(sizeof(*uart), GFP_KERNEL); bfin_serial_probe()
1229 if (!uart) { bfin_serial_probe()
1234 bfin_serial_ports[pdev->id] = uart; bfin_serial_probe()
1256 spin_lock_init(&uart->port.lock); bfin_serial_probe()
1257 uart->port.uartclk = get_sclk(); bfin_serial_probe()
1258 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE; bfin_serial_probe()
1259 uart->port.ops = &bfin_serial_pops; bfin_serial_probe()
1260 uart->port.line = pdev->id; bfin_serial_probe()
1261 uart->port.iotype = UPIO_MEM; bfin_serial_probe()
1262 uart->port.flags = UPF_BOOT_AUTOCONF; bfin_serial_probe()
1271 uart->port.membase = ioremap(res->start, resource_size(res)); bfin_serial_probe()
1272 if (!uart->port.membase) { bfin_serial_probe()
1273 dev_err(&pdev->dev, "Cannot map uart IO\n"); bfin_serial_probe()
1277 uart->port.mapbase = res->start; bfin_serial_probe()
1279 uart->tx_irq = platform_get_irq(pdev, 0); bfin_serial_probe()
1280 if (uart->tx_irq < 0) { bfin_serial_probe()
1281 dev_err(&pdev->dev, "No uart TX IRQ specified\n"); bfin_serial_probe()
1286 uart->rx_irq = platform_get_irq(pdev, 1); bfin_serial_probe()
1287 if (uart->rx_irq < 0) { bfin_serial_probe()
1288 dev_err(&pdev->dev, "No uart RX IRQ specified\n"); bfin_serial_probe()
1292 uart->port.irq = uart->rx_irq; bfin_serial_probe()
1294 uart->status_irq = platform_get_irq(pdev, 2); bfin_serial_probe()
1295 if (uart->status_irq < 0) { bfin_serial_probe()
1296 dev_err(&pdev->dev, "No uart status IRQ specified\n"); bfin_serial_probe()
1302 spin_lock_init(&uart->rx_lock); bfin_serial_probe()
1303 uart->tx_done = 1; bfin_serial_probe()
1304 uart->tx_count = 0; bfin_serial_probe()
1308 dev_err(&pdev->dev, "No uart TX DMA channel specified\n"); bfin_serial_probe()
1312 uart->tx_dma_channel = res->start; bfin_serial_probe()
1316 dev_err(&pdev->dev, "No uart RX DMA channel specified\n"); bfin_serial_probe()
1320 uart->rx_dma_channel = res->start; bfin_serial_probe()
1322 init_timer(&(uart->rx_dma_timer)); bfin_serial_probe()
1329 uart->cts_pin = -1; bfin_serial_probe()
1331 uart->cts_pin = res->start; bfin_serial_probe()
1335 uart->rts_pin = -1; bfin_serial_probe()
1337 uart->rts_pin = res->start; bfin_serial_probe()
1344 uart = bfin_serial_ports[pdev->id]; bfin_serial_probe()
1345 uart->port.dev = &pdev->dev; bfin_serial_probe()
1346 dev_set_drvdata(&pdev->dev, uart); bfin_serial_probe()
1347 ret = uart_add_one_port(&bfin_serial_reg, &uart->port); bfin_serial_probe()
1355 if (uart) { bfin_serial_probe()
1357 iounmap(uart->port.membase); bfin_serial_probe()
1361 kfree(uart); bfin_serial_probe()
1370 struct bfin_serial_port *uart = platform_get_drvdata(pdev); bfin_serial_remove() local
1374 if (uart) { bfin_serial_remove()
1375 uart_remove_one_port(&bfin_serial_reg, &uart->port); bfin_serial_remove()
1376 iounmap(uart->port.membase); bfin_serial_remove()
1378 kfree(uart); bfin_serial_remove()
1418 * So, do individual probe for earlyprink with a static uart port variable.
1448 dev_err(&pdev->dev, "Cannot map uart IO\n"); bfin_earlyprintk_probe()
1535 pr_err("fail to register bfin uart\n"); bfin_serial_init()
1556 MODULE_ALIAS("platform:bfin-uart");
H A Dmen_z135_uart.c136 * @uart: The UART port
140 static inline void men_z135_reg_set(struct men_z135_port *uart, men_z135_reg_set() argument
143 struct uart_port *port = &uart->port; men_z135_reg_set()
147 spin_lock_irqsave(&uart->lock, flags); men_z135_reg_set()
153 spin_unlock_irqrestore(&uart->lock, flags); men_z135_reg_set()
158 * @uart: The UART port
162 static inline void men_z135_reg_clr(struct men_z135_port *uart, men_z135_reg_clr() argument
165 struct uart_port *port = &uart->port; men_z135_reg_clr()
169 spin_lock_irqsave(&uart->lock, flags); men_z135_reg_clr()
175 spin_unlock_irqrestore(&uart->lock, flags); men_z135_reg_clr()
185 static void men_z135_handle_modem_status(struct men_z135_port *uart) men_z135_handle_modem_status() argument
189 msr = (uart->stat_reg >> 8) & 0xff; men_z135_handle_modem_status()
192 uart_handle_dcd_change(&uart->port, men_z135_handle_modem_status()
195 uart_handle_cts_change(&uart->port, men_z135_handle_modem_status()
199 static void men_z135_handle_lsr(struct men_z135_port *uart) men_z135_handle_lsr() argument
201 struct uart_port *port = &uart->port; men_z135_handle_lsr()
204 lsr = (uart->stat_reg >> 16) & 0xff; men_z135_handle_lsr()
220 * @uart: The UART port
224 static u16 get_rx_fifo_content(struct men_z135_port *uart) get_rx_fifo_content() argument
226 struct uart_port *port = &uart->port; get_rx_fifo_content()
247 static void men_z135_handle_rx(struct men_z135_port *uart) men_z135_handle_rx() argument
249 struct uart_port *port = &uart->port; men_z135_handle_rx()
255 size = get_rx_fifo_content(uart); men_z135_handle_rx()
268 dev_warn(&uart->mdev->dev, men_z135_handle_rx()
275 memcpy_fromio(uart->rxbuf, port->membase + MEN_Z135_RX_RAM, room); men_z135_handle_rx()
280 copied = tty_insert_flip_string(tport, uart->rxbuf, room); men_z135_handle_rx()
282 dev_warn(&uart->mdev->dev, men_z135_handle_rx()
297 static void men_z135_handle_tx(struct men_z135_port *uart) men_z135_handle_tx() argument
299 struct uart_port *port = &uart->port; men_z135_handle_tx()
333 dev_err(&uart->mdev->dev, men_z135_handle_tx()
371 men_z135_reg_set(uart, MEN_Z135_CONF_REG, MEN_Z135_IER_TXCIEN); men_z135_handle_tx()
373 men_z135_reg_clr(uart, MEN_Z135_CONF_REG, MEN_Z135_IER_TXCIEN); men_z135_handle_tx()
392 struct men_z135_port *uart = (struct men_z135_port *)data; men_z135_intr() local
393 struct uart_port *port = &uart->port; men_z135_intr()
397 uart->stat_reg = ioread32(port->membase + MEN_Z135_STAT_REG); men_z135_intr()
398 irq_id = IRQ_ID(uart->stat_reg); men_z135_intr()
408 men_z135_handle_lsr(uart); men_z135_intr()
414 dev_dbg(&uart->mdev->dev, "Character Timeout Indication\n"); men_z135_intr()
415 men_z135_handle_rx(uart); men_z135_intr()
420 men_z135_handle_tx(uart); men_z135_intr()
425 men_z135_handle_modem_status(uart); men_z135_intr()
436 * @uart: z135 private uart port structure
441 static int men_z135_request_irq(struct men_z135_port *uart) men_z135_request_irq() argument
443 struct device *dev = &uart->mdev->dev; men_z135_request_irq()
444 struct uart_port *port = &uart->port; men_z135_request_irq()
448 "men_z135_intr", uart); men_z135_request_irq()
554 struct men_z135_port *uart = to_men_z135(port); men_z135_stop_tx() local
556 men_z135_reg_clr(uart, MEN_Z135_CONF_REG, MEN_Z135_IER_TXCIEN); men_z135_stop_tx()
567 struct men_z135_port *uart = to_men_z135(port); men_z135_disable_ms() local
569 men_z135_reg_clr(uart, MEN_Z135_CONF_REG, MEN_Z135_IER_MSIEN); men_z135_disable_ms()
581 struct men_z135_port *uart = to_men_z135(port); men_z135_start_tx() local
583 if (uart->automode) men_z135_start_tx()
586 men_z135_handle_tx(uart); men_z135_start_tx()
597 struct men_z135_port *uart = to_men_z135(port); men_z135_stop_rx() local
599 men_z135_reg_clr(uart, MEN_Z135_CONF_REG, MEN_Z135_IER_RXCIEN); men_z135_stop_rx()
610 struct men_z135_port *uart = to_men_z135(port); men_z135_enable_ms() local
612 men_z135_reg_set(uart, MEN_Z135_CONF_REG, MEN_Z135_IER_MSIEN); men_z135_enable_ms()
617 struct men_z135_port *uart = to_men_z135(port); men_z135_startup() local
621 err = men_z135_request_irq(uart); men_z135_startup()
643 struct men_z135_port *uart = to_men_z135(port); men_z135_shutdown() local
648 men_z135_reg_clr(uart, MEN_Z135_CONF_REG, conf_reg); men_z135_shutdown()
650 free_irq(uart->port.irq, uart); men_z135_shutdown()
657 struct men_z135_port *uart = to_men_z135(port); men_z135_set_termios() local
701 uart->automode = true; men_z135_set_termios()
705 uart->automode = false; men_z135_set_termios()
804 * new uart port to the tty layer.
809 struct men_z135_port *uart; men_z135_probe() local
816 uart = devm_kzalloc(dev, sizeof(struct men_z135_port), GFP_KERNEL); men_z135_probe()
817 if (!uart) men_z135_probe()
820 uart->rxbuf = (unsigned char *)__get_free_page(GFP_KERNEL); men_z135_probe()
821 if (!uart->rxbuf) men_z135_probe()
826 mcb_set_drvdata(mdev, uart); men_z135_probe()
828 uart->port.uartclk = MEN_Z135_BASECLK * 16; men_z135_probe()
829 uart->port.fifosize = MEN_Z135_FIFO_SIZE; men_z135_probe()
830 uart->port.iotype = UPIO_MEM; men_z135_probe()
831 uart->port.ops = &men_z135_ops; men_z135_probe()
832 uart->port.irq = mcb_get_irq(mdev); men_z135_probe()
833 uart->port.iotype = UPIO_MEM; men_z135_probe()
834 uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP; men_z135_probe()
835 uart->port.line = line++; men_z135_probe()
836 uart->port.dev = dev; men_z135_probe()
837 uart->port.type = PORT_MEN_Z135; men_z135_probe()
838 uart->port.mapbase = mem->start; men_z135_probe()
839 uart->port.membase = NULL; men_z135_probe()
840 uart->mdev = mdev; men_z135_probe()
842 spin_lock_init(&uart->port.lock); men_z135_probe()
843 spin_lock_init(&uart->lock); men_z135_probe()
845 err = uart_add_one_port(&men_z135_driver, &uart->port); men_z135_probe()
852 free_page((unsigned long) uart->rxbuf); men_z135_probe()
865 struct men_z135_port *uart = mcb_get_drvdata(mdev); men_z135_remove() local
868 uart_remove_one_port(&men_z135_driver, &uart->port); men_z135_remove()
869 free_page((unsigned long) uart->rxbuf); men_z135_remove()
880 .name = "z135-uart",
H A Dtimbuart.c67 struct timbuart_port *uart = timbuart_start_tx() local
71 tasklet_schedule(&uart->tasklet); timbuart_start_tx()
133 struct timbuart_port *uart = timbuart_handle_tx_port() local
152 *ier |= uart->last_ier & TXFLAGS; timbuart_handle_tx_port()
189 struct timbuart_port *uart = (struct timbuart_port *)arg; timbuart_tasklet() local
192 spin_lock(&uart->port.lock); timbuart_tasklet()
194 isr = ioread32(uart->port.membase + TIMBUART_ISR); timbuart_tasklet()
195 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr); timbuart_tasklet()
197 if (!uart->usedma) timbuart_tasklet()
198 timbuart_handle_tx_port(&uart->port, isr, &ier); timbuart_tasklet()
200 timbuart_mctrl_check(&uart->port, isr, &ier); timbuart_tasklet()
202 if (!uart->usedma) timbuart_tasklet()
203 timbuart_handle_rx_port(&uart->port, isr, &ier); timbuart_tasklet()
205 iowrite32(ier, uart->port.membase + TIMBUART_IER); timbuart_tasklet()
207 spin_unlock(&uart->port.lock); timbuart_tasklet()
208 dev_dbg(uart->port.dev, "%s leaving\n", __func__); timbuart_tasklet()
254 struct timbuart_port *uart = timbuart_startup() local
266 "timb-uart", uart); timbuart_startup()
271 struct timbuart_port *uart = timbuart_shutdown() local
274 free_irq(port->irq, uart); timbuart_shutdown()
347 if (!request_mem_region(port->mapbase, size, "timb-uart")) timbuart_request_port()
363 struct timbuart_port *uart = (struct timbuart_port *)devid; timbuart_handleinterrupt() local
365 if (ioread8(uart->port.membase + TIMBUART_IPR)) { timbuart_handleinterrupt()
366 uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER); timbuart_handleinterrupt()
369 iowrite32(0, uart->port.membase + TIMBUART_IER); timbuart_handleinterrupt()
372 tasklet_schedule(&uart->tasklet); timbuart_handleinterrupt()
428 struct timbuart_port *uart; timbuart_probe() local
433 uart = kzalloc(sizeof(*uart), GFP_KERNEL); timbuart_probe()
434 if (!uart) { timbuart_probe()
439 uart->usedma = 0; timbuart_probe()
441 uart->port.uartclk = 3250000 * 16; timbuart_probe()
442 uart->port.fifosize = TIMBUART_FIFO_SIZE; timbuart_probe()
443 uart->port.regshift = 2; timbuart_probe()
444 uart->port.iotype = UPIO_MEM; timbuart_probe()
445 uart->port.ops = &timbuart_ops; timbuart_probe()
446 uart->port.irq = 0; timbuart_probe()
447 uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP; timbuart_probe()
448 uart->port.line = 0; timbuart_probe()
449 uart->port.dev = &dev->dev; timbuart_probe()
456 uart->port.mapbase = iomem->start; timbuart_probe()
457 uart->port.membase = NULL; timbuart_probe()
464 uart->port.irq = irq; timbuart_probe()
466 tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart); timbuart_probe()
472 err = uart_add_one_port(&timbuart_driver, &uart->port); timbuart_probe()
476 platform_set_drvdata(dev, uart); timbuart_probe()
483 kfree(uart); timbuart_probe()
493 struct timbuart_port *uart = platform_get_drvdata(dev); timbuart_remove() local
495 tasklet_kill(&uart->tasklet); timbuart_remove()
496 uart_remove_one_port(&timbuart_driver, &uart->port); timbuart_remove()
498 kfree(uart); timbuart_remove()
505 .name = "timb-uart",
515 MODULE_ALIAS("platform:timb-uart");
H A Dvt8500_serial.c109 struct uart_port uart; member in struct:vt8500_port
139 uart); vt8500_stop_tx()
149 uart); vt8500_stop_rx()
159 uart); vt8500_enable_ms()
240 uart); vt8500_start_tx()
318 container_of(port, struct vt8500_port, uart); vt8500_set_baud_rate()
342 container_of(port, struct vt8500_port, uart); vt8500_startup()
361 container_of(port, struct vt8500_port, uart); vt8500_shutdown()
366 vt8500_write(&vt8500_port->uart, 0, VT8500_URIER); vt8500_shutdown()
367 vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR); vt8500_shutdown()
376 container_of(port, struct vt8500_port, uart); vt8500_set_termios()
390 lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR); vt8500_set_termios()
422 vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR); vt8500_set_termios()
432 vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR); vt8500_set_termios()
433 while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc) vt8500_set_termios()
443 if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag)) vt8500_set_termios()
446 vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR); vt8500_set_termios()
447 vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER); vt8500_set_termios()
455 container_of(port, struct vt8500_port, uart); vt8500_type()
516 ier = vt8500_read(&vt8500_port->uart, VT8500_URIER); vt8500_console_write()
517 vt8500_write(&vt8500_port->uart, VT8500_URIER, 0); vt8500_console_write()
519 uart_console_write(&vt8500_port->uart, s, count, vt8500_console_write()
526 wait_for_xmitr(&vt8500_port->uart); vt8500_console_write()
527 vt8500_write(&vt8500_port->uart, VT8500_URIER, ier); vt8500_console_write()
549 return uart_set_options(&vt8500_port->uart, vt8500_console_setup()
631 { .compatible = "via,vt8500-uart", .data = &vt8500_flags},
632 { .compatible = "wm,wm8880-uart", .data = &wm8880_flags},
685 vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres); vt8500_serial_probe()
686 if (IS_ERR(vt8500_port->uart.membase)) vt8500_serial_probe()
687 return PTR_ERR(vt8500_port->uart.membase); vt8500_serial_probe()
706 vt8500_port->uart.type = PORT_VT8500; vt8500_serial_probe()
707 vt8500_port->uart.iotype = UPIO_MEM; vt8500_serial_probe()
708 vt8500_port->uart.mapbase = mmres->start; vt8500_serial_probe()
709 vt8500_port->uart.irq = irqres->start; vt8500_serial_probe()
710 vt8500_port->uart.fifosize = 16; vt8500_serial_probe()
711 vt8500_port->uart.ops = &vt8500_uart_pops; vt8500_serial_probe()
712 vt8500_port->uart.line = port; vt8500_serial_probe()
713 vt8500_port->uart.dev = &pdev->dev; vt8500_serial_probe()
714 vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; vt8500_serial_probe()
717 vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) / vt8500_serial_probe()
726 uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart); vt8500_serial_probe()
738 uart_remove_one_port(&vt8500_uart_driver, &vt8500_port->uart); vt8500_serial_remove()
H A Darc_uart.c83 #define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val)
84 #define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA)
86 #define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val)
87 #define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val)
89 #define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
90 #define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS)
92 #define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
93 #define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)
94 #define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB)
96 #define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
97 #define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)
98 #define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB)
115 #define DRIVER_NAME "arc-uart"
268 * -writes-data-to-uart
345 if (request_irq(port->irq, arc_serial_isr, 0, "arc uart rx-tx", port)) { arc_serial_startup()
365 struct arc_uart_port *uart = to_arc_port(port); arc_serial_set_termios() local
378 hw_val = port->uartclk / (uart->baud * 4) - 1; arc_serial_set_termios()
503 * The uart port backing the console (e.g. ttyARC1) might not have been arc_serial_console_setup()
580 OF_EARLYCON_DECLARE(arc_uart, "snps,arc-uart", arc_early_console_setup);
587 struct arc_uart_port *uart; arc_serial_probe() local
600 uart = &arc_uart_ports[dev_id]; arc_serial_probe()
601 port = &uart->port; arc_serial_probe()
613 uart->baud = val; arc_serial_probe()
646 { .compatible = "snps,arc-uart" },
H A D68328serial.c215 m68328_uart *uart = &uart_addr[info->line]; rs_stop() local
222 uart->ustcnt &= ~USTCNT_TXEN; rs_stop()
247 m68328_uart *uart = &uart_addr[info->line]; rs_start() local
254 if (info->xmit_cnt && info->xmit_buf && !(uart->ustcnt & USTCNT_TXEN)) { rs_start()
256 uart->ustcnt |= USTCNT_TXEN | USTCNT_TX_INTR_MASK; rs_start()
258 uart->ustcnt |= USTCNT_TXEN; rs_start()
266 m68328_uart *uart = &uart_addr[info->line]; receive_chars() local
305 } while((rx = uart->urx.w) & URX_DATA_READY); receive_chars()
313 m68328_uart *uart = &uart_addr[info->line]; transmit_chars() local
317 uart->utx.b.txdata = info->x_char; transmit_chars()
324 uart->ustcnt &= ~USTCNT_TX_INTR_MASK; transmit_chars()
329 uart->utx.b.txdata = info->xmit_buf[info->xmit_tail++]; transmit_chars()
335 uart->ustcnt &= ~USTCNT_TX_INTR_MASK; transmit_chars()
351 m68328_uart *uart; rs_interrupt() local
355 uart = &uart_addr[info->line]; rs_interrupt()
356 rx = uart->urx.w; rs_interrupt()
359 tx = uart->utx.w; rs_interrupt()
375 m68328_uart *uart = &uart_addr[info->line]; startup() local
394 uart->ustcnt = USTCNT_UEN; startup()
395 uart->ustcnt = USTCNT_UEN | USTCNT_RXEN | USTCNT_TXEN; startup()
396 (void)uart->urx.w; startup()
402 uart->ustcnt = USTCNT_UEN | USTCNT_RXEN | startup()
405 uart->ustcnt = USTCNT_UEN | USTCNT_RXEN | USTCNT_RX_INTR_MASK; startup()
429 m68328_uart *uart = &uart_addr[info->line]; shutdown() local
432 uart->ustcnt = 0; /* All off! */ shutdown()
504 m68328_uart *uart = &uart_addr[info->line]; change_speed() local
514 ustcnt = uart->ustcnt; change_speed()
515 uart->ustcnt = ustcnt & ~USTCNT_TXEN; change_speed()
522 uart->ubaud = PUT_FIELD(UBAUD_DIVIDE, hw_baud_table[i].divisor) | change_speed()
540 uart->utx.w &= ~ UTX_NOCTS; change_speed()
542 uart->utx.w |= UTX_NOCTS; change_speed()
548 uart->ustcnt = ustcnt; change_speed()
620 m68328_uart *uart = &uart_addr[info->line]; local
638 uart->ustcnt |= USTCNT_TXEN | USTCNT_TX_INTR_MASK;
640 uart->ustcnt |= USTCNT_TXEN;
644 if (uart->utx.w & UTX_TX_AVAIL) {
649 uart->utx.b.txdata = info->xmit_buf[info->xmit_tail++];
655 while (!(uart->utx.w & UTX_TX_AVAIL)) udelay(5);
668 m68328_uart *uart = &uart_addr[info->line]; rs_write() local
705 uart->ustcnt |= USTCNT_TXEN; rs_write()
707 uart->ustcnt |= USTCNT_TX_INTR_MASK; rs_write()
709 while (!(uart->utx.w & UTX_TX_AVAIL)) udelay(5); rs_write()
711 if (uart->utx.w & UTX_TX_AVAIL) { rs_write()
712 uart->utx.b.txdata = info->xmit_buf[info->xmit_tail++]; rs_write()
888 m68328_uart *uart = &uart_addr[info->line]; get_lsr_info() local
895 status = (uart->utx.w & UTX_CTS_STAT) ? 1 : 0; get_lsr_info()
908 m68328_uart *uart = &uart_addr[info->line]; send_break() local
914 uart->utx.w |= UTX_SEND_BREAK; send_break()
916 uart->utx.w &= ~UTX_SEND_BREAK; send_break()
998 m68328_uart *uart = &uart_addr[info->line]; rs_close() local
1047 uart->ustcnt &= ~USTCNT_RXEN; rs_close()
1048 uart->ustcnt &= ~(USTCNT_RXEN | USTCNT_RX_INTR_MASK); rs_close()
H A Dtilegx.c46 struct uart_port uart; member in struct:tile_uart_port
87 struct tty_port *port = &tile_uart->uart.state->port; handle_receive()
106 spin_unlock(&tile_uart->uart.lock); handle_receive()
108 spin_lock(&tile_uart->uart.lock); handle_receive()
143 port = &tile_uart->uart; handle_transmit()
186 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_interrupt()
214 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_tx_empty()
264 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_start_tx()
306 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_stop_rx()
336 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_startup()
411 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_shutdown()
461 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_set_termios()
509 /* Set the uart paramters. */ tilegx_set_termios()
570 * Console polling routines for writing and reading from the uart while
580 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_poll_get_char()
593 tile_uart = container_of(port, struct tile_uart_port, uart); tilegx_poll_put_char()
631 port = &tile_uart_ports[i].uart; tilegx_init_ports()
671 struct uart_port *port = &tile_uart_ports[i].uart; tilegx_init()
685 port = &tile_uart_ports[i].uart; tilegx_exit()
H A Dsccnxp.c33 #define SCCNXP_NAME "uart-sccnxp"
112 struct uart_driver uart; member in struct:sccnxp_port
459 for (i = 0; i < s->uart.nr; i++) { sccnxp_handle_events()
921 s->uart.owner = THIS_MODULE; sccnxp_probe()
922 s->uart.dev_name = "ttySC"; sccnxp_probe()
923 s->uart.major = SCCNXP_MAJOR; sccnxp_probe()
924 s->uart.minor = SCCNXP_MINOR; sccnxp_probe()
925 s->uart.nr = s->chip->nr; sccnxp_probe()
927 s->uart.cons = &s->console; sccnxp_probe()
928 s->uart.cons->device = uart_console_device; sccnxp_probe()
929 s->uart.cons->write = sccnxp_console_write; sccnxp_probe()
930 s->uart.cons->setup = sccnxp_console_setup; sccnxp_probe()
931 s->uart.cons->flags = CON_PRINTBUFFER; sccnxp_probe()
932 s->uart.cons->index = -1; sccnxp_probe()
933 s->uart.cons->data = s; sccnxp_probe()
934 strcpy(s->uart.cons->name, "ttySC"); sccnxp_probe()
936 ret = uart_register_driver(&s->uart); sccnxp_probe()
942 for (i = 0; i < s->uart.nr; i++) { sccnxp_probe()
955 uart_add_one_port(&s->uart, &s->port[i]); sccnxp_probe()
983 uart_unregister_driver(&s->uart); sccnxp_probe()
1001 for (i = 0; i < s->uart.nr; i++) sccnxp_remove()
1002 uart_remove_one_port(&s->uart, &s->port[i]); sccnxp_remove()
1004 uart_unregister_driver(&s->uart); sccnxp_remove()
H A Dserial_txx9.c487 * Console polling routines for writing and reading from the uart while
943 * Check whether an invalid uart number has been specified, and serial_txx9_console_setup()
1023 struct uart_txx9_port *uart; serial_txx9_register_port() local
1028 uart = &serial_txx9_ports[i]; serial_txx9_register_port()
1029 if (uart_match_port(&uart->port, port)) { serial_txx9_register_port()
1030 uart_remove_one_port(&serial_txx9_reg, &uart->port); serial_txx9_register_port()
1037 uart = &serial_txx9_ports[i]; serial_txx9_register_port()
1038 if (!(uart->port.iobase || uart->port.mapbase)) serial_txx9_register_port()
1043 uart->port.iobase = port->iobase; serial_txx9_register_port()
1044 uart->port.membase = port->membase; serial_txx9_register_port()
1045 uart->port.irq = port->irq; serial_txx9_register_port()
1046 uart->port.uartclk = port->uartclk; serial_txx9_register_port()
1047 uart->port.iotype = port->iotype; serial_txx9_register_port()
1048 uart->port.flags = port->flags serial_txx9_register_port()
1050 uart->port.mapbase = port->mapbase; serial_txx9_register_port()
1052 uart->port.dev = port->dev; serial_txx9_register_port()
1053 ret = uart_add_one_port(&serial_txx9_reg, &uart->port); serial_txx9_register_port()
1055 ret = uart->port.line; serial_txx9_register_port()
1070 struct uart_txx9_port *uart = &serial_txx9_ports[line]; serial_txx9_unregister_port() local
1073 uart_remove_one_port(&serial_txx9_reg, &uart->port); serial_txx9_unregister_port()
1074 uart->port.flags = 0; serial_txx9_unregister_port()
1075 uart->port.type = PORT_UNKNOWN; serial_txx9_unregister_port()
1076 uart->port.iobase = 0; serial_txx9_unregister_port()
1077 uart->port.mapbase = 0; serial_txx9_unregister_port()
1078 uart->port.membase = NULL; serial_txx9_unregister_port()
1079 uart->port.dev = NULL; serial_txx9_unregister_port()
H A Dbcm63xx_uart.c78 * handy uart register accessor
93 * serial core request to check if uart tx fifo is empty
365 * process uart interrupt
399 * enable rx & tx operation on uart
411 * disable rx & tx operation on uart
441 * serial core request to initialize uart and start rx operation
486 * serial core request to flush & disable uart
502 * serial core request to change current uart setting
513 /* disable uart while changing speed */ bcm_uart_set_termios()
587 * serial core request to claim uart iomem
596 * serial core request to release uart iomem
729 * console core request to setup given console, find matching uart
789 OF_EARLYCON_DECLARE(bcm63xx_uart, "brcm,bcm6345-uart", bcm_early_console_setup);
817 pdev->id = of_alias_get_id(pdev->dev.of_node, "uart"); bcm_uart_probe()
876 { .compatible = "brcm,bcm6345-uart" },
918 MODULE_DESCRIPTION("Broadcom 63xx integrated uart driver");
H A Dm32r_sio.h34 unsigned int uart; member in struct:old_serial_port
H A Dsamsung.h32 /* uart port features */
36 /* uart controls */
H A Dof_serial.c332 { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
333 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
334 { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
341 { .compatible = "mrvl,mmp-uart",
343 { .compatible = "mrvl,pxa-uart",
H A Dsirfsoc_uart.h17 /* hardware uart specific */
20 /* uart - usp common */
185 .port_name = "sirfsoc-uart",
262 /* uart io ctrl */
366 #define SIRFUART_PORT_NAME "sirfsoc-uart"
H A Datmel_serial.c140 struct uart_port uart; /* uart */ member in struct:atmel_uart_port
141 struct clk *clk; /* uart clock */
175 bool is_usart; /* usart or uart */
176 struct timer_list uart_timer; /* uart timer */
209 to_atmel_uart_port(struct uart_port *uart) to_atmel_uart_port() argument
211 return container_of(uart, struct atmel_uart_port, uart); to_atmel_uart_port()
723 struct uart_port *port = &atmel_port->uart; atmel_complete_tx_dma()
1664 * Get ip name usart or uart
1671 int usart, uart; atmel_get_ip_name() local
1672 /* usart and uart ascii */ atmel_get_ip_name()
1674 uart = 0x44424755; atmel_get_ip_name()
1681 } else if (name == uart) { atmel_get_ip_name()
1682 dev_dbg(port->dev, "This is uart\n"); atmel_get_ip_name()
1695 dev_dbg(port->dev, "This version is uart\n"); atmel_get_ip_name()
1699 dev_err(port->dev, "Not supported ip name nor version, set to uart\n"); atmel_get_ip_name()
2258 struct uart_port *port = &atmel_port->uart; atmel_init_port()
2336 struct uart_port *port = &atmel_ports[co->index].uart; atmel_console_write()
2410 struct uart_port *port = &atmel_ports[co->index].uart; atmel_console_setup()
2464 port->uart.line = id; atmel_console_init()
2636 port->uart.line = ret; atmel_serial_probe()
2650 if (!atmel_use_pdc_rx(&port->uart)) { atmel_serial_probe()
2659 rs485_enabled = port->uart.rs485.flags & SER_RS485_ENABLED; atmel_serial_probe()
2661 ret = uart_add_one_port(&atmel_uart, &port->uart); atmel_serial_probe()
2666 if (atmel_is_console_port(&port->uart) atmel_serial_probe()
2686 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL); atmel_serial_probe()
2687 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN); atmel_serial_probe()
2691 * Get port name of usart or uart atmel_serial_probe()
2693 atmel_get_ip_name(&port->uart); atmel_serial_probe()
2707 if (!atmel_is_console_port(&port->uart)) { atmel_serial_probe()
2712 clear_bit(port->uart.line, atmel_ports_in_use); atmel_serial_probe()
H A Dmax310x.c268 struct uart_driver uart; member in struct:max310x_port
718 if (s->uart.nr > 1) { max310x_ist()
724 val = ((1 << s->uart.nr) - 1) & ~val; max310x_ist()
1012 for (i = 0; i < s->uart.nr; i++) { max310x_suspend()
1013 uart_suspend_port(&s->uart, &s->p[i].port); max310x_suspend()
1025 for (i = 0; i < s->uart.nr; i++) { max310x_resume()
1027 uart_resume_port(&s->uart, &s->p[i].port); max310x_resume()
1163 s->uart.owner = THIS_MODULE; max310x_probe()
1164 s->uart.dev_name = "ttyMAX"; max310x_probe()
1165 s->uart.major = MAX310X_MAJOR; max310x_probe()
1166 s->uart.minor = MAX310X_MINOR; max310x_probe()
1167 s->uart.nr = devtype->nr; max310x_probe()
1168 ret = uart_register_driver(&s->uart); max310x_probe()
1220 uart_add_one_port(&s->uart, &s->p[i].port); max310x_probe()
1240 uart_unregister_driver(&s->uart); max310x_probe()
1257 for (i = 0; i < s->uart.nr; i++) { max310x_remove()
1260 uart_remove_one_port(&s->uart, &s->p[i].port); max310x_remove()
1265 uart_unregister_driver(&s->uart); max310x_remove()
H A Dsamsung.c755 /* if there isn't anything more to transmit, or the uart is now s3c24xx_serial_tx_chars()
756 * stopped, disable the uart and exit s3c24xx_serial_tx_chars()
1372 dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", s3c24xx_serial_set_termios()
1724 dev_err(port->dev, "failed to find memory resource for uart\n"); s3c24xx_serial_init_port()
1762 ourport->clk = clk_get(&platdev->dev, "uart"); s3c24xx_serial_init_port()
1771 pr_err("uart: clock failed to prepare+enable: %d\n", ret); s3c24xx_serial_init_port()
1787 /* reset the fifos (and setup the uart) */ s3c24xx_serial_init_port()
1842 "samsung,uart-fifosize", &ourport->port.fifosize); s3c24xx_serial_probe()
1997 * Console polling routines for writing and reading from the uart while
2150 * Check whether an invalid uart number has been specified, and s3c24xx_serial_console_setup()
2357 .name = "s3c2410-uart",
2360 .name = "s3c2412-uart",
2363 .name = "s3c2440-uart",
2366 .name = "s3c6400-uart",
2369 .name = "s5pv210-uart",
2372 .name = "exynos4210-uart",
2375 .name = "exynos5433-uart",
2384 { .compatible = "samsung,s3c2410-uart",
2386 { .compatible = "samsung,s3c2412-uart",
2388 { .compatible = "samsung,s3c2440-uart",
2390 { .compatible = "samsung,s3c6400-uart",
2392 { .compatible = "samsung,s5pv210-uart",
2394 { .compatible = "samsung,exynos4210-uart",
2396 { .compatible = "samsung,exynos5433-uart",
2408 .name = "samsung-uart",
2477 OF_EARLYCON_DECLARE(s3c2410, "samsung,s3c2410-uart",
2492 OF_EARLYCON_DECLARE(s3c2412, "samsung,s3c2412-uart",
2494 OF_EARLYCON_DECLARE(s3c2440, "samsung,s3c2440-uart",
2496 OF_EARLYCON_DECLARE(s3c6400, "samsung,s3c6400-uart",
2513 OF_EARLYCON_DECLARE(s5pv210, "samsung,s5pv210-uart",
2515 OF_EARLYCON_DECLARE(exynos4210, "samsung,exynos4210-uart",
2521 MODULE_ALIAS("platform:samsung-uart");
H A Dxilinx_uartps.c380 * @port: Handle to the uart port structure
509 * @port: Handle to the uart port structure
554 * @port: Handle to the uart port structure
568 * @port: Handle to the uart port structure
582 * @port: Handle to the uart port structure
598 * @port: Handle to the uart port structure
624 * @port: Handle to the uart port structure
750 * @port: Handle to the uart port structure
817 * @port: Handle to the uart port structure
835 * @port: Handle to the uart port structure
846 * @port: Handle to the uart port structure
871 * @port: Handle to the uart port structure
893 * @port: Handle to the uart port structure
907 * @port: Handle to the uart port structure
918 * @port: Handle to the uart port structure
1058 * @port: Handle to the uart port structure
1069 * @port: Handle to the uart port structure
1141 * cdns_uart_console_setup - Initialize the uart to default config
1143 * @options: Initial settings of uart
1469 { .compatible = "cdns,uart-r1p8", },
H A Dioc3_serial.c125 /* uart ports are allocated here */
314 struct ioc3_uartregs __iomem *uart; set_baud() local
339 uart = port->ip_uart_regs; set_baud()
340 lcr = readb(&uart->iu_lcr); set_baud()
342 writeb(lcr | UART_LCR_DLAB, &uart->iu_lcr); set_baud()
343 writeb((unsigned char)divisor, &uart->iu_dll); set_baud()
344 writeb((unsigned char)(divisor >> 8), &uart->iu_dlm); set_baud()
345 writeb((unsigned char)prediv, &uart->iu_scr); set_baud()
346 writeb((unsigned char)lcr, &uart->iu_lcr); set_baud()
352 * get_ioc3_port - given a uart port, return the control structure
353 * @the_port: uart port to find
384 struct ioc3_uartregs __iomem *uart; port_init() local
418 uart = port->ip_uart_regs; port_init()
419 writeb(0, &uart->iu_lcr); port_init()
420 writeb(0, &uart->iu_ier); port_init()
426 writeb(UART_LCR_WLEN8 | 0, &uart->iu_lcr); port_init()
430 writeb(UART_FCR_ENABLE_FIFO, &uart->iu_fcr); port_init()
433 &uart->iu_fcr); port_init()
436 writeb(0, &uart->iu_mcr); port_init()
463 /* uart experiences pauses at high baud rate reducing actual port_init()
516 /* Reset the input fifo. If the uart received chars while the port local_open()
517 * was closed and DMA is not enabled, the uart may have a bunch of local_open()
1875 /* Associate the uart functions above - given to serial core */
2176 "%s: Couldn't register IOC3 uart serial driver\n", ioc3uart_init()
H A Dsc16is7xx.c310 struct uart_driver uart; member in struct:sc16is7xx_port
636 for (i = 0; i < s->uart.nr; ++i) sc16is7xx_ist()
1078 s->uart.owner = THIS_MODULE; sc16is7xx_probe()
1079 s->uart.dev_name = "ttySC"; sc16is7xx_probe()
1080 s->uart.nr = devtype->nr_uart; sc16is7xx_probe()
1081 ret = uart_register_driver(&s->uart); sc16is7xx_probe()
1131 uart_add_one_port(&s->uart, &s->p[i].port); sc16is7xx_probe()
1142 for (i = 0; i < s->uart.nr; i++) sc16is7xx_probe()
1143 uart_remove_one_port(&s->uart, &s->p[i].port); sc16is7xx_probe()
1153 uart_unregister_driver(&s->uart); sc16is7xx_probe()
1172 for (i = 0; i < s->uart.nr; i++) { sc16is7xx_remove()
1175 uart_remove_one_port(&s->uart, &s->p[i].port); sc16is7xx_remove()
1180 uart_unregister_driver(&s->uart); sc16is7xx_remove()
H A Dbfin_sport_uart.c21 #define DRV_NAME "bfin-sport-uart"
124 /* Set TCR1 and TCR2, TFSR is not enabled for uart */ sport_uart_setup()
135 /* The actual uart baud rate of devices vary between +/-2%. The sport sport_uart_setup()
556 /* uart baud rate */ sport_set_termios()
625 /* Check whether an invalid uart number has been specified */ sport_uart_console_setup()
758 dev_err(&pdev->dev, "Wrong sport uart platform device id.\n"); sport_uart_probe()
910 pr_info("Blackfin uart over sport driver\n"); sport_uart_init()
921 pr_err("failed to register sport uart driver:%d\n", ret); sport_uart_init()
H A Dioc4_serial.c171 uart 0 mode select */
173 uart 1 mode select */
175 uart 2 mode select */
177 uart 3 mode select */
409 /* uart ports are allocated here - 1 for rs232, 1 for rs422 */
642 * @uart_port: uart port to test for
713 struct ioc4_uartregs __iomem *uart; set_baud() local
728 uart = port->ip_uart_regs; set_baud()
729 lcr = readb(&uart->i4u_lcr); set_baud()
730 writeb(lcr | UART_LCR_DLAB, &uart->i4u_lcr); set_baud()
731 writeb((unsigned char)divisor, &uart->i4u_dll); set_baud()
732 writeb((unsigned char)(divisor >> 8), &uart->i4u_dlm); set_baud()
733 writeb(lcr, &uart->i4u_lcr); set_baud()
739 * get_ioc4_port - given a uart port, return the control structure
740 * @port: uart port
831 struct ioc4_uartregs __iomem *uart; port_init() local
853 uart = port->ip_uart_regs; port_init()
854 writeb(0, &uart->i4u_lcr); port_init()
855 writeb(0, &uart->i4u_ier); port_init()
861 writeb(UART_LCR_WLEN8 | 0, &uart->i4u_lcr); port_init()
865 writeb(UART_FCR_ENABLE_FIFO, &uart->i4u_fcr); port_init()
868 &uart->i4u_fcr); port_init()
871 writeb(0, &uart->i4u_mcr); port_init()
874 readb(&uart->i4u_msr); port_init()
1115 /* Get direct hooks to the serial regs and uart regs ioc4_attach_local()
1238 /* Reset the input fifo. If the uart received chars while the port local_open()
1239 * was closed and DMA is not enabled, the uart may have a bunch of local_open()
2591 /* Associate the uart functions above - given to serial core */
2795 "uart space\n", (void *)idd->idd_pdev); ioc4_serial_attach_one()
H A Dmpc52xx_uart.c1641 pr_debug("Could not find uart clock frequency!\n"); mpc52xx_console_setup()
1657 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n", mpc52xx_console_setup()
1722 { .compatible = "fsl,mpc5200b-psc-uart", .data = &mpc5200b_psc_ops, },
1723 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1725 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1730 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
1731 { .compatible = "fsl,mpc5125-psc-uart", .data = &mpc5125_psc_ops, },
1753 /* set the uart clock to the input clock of the psc, the different mpc52xx_uart_of_probe()
1758 dev_dbg(&op->dev, "Could not find uart clock frequency!\n"); mpc52xx_uart_of_probe()
1792 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n", mpc52xx_uart_of_probe()
1795 /* Add the port to the uart sub-system */ mpc52xx_uart_of_probe()
1891 .name = "mpc52xx-psc-uart",
H A Dsirfsoc_uart.c1273 { .compatible = "sirf,prima2-uart", .data = &sirfsoc_uart,},
1274 { .compatible = "sirf,atlas7-uart", .data = &sirfsoc_uart},
1275 { .compatible = "sirf,prima2-usp-uart", .data = &sirfsoc_usp},
1298 "Unable to find cell-index in uart node.\n"); sirfsoc_uart_probe()
1302 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) sirfsoc_uart_probe()
1312 "sirf,uart-has-rtscts"); sirfsoc_uart_probe()
1313 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart")) sirfsoc_uart_probe()
1315 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) { sirfsoc_uart_probe()
1353 if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-uart")) sirfsoc_uart_probe()
1360 "Unable to find fifosize in uart node.\n"); sirfsoc_uart_probe()
1396 if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-bt-uart")) { sirfsoc_uart_probe()
H A Dsn_console.c232 /* uart interface structs
381 /* Associate the uart functions above - given to serial core */
402 /* End of uart struct functions and defines */
602 * @dev_id: our pointer to our port (sn_cons_port which contains the uart port)
627 * @data: A pointer to our sn_cons_port (which contains the uart port)
659 * @port: Our sn_cons_port (which contains the uart port)
710 * @port: Our sn_cons_port (which contains the uart port)
810 * or async above so the proper uart structures are populated */ sn_sal_module_init()
H A Defm32-uart.c18 #include <linux/platform_data/efm32-uart.h>
20 #define DRIVER_NAME "efm32-uart"
429 return port->type == PORT_EFMUART ? "efm32-uart" : NULL; efm32_uart_type()
801 .compatible = "energymicro,efm32-uart",
804 .compatible = "efm32,uart",
H A Dpnx8xxx_uart.c381 "pnx8xxx-uart", sport); pnx8xxx_startup()
589 "pnx8xxx-uart") != NULL ? 0 : -EBUSY; pnx8xxx_request_port()
734 * Check whether an invalid uart number has been specified, and pnx8xxx_console_setup()
831 .name = "pnx8xxx-uart",
869 MODULE_ALIAS("platform:pnx8xxx-uart");
H A Dpxa.c686 * Console polling routines for writing and reading from the uart while
828 { .compatible = "mrvl,pxa-uart", },
829 { .compatible = "mrvl,mmp-uart", },
935 .name = "pxa2xx-uart",
968 MODULE_ALIAS("platform:pxa2xx-uart");
H A Dsa1100.c375 "sa11x0-uart", sport); sa1100_startup()
550 "sa11x0-uart") != NULL ? 0 : -EBUSY; sa1100_request_port()
790 * Check whether an invalid uart number has been specified, and sa1100_console_setup()
900 .name = "sa11x0-uart",
934 MODULE_ALIAS("platform:sa11x0-uart");
H A Domap-serial.c262 * @port: uart port info
282 * @port: uart port info
580 * @irq: uart port irq number
581 * @dev_id: uart port info
1678 dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line, serial_omap_probe()
1686 dev_info(up->port.dev, "no wakeirq for uart%d\n", serial_omap_probe()
1764 * The access to uart register after MDR1 Access
1886 { .compatible = "ti,omap2-uart" },
1887 { .compatible = "ti,omap3-uart" },
1888 { .compatible = "ti,omap4-uart" },
H A Dimx.c178 #define DRIVER_NAME "IMX-uart"
182 /* i.MX21 type uart runs on all i.mx except i.MX1 and i.MX6q */
244 .name = "imx1-uart",
247 .name = "imx21-uart",
250 .name = "imx6q-uart",
259 { .compatible = "fsl,imx6q-uart", .data = &imx_uart_devdata[IMX6Q_UART], },
260 { .compatible = "fsl,imx1-uart", .data = &imx_uart_devdata[IMX1_UART], },
261 { .compatible = "fsl,imx21-uart", .data = &imx_uart_devdata[IMX21_UART], },
795 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
1751 * Check whether an invalid uart number has been specified, and imx_console_setup()
1869 if (of_get_property(np, "fsl,uart-has-rtscts", NULL)) serial_imx_probe_dt()
2004 .name = "imx-uart",
2035 MODULE_ALIAS("platform:imx-uart");
H A Dmsm_serial.c50 struct uart_port uart; member in struct:msm_port
812 .uart = {
821 .uart = {
830 .uart = {
844 return &msm_uart_ports[line].uart; get_port_from_line()
964 OF_EARLYCON_DECLARE(msm_serial, "qcom,msm-uart",
1096 { .compatible = "qcom,msm-uart" },
H A Daltera_uart.c79 * Local per-uart structure.
615 { .compatible = "ALTR,uart-1.0", },
616 { .compatible = "altr,uart-1.0", },
H A Dar933x_uart.c35 #define DRIVER_NAME "ar933x-uart"
666 up->clk = devm_clk_get(&pdev->dev, "uart"); ar933x_uart_probe()
736 { .compatible = "qca,ar9330-uart" },
H A Damba-pl010.c344 retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap); pl010_startup()
527 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010") pl010_request_port()
660 * Check whether an invalid uart number has been specified, and pl010_console_setup()
809 .name = "uart-pl010",
/linux-4.1.27/sound/drivers/
H A Dserial-u16550.c172 static inline void snd_uart16550_add_timer(struct snd_uart16550 *uart) snd_uart16550_add_timer() argument
174 if (!uart->timer_running) { snd_uart16550_add_timer()
176 mod_timer(&uart->buffer_timer, jiffies + (HZ + 255) / 256); snd_uart16550_add_timer()
177 uart->timer_running = 1; snd_uart16550_add_timer()
181 static inline void snd_uart16550_del_timer(struct snd_uart16550 *uart) snd_uart16550_del_timer() argument
183 if (uart->timer_running) { snd_uart16550_del_timer()
184 del_timer(&uart->buffer_timer); snd_uart16550_del_timer()
185 uart->timer_running = 0; snd_uart16550_del_timer()
190 static inline void snd_uart16550_buffer_output(struct snd_uart16550 *uart) snd_uart16550_buffer_output() argument
192 unsigned short buff_out = uart->buff_out; snd_uart16550_buffer_output()
193 if (uart->buff_in_count > 0) { snd_uart16550_buffer_output()
194 outb(uart->tx_buff[buff_out], uart->base + UART_TX); snd_uart16550_buffer_output()
195 uart->fifo_count++; snd_uart16550_buffer_output()
198 uart->buff_out = buff_out; snd_uart16550_buffer_output()
199 uart->buff_in_count--; snd_uart16550_buffer_output()
207 static void snd_uart16550_io_loop(struct snd_uart16550 * uart) snd_uart16550_io_loop() argument
213 substream = uart->prev_in; snd_uart16550_io_loop()
216 while ((status = inb(uart->base + UART_LSR)) & UART_LSR_DR) { snd_uart16550_io_loop()
218 c = inb(uart->base + UART_RX); snd_uart16550_io_loop()
222 uart->rstatus = c; snd_uart16550_io_loop()
225 if (uart->adaptor == SNDRV_SERIAL_GENERIC) { snd_uart16550_io_loop()
226 if (uart->rstatus == 0xf5) { snd_uart16550_io_loop()
232 uart->rstatus = 0; snd_uart16550_io_loop()
233 } else if ((uart->filemode & SERIAL_MODE_INPUT_OPEN) snd_uart16550_io_loop()
234 && uart->midi_input[substream]) snd_uart16550_io_loop()
235 snd_rawmidi_receive(uart->midi_input[substream], snd_uart16550_io_loop()
237 } else if ((uart->filemode & SERIAL_MODE_INPUT_OPEN) && snd_uart16550_io_loop()
238 uart->midi_input[substream]) snd_uart16550_io_loop()
239 snd_rawmidi_receive(uart->midi_input[substream], &c, 1); snd_uart16550_io_loop()
244 uart->rmidi->name, uart->base); snd_uart16550_io_loop()
248 uart->prev_in = substream; snd_uart16550_io_loop()
254 uart->fifo_count = 0; snd_uart16550_io_loop()
255 if (uart->adaptor == SNDRV_SERIAL_MS124W_SA snd_uart16550_io_loop()
256 || uart->adaptor == SNDRV_SERIAL_GENERIC) { snd_uart16550_io_loop()
258 status = inb(uart->base + UART_MSR); snd_uart16550_io_loop()
259 while (uart->fifo_count == 0 && (status & UART_MSR_CTS) && snd_uart16550_io_loop()
260 uart->buff_in_count > 0) { snd_uart16550_io_loop()
261 snd_uart16550_buffer_output(uart); snd_uart16550_io_loop()
262 status = inb(uart->base + UART_MSR); snd_uart16550_io_loop()
266 while (uart->fifo_count < uart->fifo_limit /* Can we write ? */ snd_uart16550_io_loop()
267 && uart->buff_in_count > 0) /* Do we want to? */ snd_uart16550_io_loop()
268 snd_uart16550_buffer_output(uart); snd_uart16550_io_loop()
270 if (uart->irq < 0 && uart->buff_in_count > 0) snd_uart16550_io_loop()
271 snd_uart16550_add_timer(uart); snd_uart16550_io_loop()
296 struct snd_uart16550 *uart; snd_uart16550_interrupt() local
298 uart = dev_id; snd_uart16550_interrupt()
299 spin_lock(&uart->open_lock); snd_uart16550_interrupt()
300 if (uart->filemode == SERIAL_MODE_NOT_OPENED) { snd_uart16550_interrupt()
301 spin_unlock(&uart->open_lock); snd_uart16550_interrupt()
305 inb(uart->base + UART_IIR); snd_uart16550_interrupt()
306 snd_uart16550_io_loop(uart); snd_uart16550_interrupt()
307 spin_unlock(&uart->open_lock); snd_uart16550_interrupt()
315 struct snd_uart16550 *uart; snd_uart16550_buffer_timer() local
317 uart = (struct snd_uart16550 *)data; snd_uart16550_buffer_timer()
318 spin_lock_irqsave(&uart->open_lock, flags); snd_uart16550_buffer_timer()
319 snd_uart16550_del_timer(uart); snd_uart16550_buffer_timer()
320 snd_uart16550_io_loop(uart); snd_uart16550_buffer_timer()
321 spin_unlock_irqrestore(&uart->open_lock, flags); snd_uart16550_buffer_timer()
325 * this method probes, if an uart sits on given port
329 static int snd_uart16550_detect(struct snd_uart16550 *uart) snd_uart16550_detect() argument
331 unsigned long io_base = uart->base; snd_uart16550_detect()
335 /* Do some vague tests for the presence of the uart */ snd_uart16550_detect()
340 uart->res_base = request_region(io_base, 8, "Serial MIDI"); snd_uart16550_detect()
341 if (uart->res_base == NULL) { snd_uart16550_detect()
346 /* uart detected unless one of the following tests should fail */ snd_uart16550_detect()
372 static void snd_uart16550_do_open(struct snd_uart16550 * uart) snd_uart16550_do_open() argument
377 uart->buff_in_count = 0; snd_uart16550_do_open()
378 uart->buff_in = 0; snd_uart16550_do_open()
379 uart->buff_out = 0; snd_uart16550_do_open()
380 uart->fifo_limit = 1; snd_uart16550_do_open()
381 uart->fifo_count = 0; snd_uart16550_do_open()
382 uart->timer_running = 0; snd_uart16550_do_open()
391 ,uart->base + UART_FCR); /* FIFO Control Register */ snd_uart16550_do_open()
393 if ((inb(uart->base + UART_IIR) & 0xf0) == 0xc0) snd_uart16550_do_open()
394 uart->fifo_limit = 16; snd_uart16550_do_open()
395 if (uart->divisor != 0) { snd_uart16550_do_open()
396 uart->old_line_ctrl_reg = inb(uart->base + UART_LCR); snd_uart16550_do_open()
398 ,uart->base + UART_LCR); /* Line Control Register */ snd_uart16550_do_open()
399 uart->old_divisor_lsb = inb(uart->base + UART_DLL); snd_uart16550_do_open()
400 uart->old_divisor_msb = inb(uart->base + UART_DLM); snd_uart16550_do_open()
402 outb(uart->divisor snd_uart16550_do_open()
403 ,uart->base + UART_DLL); /* Divisor Latch Low */ snd_uart16550_do_open()
405 ,uart->base + UART_DLM); /* Divisor Latch High */ snd_uart16550_do_open()
413 ,uart->base + UART_LCR); /* Line Control Register */ snd_uart16550_do_open()
415 switch (uart->adaptor) { snd_uart16550_do_open()
422 ,uart->base + UART_MCR); /* Modem Control Register */ snd_uart16550_do_open()
429 uart->base + UART_MCR); snd_uart16550_do_open()
435 uart->base + UART_MCR); snd_uart16550_do_open()
439 if (uart->irq < 0) { snd_uart16550_do_open()
443 } else if (uart->adaptor == SNDRV_SERIAL_MS124W_SA) { snd_uart16550_do_open()
447 } else if (uart->adaptor == SNDRV_SERIAL_GENERIC) { snd_uart16550_do_open()
457 outb(byte, uart->base + UART_IER); /* Interrupt enable Register */ snd_uart16550_do_open()
459 inb(uart->base + UART_LSR); /* Clear any pre-existing overrun indication */ snd_uart16550_do_open()
460 inb(uart->base + UART_IIR); /* Clear any pre-existing transmit interrupt */ snd_uart16550_do_open()
461 inb(uart->base + UART_RX); /* Clear any pre-existing receive interrupt */ snd_uart16550_do_open()
464 static void snd_uart16550_do_close(struct snd_uart16550 * uart) snd_uart16550_do_close() argument
466 if (uart->irq < 0) snd_uart16550_do_close()
467 snd_uart16550_del_timer(uart); snd_uart16550_do_close()
475 ,uart->base + UART_IER); /* Interrupt enable Register */ snd_uart16550_do_close()
477 switch (uart->adaptor) { snd_uart16550_do_close()
482 ,uart->base + UART_MCR); /* Modem Control Register */ snd_uart16550_do_close()
489 uart->base + UART_MCR); snd_uart16550_do_close()
495 uart->base + UART_MCR); snd_uart16550_do_close()
499 inb(uart->base + UART_IIR); /* Clear any outstanding interrupts */ snd_uart16550_do_close()
502 if (uart->divisor != 0) { snd_uart16550_do_close()
504 ,uart->base + UART_LCR); /* Line Control Register */ snd_uart16550_do_close()
505 outb(uart->old_divisor_lsb snd_uart16550_do_close()
506 ,uart->base + UART_DLL); /* Divisor Latch Low */ snd_uart16550_do_close()
507 outb(uart->old_divisor_msb snd_uart16550_do_close()
508 ,uart->base + UART_DLM); /* Divisor Latch High */ snd_uart16550_do_close()
510 outb(uart->old_line_ctrl_reg snd_uart16550_do_close()
511 ,uart->base + UART_LCR); /* Line Control Register */ snd_uart16550_do_close()
518 struct snd_uart16550 *uart = substream->rmidi->private_data; snd_uart16550_input_open() local
520 spin_lock_irqsave(&uart->open_lock, flags); snd_uart16550_input_open()
521 if (uart->filemode == SERIAL_MODE_NOT_OPENED) snd_uart16550_input_open()
522 snd_uart16550_do_open(uart); snd_uart16550_input_open()
523 uart->filemode |= SERIAL_MODE_INPUT_OPEN; snd_uart16550_input_open()
524 uart->midi_input[substream->number] = substream; snd_uart16550_input_open()
525 spin_unlock_irqrestore(&uart->open_lock, flags); snd_uart16550_input_open()
532 struct snd_uart16550 *uart = substream->rmidi->private_data; snd_uart16550_input_close() local
534 spin_lock_irqsave(&uart->open_lock, flags); snd_uart16550_input_close()
535 uart->filemode &= ~SERIAL_MODE_INPUT_OPEN; snd_uart16550_input_close()
536 uart->midi_input[substream->number] = NULL; snd_uart16550_input_close()
537 if (uart->filemode == SERIAL_MODE_NOT_OPENED) snd_uart16550_input_close()
538 snd_uart16550_do_close(uart); snd_uart16550_input_close()
539 spin_unlock_irqrestore(&uart->open_lock, flags); snd_uart16550_input_close()
547 struct snd_uart16550 *uart = substream->rmidi->private_data; snd_uart16550_input_trigger() local
549 spin_lock_irqsave(&uart->open_lock, flags); snd_uart16550_input_trigger()
551 uart->filemode |= SERIAL_MODE_INPUT_TRIGGERED; snd_uart16550_input_trigger()
553 uart->filemode &= ~SERIAL_MODE_INPUT_TRIGGERED; snd_uart16550_input_trigger()
554 spin_unlock_irqrestore(&uart->open_lock, flags); snd_uart16550_input_trigger()
560 struct snd_uart16550 *uart = substream->rmidi->private_data; snd_uart16550_output_open() local
562 spin_lock_irqsave(&uart->open_lock, flags); snd_uart16550_output_open()
563 if (uart->filemode == SERIAL_MODE_NOT_OPENED) snd_uart16550_output_open()
564 snd_uart16550_do_open(uart); snd_uart16550_output_open()
565 uart->filemode |= SERIAL_MODE_OUTPUT_OPEN; snd_uart16550_output_open()
566 uart->midi_output[substream->number] = substream; snd_uart16550_output_open()
567 spin_unlock_irqrestore(&uart->open_lock, flags); snd_uart16550_output_open()
574 struct snd_uart16550 *uart = substream->rmidi->private_data; snd_uart16550_output_close() local
576 spin_lock_irqsave(&uart->open_lock, flags); snd_uart16550_output_close()
577 uart->filemode &= ~SERIAL_MODE_OUTPUT_OPEN; snd_uart16550_output_close()
578 uart->midi_output[substream->number] = NULL; snd_uart16550_output_close()
579 if (uart->filemode == SERIAL_MODE_NOT_OPENED) snd_uart16550_output_close()
580 snd_uart16550_do_close(uart); snd_uart16550_output_close()
581 spin_unlock_irqrestore(&uart->open_lock, flags); snd_uart16550_output_close()
585 static inline int snd_uart16550_buffer_can_write(struct snd_uart16550 *uart, snd_uart16550_buffer_can_write() argument
588 if (uart->buff_in_count + Num < TX_BUFF_SIZE) snd_uart16550_buffer_can_write()
594 static inline int snd_uart16550_write_buffer(struct snd_uart16550 *uart, snd_uart16550_write_buffer() argument
597 unsigned short buff_in = uart->buff_in; snd_uart16550_write_buffer()
598 if (uart->buff_in_count < TX_BUFF_SIZE) { snd_uart16550_write_buffer()
599 uart->tx_buff[buff_in] = byte; snd_uart16550_write_buffer()
602 uart->buff_in = buff_in; snd_uart16550_write_buffer()
603 uart->buff_in_count++; snd_uart16550_write_buffer()
604 if (uart->irq < 0) /* polling mode */ snd_uart16550_write_buffer()
605 snd_uart16550_add_timer(uart); snd_uart16550_write_buffer()
611 static int snd_uart16550_output_byte(struct snd_uart16550 *uart, snd_uart16550_output_byte() argument
615 if (uart->buff_in_count == 0 /* Buffer empty? */ snd_uart16550_output_byte()
616 && ((uart->adaptor != SNDRV_SERIAL_MS124W_SA && snd_uart16550_output_byte()
617 uart->adaptor != SNDRV_SERIAL_GENERIC) || snd_uart16550_output_byte()
618 (uart->fifo_count == 0 /* FIFO empty? */ snd_uart16550_output_byte()
619 && (inb(uart->base + UART_MSR) & UART_MSR_CTS)))) { /* CTS? */ snd_uart16550_output_byte()
622 if ((inb(uart->base + UART_LSR) & UART_LSR_THRE) != 0) { snd_uart16550_output_byte()
624 uart->fifo_count = 1; snd_uart16550_output_byte()
625 outb(midi_byte, uart->base + UART_TX); snd_uart16550_output_byte()
627 if (uart->fifo_count < uart->fifo_limit) { snd_uart16550_output_byte()
628 uart->fifo_count++; snd_uart16550_output_byte()
629 outb(midi_byte, uart->base + UART_TX); snd_uart16550_output_byte()
633 snd_uart16550_write_buffer(uart, midi_byte); snd_uart16550_output_byte()
637 if (!snd_uart16550_write_buffer(uart, midi_byte)) { snd_uart16550_output_byte()
640 uart->rmidi->name, uart->base); snd_uart16550_output_byte()
652 struct snd_uart16550 *uart = substream->rmidi->private_data; snd_uart16550_output_write() local
661 spin_lock_irqsave(&uart->open_lock, flags); snd_uart16550_output_write()
663 if (uart->irq < 0) /* polling */ snd_uart16550_output_write()
664 snd_uart16550_io_loop(uart); snd_uart16550_output_write()
666 if (uart->adaptor == SNDRV_SERIAL_MS124W_MB) { snd_uart16550_output_write()
670 if (uart->buff_in_count > TX_BUFF_SIZE - 2) snd_uart16550_output_write()
684 snd_uart16550_output_byte(uart, substream, addr_byte); snd_uart16550_output_write()
686 snd_uart16550_output_byte(uart, substream, midi_byte); snd_uart16550_output_write()
694 (uart->adaptor == SNDRV_SERIAL_SOUNDCANVAS || snd_uart16550_output_write()
695 uart->adaptor == SNDRV_SERIAL_GENERIC) && snd_uart16550_output_write()
696 (uart->prev_out != substream->number || snd_uart16550_output_write()
699 if (snd_uart16550_buffer_can_write(uart, 3)) { snd_uart16550_output_write()
703 * in this uart, send the change part snd_uart16550_output_write()
706 uart->prev_out = substream->number; snd_uart16550_output_write()
708 snd_uart16550_output_byte(uart, substream, snd_uart16550_output_write()
711 snd_uart16550_output_byte(uart, substream, snd_uart16550_output_write()
712 uart->prev_out + 1); snd_uart16550_output_write()
716 uart->adaptor == SNDRV_SERIAL_SOUNDCANVAS) snd_uart16550_output_write()
717 snd_uart16550_output_byte(uart, substream, uart->prev_status[uart->prev_out]); snd_uart16550_output_write()
718 } else if (!uart->drop_on_full) snd_uart16550_output_write()
724 if (!snd_uart16550_output_byte(uart, substream, midi_byte) && snd_uart16550_output_write()
725 !uart->drop_on_full ) snd_uart16550_output_write()
729 uart->prev_status[uart->prev_out] = midi_byte; snd_uart16550_output_write()
736 spin_unlock_irqrestore(&uart->open_lock, flags); snd_uart16550_output_write()
743 struct snd_uart16550 *uart = substream->rmidi->private_data; snd_uart16550_output_trigger() local
745 spin_lock_irqsave(&uart->open_lock, flags); snd_uart16550_output_trigger()
747 uart->filemode |= SERIAL_MODE_OUTPUT_TRIGGERED; snd_uart16550_output_trigger()
749 uart->filemode &= ~SERIAL_MODE_OUTPUT_TRIGGERED; snd_uart16550_output_trigger()
750 spin_unlock_irqrestore(&uart->open_lock, flags); snd_uart16550_output_trigger()
769 static int snd_uart16550_free(struct snd_uart16550 *uart) snd_uart16550_free() argument
771 if (uart->irq >= 0) snd_uart16550_free()
772 free_irq(uart->irq, uart); snd_uart16550_free()
773 release_and_free_resource(uart->res_base); snd_uart16550_free()
774 kfree(uart); snd_uart16550_free()
780 struct snd_uart16550 *uart = device->device_data; snd_uart16550_dev_free() local
781 return snd_uart16550_free(uart); snd_uart16550_dev_free()
796 struct snd_uart16550 *uart; snd_uart16550_create() local
800 if ((uart = kzalloc(sizeof(*uart), GFP_KERNEL)) == NULL) snd_uart16550_create()
802 uart->adaptor = adaptor; snd_uart16550_create()
803 uart->card = card; snd_uart16550_create()
804 spin_lock_init(&uart->open_lock); snd_uart16550_create()
805 uart->irq = -1; snd_uart16550_create()
806 uart->base = iobase; snd_uart16550_create()
807 uart->drop_on_full = droponfull; snd_uart16550_create()
809 if ((err = snd_uart16550_detect(uart)) <= 0) { snd_uart16550_create()
811 snd_uart16550_free(uart); snd_uart16550_create()
817 0, "Serial MIDI", uart)) { snd_uart16550_create()
821 uart->irq = irq; snd_uart16550_create()
824 uart->divisor = base / speed; snd_uart16550_create()
825 uart->speed = base / (unsigned int)uart->divisor; snd_uart16550_create()
826 uart->speed_base = base; snd_uart16550_create()
827 uart->prev_out = -1; snd_uart16550_create()
828 uart->prev_in = 0; snd_uart16550_create()
829 uart->rstatus = 0; snd_uart16550_create()
830 memset(uart->prev_status, 0x80, sizeof(unsigned char) * SNDRV_SERIAL_MAX_OUTS); snd_uart16550_create()
831 setup_timer(&uart->buffer_timer, snd_uart16550_buffer_timer, snd_uart16550_create()
832 (unsigned long)uart); snd_uart16550_create()
833 uart->timer_running = 0; snd_uart16550_create()
836 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, uart, &ops)) < 0) { snd_uart16550_create()
837 snd_uart16550_free(uart); snd_uart16550_create()
841 switch (uart->adaptor) { snd_uart16550_create()
846 outb(UART_MCR_RTS | (0&UART_MCR_DTR), uart->base + UART_MCR); snd_uart16550_create()
851 outb(UART_MCR_RTS | UART_MCR_DTR, uart->base + UART_MCR); snd_uart16550_create()
858 *ruart = uart; snd_uart16550_create()
872 static int snd_uart16550_rmidi(struct snd_uart16550 *uart, int device, snd_uart16550_rmidi() argument
879 err = snd_rawmidi_new(uart->card, "UART Serial MIDI", device, snd_uart16550_rmidi()
893 rrawmidi->private_data = uart; snd_uart16550_rmidi()
902 struct snd_uart16550 *uart; snd_serial_probe() local
957 &uart)) < 0) snd_serial_probe()
960 err = snd_uart16550_rmidi(uart, 0, outs[dev], ins[dev], &uart->rmidi); snd_serial_probe()
966 adaptor_names[uart->adaptor], snd_serial_probe()
967 uart->base, snd_serial_probe()
968 uart->irq); snd_serial_probe()
/linux-4.1.27/drivers/misc/ibmasm/
H A DMakefile14 ibmasm-$(CONFIG_SERIAL_8250) += uart.o
H A Duart.c36 struct uart_8250_port uart; ibmasm_register_uart() local
41 /* read the uart scratch register to determine if the UART ibmasm_register_uart()
50 memset(&uart, 0, sizeof(uart)); ibmasm_register_uart()
51 uart.port.irq = sp->irq; ibmasm_register_uart()
52 uart.port.uartclk = 3686400; ibmasm_register_uart()
53 uart.port.flags = UPF_SHARE_IRQ; ibmasm_register_uart()
54 uart.port.iotype = UPIO_MEM; ibmasm_register_uart()
55 uart.port.membase = iomem_base; ibmasm_register_uart()
57 sp->serial_line = serial8250_register_8250_port(&uart); ibmasm_register_uart()
/linux-4.1.27/arch/arm/mach-iop33x/
H A DMakefile5 obj-y := irq.o uart.o
H A Duart.c2 * arch/arm/mach-iop33x/uart.c
/linux-4.1.27/sound/drivers/mpu401/
H A DMakefile7 snd-mpu401-uart-objs := mpu401_uart.o
9 obj-$(CONFIG_SND_MPU401_UART) += snd-mpu401-uart.o
/linux-4.1.27/arch/arm/mach-omap2/
H A Dserial.c48 * stay on until power/autosuspend_delay is set for the uart from sysfs.
110 struct omap_uart_state *uart) omap_serial_fill_uart_tx_rx_pads()
112 uart->default_omap_uart_pads[0].name = rx_pad_name; omap_serial_fill_uart_tx_rx_pads()
113 uart->default_omap_uart_pads[0].flags = OMAP_DEVICE_PAD_REMUX | omap_serial_fill_uart_tx_rx_pads()
115 uart->default_omap_uart_pads[0].enable = OMAP_PIN_INPUT | omap_serial_fill_uart_tx_rx_pads()
117 uart->default_omap_uart_pads[0].idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0; omap_serial_fill_uart_tx_rx_pads()
118 uart->default_omap_uart_pads[1].name = tx_pad_name; omap_serial_fill_uart_tx_rx_pads()
119 uart->default_omap_uart_pads[1].enable = OMAP_PIN_OUTPUT | omap_serial_fill_uart_tx_rx_pads()
121 bdata->pads = uart->default_omap_uart_pads; omap_serial_fill_uart_tx_rx_pads()
122 bdata->pads_cnt = ARRAY_SIZE(uart->default_omap_uart_pads); omap_serial_fill_uart_tx_rx_pads()
126 struct omap_uart_state *uart) omap_serial_check_wakeup()
134 rx_fmt = "uart%d_rx.uart%d_rx"; omap_serial_check_wakeup()
135 tx_fmt = "uart%d_tx.uart%d_tx"; omap_serial_check_wakeup()
137 rx_fmt = "uart%d_rx_irrx.uart%d_rx_irrx"; omap_serial_check_wakeup()
138 tx_fmt = "uart%d_tx_irtx.uart%d_tx_irtx"; omap_serial_check_wakeup()
155 * Check if uart is used in default tx/rx mode i.e. in mux mode0 omap_serial_check_wakeup()
159 omap_serial_fill_uart_tx_rx_pads(bdata, uart); omap_serial_check_wakeup()
164 struct omap_uart_state *uart) omap_serial_check_wakeup()
184 struct omap_uart_state *uart; omap_serial_early_init() local
188 "uart%d", num_uarts + 1); omap_serial_early_init()
193 uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL); omap_serial_early_init()
194 if (WARN_ON(!uart)) omap_serial_early_init()
197 uart->oh = oh; omap_serial_early_init()
198 uart->num = num_uarts++; omap_serial_early_init()
199 list_add_tail(&uart->node, &uart_list); omap_serial_early_init()
201 "%s%d", OMAP_SERIAL_NAME, uart->num); omap_serial_early_init()
204 console_uart_id = uart->num; omap_serial_early_init()
208 pr_info("%s used as console in debug mode: uart%d clocks will not be gated", omap_serial_early_init()
209 uart_name, uart->num); omap_serial_early_init()
233 struct omap_uart_state *uart; omap_serial_init_port() local
248 list_for_each_entry(uart, &uart_list, node) omap_serial_init_port()
249 if (bdata->id == uart->num) omap_serial_init_port()
254 oh = uart->oh; omap_serial_init_port()
273 pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size); omap_serial_init_port()
287 oh->dev_attr = uart; omap_serial_init_port()
304 struct omap_uart_state *uart; omap_serial_board_init() local
307 list_for_each_entry(uart, &uart_list, node) { omap_serial_board_init()
308 bdata.id = uart->num; omap_serial_board_init()
313 omap_serial_check_wakeup(&bdata, uart); omap_serial_board_init()
318 omap_serial_init_port(&bdata, &info[uart->num]); omap_serial_board_init()
109 omap_serial_fill_uart_tx_rx_pads(struct omap_board_data *bdata, struct omap_uart_state *uart) omap_serial_fill_uart_tx_rx_pads() argument
125 omap_serial_check_wakeup(struct omap_board_data *bdata, struct omap_uart_state *uart) omap_serial_check_wakeup() argument
163 omap_serial_check_wakeup(struct omap_board_data *bdata, struct omap_uart_state *uart) omap_serial_check_wakeup() argument
/linux-4.1.27/drivers/firmware/
H A Dpcdp.c23 setup_serial_console(struct pcdp_uart *uart) setup_serial_console() argument
30 mmio = (uart->addr.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY); setup_serial_console()
32 mmio ? "mmio" : "io", uart->addr.address); setup_serial_console()
33 if (uart->baud) { setup_serial_console()
34 p += sprintf(p, ",%llu", uart->baud); setup_serial_console()
35 if (uart->bits) { setup_serial_console()
36 switch (uart->parity) { setup_serial_console()
41 p += sprintf(p, "%c%d", parity, uart->bits); setup_serial_console()
45 add_preferred_console("uart", 8250, &options[9]); setup_serial_console()
90 struct pcdp_uart *uart; efi_setup_pcdp_console() local
112 for (i = 0, uart = pcdp->uart; i < pcdp->num_uarts; i++, uart++) { efi_setup_pcdp_console()
113 if (uart->flags & PCDP_UART_PRIMARY_CONSOLE || serial) { efi_setup_pcdp_console()
114 if (uart->type == PCDP_CONSOLE_UART) { efi_setup_pcdp_console()
115 rc = setup_serial_console(uart); efi_setup_pcdp_console()
122 for (dev = (struct pcdp_device *) (pcdp->uart + pcdp->num_uarts); efi_setup_pcdp_console()
H A Dpcdp.h109 struct pcdp_uart uart[0]; /* actual size is num_uarts */ member in struct:pcdp
/linux-4.1.27/arch/x86/include/asm/
H A Dserial.h24 { .uart = 0, BASE_BAUD, 0x3F8, 4, STD_COMX_FLAGS }, /* ttyS0 */ \
25 { .uart = 0, BASE_BAUD, 0x2F8, 3, STD_COMX_FLAGS }, /* ttyS1 */ \
26 { .uart = 0, BASE_BAUD, 0x3E8, 4, STD_COMX_FLAGS }, /* ttyS2 */ \
27 { .uart = 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
/linux-4.1.27/drivers/tty/serial/8250/
H A D8250_acorn.c46 struct uart_8250_port uart; serial_card_probe() local
65 memset(&uart, 0, sizeof(struct uart_8250_port)); serial_card_probe()
66 uart.port.irq = ec->irq; serial_card_probe()
67 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; serial_card_probe()
68 uart.port.uartclk = type->uartclk; serial_card_probe()
69 uart.port.iotype = UPIO_MEM; serial_card_probe()
70 uart.port.regshift = 2; serial_card_probe()
71 uart.port.dev = &ec->dev; serial_card_probe()
74 uart.port.membase = info->vaddr + type->offset[i]; serial_card_probe()
75 uart.port.mapbase = bus_addr + type->offset[i]; serial_card_probe()
77 info->ports[i] = serial8250_register_8250_port(&uart); serial_card_probe()
H A D8250_gsc.c29 struct uart_8250_port uart; serial_init_chip() local
56 memset(&uart, 0, sizeof(uart)); serial_init_chip()
57 uart.port.iotype = UPIO_MEM; serial_init_chip()
59 uart.port.uartclk = (dev->id.sversion != 0xad) ? serial_init_chip()
61 uart.port.mapbase = address; serial_init_chip()
62 uart.port.membase = ioremap_nocache(address, 16); serial_init_chip()
63 uart.port.irq = dev->irq; serial_init_chip()
64 uart.port.flags = UPF_BOOT_AUTOCONF; serial_init_chip()
65 uart.port.dev = &dev->dev; serial_init_chip()
67 err = serial8250_register_8250_port(&uart); serial_init_chip()
71 iounmap(uart.port.membase); serial_init_chip()
H A D8250_hp300.c160 struct uart_8250_port uart; hpdca_init_one() local
169 memset(&uart, 0, sizeof(uart)); hpdca_init_one()
172 uart.port.iotype = UPIO_MEM; hpdca_init_one()
173 uart.port.flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF; hpdca_init_one()
174 uart.port.irq = d->ipl; hpdca_init_one()
175 uart.port.uartclk = HPDCA_BAUD_BASE * 16; hpdca_init_one()
176 uart.port.mapbase = (d->resource.start + UART_OFFSET); hpdca_init_one()
177 uart.port.membase = (char *)(uart.port.mapbase + DIO_VIRADDRBASE); hpdca_init_one()
178 uart.port.regshift = 1; hpdca_init_one()
179 uart.port.dev = &d->dev; hpdca_init_one()
180 line = serial8250_register_8250_port(&uart); hpdca_init_one()
184 " irq %d failed\n", d->scode, uart.port.irq); hpdca_init_one()
208 struct uart_8250_port uart; hp300_8250_init() local
246 memset(&uart, 0, sizeof(uart)); hp300_8250_init()
251 uart.port.iotype = UPIO_MEM; hp300_8250_init()
252 uart.port.flags = UPF_SKIP_TEST | UPF_SHARE_IRQ \ hp300_8250_init()
255 uart.port.irq = 0; hp300_8250_init()
256 uart.port.uartclk = HPAPCI_BAUD_BASE * 16; hp300_8250_init()
257 uart.port.mapbase = base; hp300_8250_init()
258 uart.port.membase = (char *)(base + DIO_VIRADDRBASE); hp300_8250_init()
259 uart.port.regshift = 2; hp300_8250_init()
261 line = serial8250_register_8250_port(&uart); hp300_8250_init()
265 " %d irq %d failed\n", i, uart.port.irq); hp300_8250_init()
H A D8250_mtk.c155 struct uart_8250_port uart = {}; mtk8250_probe() local
166 uart.port.membase = devm_ioremap(&pdev->dev, regs->start, mtk8250_probe()
168 if (!uart.port.membase) mtk8250_probe()
176 err = mtk8250_probe_of(pdev, &uart.port, data); mtk8250_probe()
182 spin_lock_init(&uart.port.lock); mtk8250_probe()
183 uart.port.mapbase = regs->start; mtk8250_probe()
184 uart.port.irq = irq->start; mtk8250_probe()
185 uart.port.pm = mtk8250_do_pm; mtk8250_probe()
186 uart.port.type = PORT_16550; mtk8250_probe()
187 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; mtk8250_probe()
188 uart.port.dev = &pdev->dev; mtk8250_probe()
189 uart.port.iotype = UPIO_MEM32; mtk8250_probe()
190 uart.port.regshift = 2; mtk8250_probe()
191 uart.port.private_data = data; mtk8250_probe()
192 uart.port.set_termios = mtk8250_set_termios; mtk8250_probe()
195 writel(0x0, uart.port.membase + mtk8250_probe()
196 (MTK_UART_RATE_FIX << uart.port.regshift)); mtk8250_probe()
198 data->line = serial8250_register_8250_port(&uart); mtk8250_probe()
276 { .compatible = "mediatek,mt6577-uart" },
283 .name = "mt6577-uart",
H A D8250_fintek.c146 struct uart_8250_port uart; fintek_8250_probe() local
165 memset(&uart, 0, sizeof(uart)); fintek_8250_probe()
168 uart.port.irq = pnp_irq(dev, 0); fintek_8250_probe()
169 uart.port.iobase = pnp_port_start(dev, 0); fintek_8250_probe()
170 uart.port.iotype = UPIO_PORT; fintek_8250_probe()
171 uart.port.rs485_config = fintek_8250_rs485_config; fintek_8250_probe()
173 uart.port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF; fintek_8250_probe()
175 uart.port.flags |= UPF_SHARE_IRQ; fintek_8250_probe()
176 uart.port.uartclk = 1843200; fintek_8250_probe()
177 uart.port.dev = &dev->dev; fintek_8250_probe()
179 line = serial8250_register_8250_port(&uart); fintek_8250_probe()
H A D8250_dw.c14 * raised, the LCR needs to be rewritten and the uart status register read.
311 if (of_device_is_compatible(np, "cavium,octeon-3860-uart")) { dw8250_probe_of()
404 struct uart_8250_port uart = {}; dw8250_probe() local
421 spin_lock_init(&uart.port.lock); dw8250_probe()
422 uart.port.mapbase = regs->start; dw8250_probe()
423 uart.port.irq = irq; dw8250_probe()
424 uart.port.handle_irq = dw8250_handle_irq; dw8250_probe()
425 uart.port.pm = dw8250_do_pm; dw8250_probe()
426 uart.port.type = PORT_8250; dw8250_probe()
427 uart.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; dw8250_probe()
428 uart.port.dev = &pdev->dev; dw8250_probe()
430 uart.port.membase = devm_ioremap(&pdev->dev, regs->start, dw8250_probe()
432 if (!uart.port.membase) dw8250_probe()
443 &uart.port.uartclk); dw8250_probe()
457 uart.port.uartclk = clk_get_rate(data->clk); dw8250_probe()
461 if (!uart.port.uartclk) { dw8250_probe()
491 uart.port.iotype = UPIO_MEM; dw8250_probe()
492 uart.port.serial_in = dw8250_serial_in; dw8250_probe()
493 uart.port.serial_out = dw8250_serial_out; dw8250_probe()
494 uart.port.private_data = data; dw8250_probe()
497 err = dw8250_probe_of(&uart.port, data); dw8250_probe()
501 err = dw8250_probe_acpi(&uart, data); dw8250_probe()
509 data->line = serial8250_register_8250_port(&uart); dw8250_probe()
614 { .compatible = "snps,dw-apb-uart" },
615 { .compatible = "cavium,octeon-3860-uart" },
635 .name = "dw-apb-uart",
649 MODULE_ALIAS("platform:dw-apb-uart");
H A D8250_pnp.c440 struct uart_8250_port uart, *port; serial_pnp_probe() local
449 memset(&uart, 0, sizeof(uart)); serial_pnp_probe()
451 uart.port.irq = pnp_irq(dev, 0); serial_pnp_probe()
453 uart.port.iobase = pnp_port_start(dev, 2); serial_pnp_probe()
454 uart.port.iotype = UPIO_PORT; serial_pnp_probe()
456 uart.port.iobase = pnp_port_start(dev, 0); serial_pnp_probe()
457 uart.port.iotype = UPIO_PORT; serial_pnp_probe()
459 uart.port.mapbase = pnp_mem_start(dev, 0); serial_pnp_probe()
460 uart.port.iotype = UPIO_MEM; serial_pnp_probe()
461 uart.port.flags = UPF_IOREMAP; serial_pnp_probe()
468 uart.port.iobase, uart.port.mapbase, uart.port.irq, uart.port.iotype); serial_pnp_probe()
471 uart.port.flags |= UPF_FIXED_PORT | UPF_FIXED_TYPE; serial_pnp_probe()
472 uart.port.type = PORT_8250_CIR; serial_pnp_probe()
475 uart.port.flags |= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF; serial_pnp_probe()
477 uart.port.flags |= UPF_SHARE_IRQ; serial_pnp_probe()
478 uart.port.uartclk = 1843200; serial_pnp_probe()
479 uart.port.dev = &dev->dev; serial_pnp_probe()
481 line = serial8250_register_8250_port(&uart); serial_pnp_probe()
H A D8250_core.c685 * We set the port uart clock rate if we succeed.
1598 /* Caller holds uart port lock */ serial8250_modem_status()
2086 * Console polling routines for writing and reading from the uart while
3481 * Check whether an invalid uart number has been specified, and univ8250_console_setup()
3502 * console=uart[8250],io|mmio|mmio32,<addr>[,<options>]
3503 * console=uart[8250],0x<addr>[,<options>]
3515 char match[] = "uart"; /* 8250-specific earlycon name */ univ8250_console_match()
3676 struct uart_8250_port uart; serial8250_probe() local
3679 memset(&uart, 0, sizeof(uart)); serial8250_probe()
3685 uart.port.iobase = p->iobase; serial8250_probe()
3686 uart.port.membase = p->membase; serial8250_probe()
3687 uart.port.irq = p->irq; serial8250_probe()
3688 uart.port.irqflags = p->irqflags; serial8250_probe()
3689 uart.port.uartclk = p->uartclk; serial8250_probe()
3690 uart.port.regshift = p->regshift; serial8250_probe()
3691 uart.port.iotype = p->iotype; serial8250_probe()
3692 uart.port.flags = p->flags; serial8250_probe()
3693 uart.port.mapbase = p->mapbase; serial8250_probe()
3694 uart.port.hub6 = p->hub6; serial8250_probe()
3695 uart.port.private_data = p->private_data; serial8250_probe()
3696 uart.port.type = p->type; serial8250_probe()
3697 uart.port.serial_in = p->serial_in; serial8250_probe()
3698 uart.port.serial_out = p->serial_out; serial8250_probe()
3699 uart.port.handle_irq = p->handle_irq; serial8250_probe()
3700 uart.port.handle_break = p->handle_break; serial8250_probe()
3701 uart.port.set_termios = p->set_termios; serial8250_probe()
3702 uart.port.pm = p->pm; serial8250_probe()
3703 uart.port.dev = &dev->dev; serial8250_probe()
3704 uart.port.irqflags |= irqflag; serial8250_probe()
3705 ret = serial8250_register_8250_port(&uart); serial8250_probe()
3835 struct uart_8250_port *uart; serial8250_register_8250_port() local
3843 uart = serial8250_find_match_or_unused(&up->port); serial8250_register_8250_port()
3844 if (uart && uart->port.type != PORT_8250_CIR) { serial8250_register_8250_port()
3845 if (uart->port.dev) serial8250_register_8250_port()
3846 uart_remove_one_port(&serial8250_reg, &uart->port); serial8250_register_8250_port()
3848 uart->port.iobase = up->port.iobase; serial8250_register_8250_port()
3849 uart->port.membase = up->port.membase; serial8250_register_8250_port()
3850 uart->port.irq = up->port.irq; serial8250_register_8250_port()
3851 uart->port.irqflags = up->port.irqflags; serial8250_register_8250_port()
3852 uart->port.uartclk = up->port.uartclk; serial8250_register_8250_port()
3853 uart->port.fifosize = up->port.fifosize; serial8250_register_8250_port()
3854 uart->port.regshift = up->port.regshift; serial8250_register_8250_port()
3855 uart->port.iotype = up->port.iotype; serial8250_register_8250_port()
3856 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF; serial8250_register_8250_port()
3857 uart->bugs = up->bugs; serial8250_register_8250_port()
3858 uart->port.mapbase = up->port.mapbase; serial8250_register_8250_port()
3859 uart->port.mapsize = up->port.mapsize; serial8250_register_8250_port()
3860 uart->port.private_data = up->port.private_data; serial8250_register_8250_port()
3861 uart->port.fifosize = up->port.fifosize; serial8250_register_8250_port()
3862 uart->tx_loadsz = up->tx_loadsz; serial8250_register_8250_port()
3863 uart->capabilities = up->capabilities; serial8250_register_8250_port()
3864 uart->port.throttle = up->port.throttle; serial8250_register_8250_port()
3865 uart->port.unthrottle = up->port.unthrottle; serial8250_register_8250_port()
3866 uart->port.rs485_config = up->port.rs485_config; serial8250_register_8250_port()
3867 uart->port.rs485 = up->port.rs485; serial8250_register_8250_port()
3868 uart->dma = up->dma; serial8250_register_8250_port()
3871 if (uart->port.fifosize && !uart->tx_loadsz) serial8250_register_8250_port()
3872 uart->tx_loadsz = uart->port.fifosize; serial8250_register_8250_port()
3875 uart->port.dev = up->port.dev; serial8250_register_8250_port()
3878 uart->port.flags |= UPF_NO_TXEN_TEST; serial8250_register_8250_port()
3881 uart->port.type = up->port.type; serial8250_register_8250_port()
3883 serial8250_set_defaults(uart); serial8250_register_8250_port()
3887 uart->port.serial_in = up->port.serial_in; serial8250_register_8250_port()
3889 uart->port.serial_out = up->port.serial_out; serial8250_register_8250_port()
3891 uart->port.handle_irq = up->port.handle_irq; serial8250_register_8250_port()
3894 uart->port.set_termios = up->port.set_termios; serial8250_register_8250_port()
3896 uart->port.set_mctrl = up->port.set_mctrl; serial8250_register_8250_port()
3898 uart->port.startup = up->port.startup; serial8250_register_8250_port()
3900 uart->port.shutdown = up->port.shutdown; serial8250_register_8250_port()
3902 uart->port.pm = up->port.pm; serial8250_register_8250_port()
3904 uart->port.handle_break = up->port.handle_break; serial8250_register_8250_port()
3906 uart->dl_read = up->dl_read; serial8250_register_8250_port()
3908 uart->dl_write = up->dl_write; serial8250_register_8250_port()
3911 serial8250_isa_config(0, &uart->port, serial8250_register_8250_port()
3912 &uart->capabilities); serial8250_register_8250_port()
3914 ret = uart_add_one_port(&serial8250_reg, &uart->port); serial8250_register_8250_port()
3916 ret = uart->port.line; serial8250_register_8250_port()
3933 struct uart_8250_port *uart = &serial8250_ports[line]; serial8250_unregister_port() local
3936 uart_remove_one_port(&serial8250_reg, &uart->port); serial8250_unregister_port()
3938 uart->port.flags &= ~UPF_BOOT_AUTOCONF; serial8250_unregister_port()
3940 uart->port.flags |= UPF_NO_TXEN_TEST; serial8250_unregister_port()
3941 uart->port.type = PORT_UNKNOWN; serial8250_unregister_port()
3942 uart->port.dev = &serial8250_isa_devs->dev; serial8250_unregister_port()
3943 uart->capabilities = 0; serial8250_unregister_port()
3944 uart_add_one_port(&serial8250_reg, &uart->port); serial8250_unregister_port()
3946 uart->port.dev = NULL; serial8250_unregister_port()
H A Dserial_cs.c107 static void quirk_setup_brainboxes_0104(struct pcmcia_device *link, struct uart_8250_port *uart) quirk_setup_brainboxes_0104() argument
109 uart->port.uartclk = 14745600; quirk_setup_brainboxes_0104()
345 struct uart_8250_port uart; setup_serial() local
348 memset(&uart, 0, sizeof(uart)); setup_serial()
349 uart.port.iobase = iobase; setup_serial()
350 uart.port.irq = irq; setup_serial()
351 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ; setup_serial()
352 uart.port.uartclk = 1843200; setup_serial()
353 uart.port.dev = &handle->dev; setup_serial()
355 uart.port.flags |= UPF_BUGGY_UART; setup_serial()
358 info->quirk->setup(handle, &uart); setup_serial()
360 line = serial8250_register_8250_port(&uart); setup_serial()
H A D8250.h51 unsigned int uart; member in struct:old_serial_port
H A D8250_early.c154 EARLYCON_DECLARE(uart, early_serial8250_setup);
H A D8250_em.c152 { .compatible = "renesas,em-uart", },
/linux-4.1.27/arch/arm/mach-pxa/
H A Dpxa-dt.c23 OF_DEV_AUXDATA("mrvl,pxa-uart", 0x40100000, "pxa2xx-uart.0", NULL),
24 OF_DEV_AUXDATA("mrvl,pxa-uart", 0x40200000, "pxa2xx-uart.1", NULL),
25 OF_DEV_AUXDATA("mrvl,pxa-uart", 0x40700000, "pxa2xx-uart.2", NULL),
26 OF_DEV_AUXDATA("mrvl,pxa-uart", 0x41600000, "pxa2xx-uart.3", NULL),
H A Dpxa25x.c193 INIT_CLKREG(&clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),
194 INIT_CLKREG(&clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),
195 INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),
220 INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
H A Dpxa27x.c215 INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),
216 INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),
217 INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),
H A Dpxa3xx.c78 INIT_CLKREG(&clk_pxa3xx_ffuart, "pxa2xx-uart.0", NULL),
79 INIT_CLKREG(&clk_pxa3xx_btuart, "pxa2xx-uart.1", NULL),
80 INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-uart.2", NULL),
/linux-4.1.27/arch/arm/mach-davinci/include/mach/
H A Duncompress.h30 u32 *uart; variable
35 if (!uart) putc()
38 while (!(uart[UART_LSR] & UART_LSR_THRE)) putc()
40 uart[UART_TX] = c; putc()
45 if (!uart) flush()
48 while (!(uart[UART_LSR] & UART_LSR_THRE)) flush()
54 uart = (u32 *)phys; set_uart_info()
/linux-4.1.27/arch/mn10300/kernel/
H A Dmn10300-serial.c157 .uart.ops = &mn10300_serial_ops,
158 .uart.membase = (void __iomem *) &SC0CTR,
159 .uart.mapbase = (unsigned long) &SC0CTR,
160 .uart.iotype = UPIO_MEM,
161 .uart.irq = 0,
162 .uart.uartclk = 0, /* MN10300_IOCLK, */
163 .uart.fifosize = 1,
164 .uart.flags = UPF_BOOT_AUTOCONF,
165 .uart.line = 0,
166 .uart.type = PORT_MN10300,
167 .uart.lock =
168 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
219 .uart.ops = &mn10300_serial_ops,
220 .uart.membase = (void __iomem *) &SC1CTR,
221 .uart.mapbase = (unsigned long) &SC1CTR,
222 .uart.iotype = UPIO_MEM,
223 .uart.irq = 0,
224 .uart.uartclk = 0, /* MN10300_IOCLK, */
225 .uart.fifosize = 1,
226 .uart.flags = UPF_BOOT_AUTOCONF,
227 .uart.line = 1,
228 .uart.type = PORT_MN10300,
229 .uart.lock =
230 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
281 .uart.ops = &mn10300_serial_ops,
282 .uart.membase = (void __iomem *) &SC2CTR,
283 .uart.mapbase = (unsigned long) &SC2CTR,
284 .uart.iotype = UPIO_MEM,
285 .uart.irq = 0,
286 .uart.uartclk = 0, /* MN10300_IOCLK, */
287 .uart.fifosize = 1,
288 .uart.flags = UPF_BOOT_AUTOCONF,
289 .uart.line = 2,
291 .uart.type = PORT_MN10300_CTS,
293 .uart.type = PORT_MN10300,
295 .uart.lock =
296 __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
526 struct uart_icount *icount = &port->uart.icount; mn10300_serial_receive_interrupt()
527 struct tty_port *tport = &port->uart.state->port; mn10300_serial_receive_interrupt()
558 port->uart.icount.rx++; mn10300_serial_receive_interrupt()
587 if (uart_handle_break(&port->uart)) mn10300_serial_receive_interrupt()
639 if (uart_handle_sysrq_char(&port->uart, ch)) mn10300_serial_receive_interrupt()
655 status &= port->uart.read_status_mask; mn10300_serial_receive_interrupt()
657 if (!overrun && !(status & port->uart.ignore_status_mask)) { mn10300_serial_receive_interrupt()
703 if (!port->uart.state || !port->uart.state->port.tty) { mn10300_serial_transmit_interrupt()
708 if (uart_tx_stopped(&port->uart) || mn10300_serial_transmit_interrupt()
709 uart_circ_empty(&port->uart.state->xmit)) mn10300_serial_transmit_interrupt()
712 if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS) mn10300_serial_transmit_interrupt()
713 uart_write_wakeup(&port->uart); mn10300_serial_transmit_interrupt()
724 port->uart.icount.cts++; mn10300_serial_cts_changed()
732 uart_handle_cts_change(&port->uart, st & SC2STR_CTS); mn10300_serial_cts_changed()
733 wake_up_interruptible(&port->uart.state->port.delta_msr_wait); mn10300_serial_cts_changed()
745 spin_lock(&port->uart.lock); mn10300_serial_interrupt()
766 spin_unlock(&port->uart.lock); mn10300_serial_interrupt()
777 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_tx_empty()
792 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_set_mctrl()
803 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_get_mctrl()
819 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_stop_tx()
836 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_start_tx()
840 CIRC_CNT(&port->uart.state->xmit.head, mn10300_serial_start_tx()
841 &port->uart.state->xmit.tail, mn10300_serial_start_tx()
861 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_send_xchar()
869 spin_lock_irqsave(&port->uart.lock, flags); mn10300_serial_send_xchar()
871 spin_unlock_irqrestore(&port->uart.lock, flags); mn10300_serial_send_xchar()
883 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_stop_rx()
902 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_enable_ms()
932 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_break_ctl()
937 spin_lock_irqsave(&port->uart.lock, flags); mn10300_serial_break_ctl()
947 spin_unlock_irqrestore(&port->uart.lock, flags); mn10300_serial_break_ctl()
956 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_startup()
1023 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_shutdown()
1100 switch (port->uart.line) { mn10300_serial_change_speed()
1162 baud = uart_get_baud_rate(&port->uart, new, old, 0, mn10300_serial_change_speed()
1176 (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST mn10300_serial_change_speed()
1178 _debug("CUSTOM %u", port->uart.custom_divisor); mn10300_serial_change_speed()
1181 if (port->uart.custom_divisor <= 65535) { mn10300_serial_change_speed()
1183 tmxbr = port->uart.custom_divisor; mn10300_serial_change_speed()
1184 port->uart.uartclk = ioclk; mn10300_serial_change_speed()
1187 if (port->uart.custom_divisor / 8 <= 65535) { mn10300_serial_change_speed()
1189 tmxbr = port->uart.custom_divisor / 8; mn10300_serial_change_speed()
1190 port->uart.custom_divisor = tmxbr * 8; mn10300_serial_change_speed()
1191 port->uart.uartclk = ioclk / 8; mn10300_serial_change_speed()
1194 if (port->uart.custom_divisor / 32 <= 65535) { mn10300_serial_change_speed()
1196 tmxbr = port->uart.custom_divisor / 32; mn10300_serial_change_speed()
1197 port->uart.custom_divisor = tmxbr * 32; mn10300_serial_change_speed()
1198 port->uart.uartclk = ioclk / 32; mn10300_serial_change_speed()
1203 if (port->uart.custom_divisor <= 255) { mn10300_serial_change_speed()
1205 tmxbr = port->uart.custom_divisor; mn10300_serial_change_speed()
1206 port->uart.uartclk = ioclk; mn10300_serial_change_speed()
1209 if (port->uart.custom_divisor / 8 <= 255) { mn10300_serial_change_speed()
1211 tmxbr = port->uart.custom_divisor / 8; mn10300_serial_change_speed()
1212 port->uart.custom_divisor = tmxbr * 8; mn10300_serial_change_speed()
1213 port->uart.uartclk = ioclk / 8; mn10300_serial_change_speed()
1216 if (port->uart.custom_divisor / 32 <= 255) { mn10300_serial_change_speed()
1218 tmxbr = port->uart.custom_divisor / 32; mn10300_serial_change_speed()
1219 port->uart.custom_divisor = tmxbr * 32; mn10300_serial_change_speed()
1220 port->uart.uartclk = ioclk / 32; mn10300_serial_change_speed()
1228 port->uart.uartclk = ioclk; mn10300_serial_change_speed()
1234 port->uart.uartclk = ioclk / 8; mn10300_serial_change_speed()
1240 port->uart.uartclk = ioclk / 32; mn10300_serial_change_speed()
1248 port->uart.uartclk = ioclk; mn10300_serial_change_speed()
1254 port->uart.uartclk = ioclk / 8; mn10300_serial_change_speed()
1260 port->uart.uartclk = ioclk / 32; mn10300_serial_change_speed()
1306 port->uart.uartclk = ioclk / 32; mn10300_serial_change_speed()
1311 _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr); mn10300_serial_change_speed()
1314 spin_lock_irqsave(&port->uart.lock, flags); mn10300_serial_change_speed()
1316 uart_update_timeout(&port->uart, new->c_cflag, baud); mn10300_serial_change_speed()
1351 port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN); mn10300_serial_change_speed()
1353 port->uart.read_status_mask |= mn10300_serial_change_speed()
1356 port->uart.read_status_mask |= (1 << TTY_BREAK); mn10300_serial_change_speed()
1359 port->uart.ignore_status_mask = 0; mn10300_serial_change_speed()
1361 port->uart.ignore_status_mask |= mn10300_serial_change_speed()
1364 port->uart.ignore_status_mask |= (1 << TTY_BREAK); mn10300_serial_change_speed()
1370 port->uart.ignore_status_mask |= (1 << TTY_OVERRUN); mn10300_serial_change_speed()
1375 port->uart.ignore_status_mask |= (1 << TTY_NORMAL); mn10300_serial_change_speed()
1381 spin_unlock_irqrestore(&port->uart.lock, flags); mn10300_serial_change_speed()
1392 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_set_termios()
1418 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_type()
1420 if (port->uart.type == PORT_MN10300_CTS) mn10300_serial_type()
1432 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_release_port()
1445 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_request_port()
1459 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_config_port()
1463 port->uart.type = PORT_MN10300; mn10300_serial_config_port()
1466 port->uart.type = PORT_MN10300_CTS; mn10300_serial_config_port()
1478 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_verify_port()
1479 void *mapbase = (void *) (unsigned long) port->uart.mapbase; mn10300_serial_verify_port()
1484 if (ss->irq != port->uart.irq || mn10300_serial_verify_port()
1485 ss->port != port->uart.iobase || mn10300_serial_verify_port()
1486 ss->io_type != port->uart.iotype || mn10300_serial_verify_port()
1488 ss->iomem_reg_shift != port->uart.regshift || mn10300_serial_verify_port()
1489 ss->hub6 != port->uart.hub6 || mn10300_serial_verify_port()
1490 ss->xmit_fifo_size != port->uart.fifosize) mn10300_serial_verify_port()
1494 if (ss->type != port->uart.type) { mn10300_serial_verify_port()
1550 &port->uart); mn10300_serial_init()
1588 if (port->uart.sysrq) { mn10300_serial_console_write()
1592 locked = spin_trylock(&port->uart.lock); mn10300_serial_console_write()
1594 spin_lock(&port->uart.lock); mn10300_serial_console_write()
1654 spin_unlock(&port->uart.lock); mn10300_serial_console_write()
1672 if (port && !port->gdbstub && port->uart.line == co->index) mn10300_serial_console_setup()
1696 return uart_set_options(&port->uart, co, baud, parity, bits, flow); mn10300_serial_console_setup()
1718 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_poll_get_char()
1759 container_of(_port, struct mn10300_serial_port, uart); mn10300_serial_poll_put_char()
H A Dasm-offsets.c94 OFFSET(__uart_state, mn10300_serial_port, uart.state); foo()
H A Dmn10300-serial.h69 struct uart_port uart; member in struct:mn10300_serial_port
H A Dgdb-io-ttysm.c157 gdbstub_port->uart.timeout = (2 * bits * HZ) / baud; gdbstub_io_set_baud()
158 gdbstub_port->uart.timeout += HZ / 50; gdbstub_io_set_baud()
/linux-4.1.27/arch/mips/sgi-ip27/
H A Dip27-console.c35 struct ioc3_uartregs *uart = console_uart(); prom_putchar() local
37 while ((uart->iu_lsr & 0x20) == 0); prom_putchar()
38 uart->iu_thr = c; prom_putchar()
/linux-4.1.27/arch/arm/plat-samsung/
H A Ddev-uart.c1 /* linux/arch/arm/plat-samsung/dev-uart.c
20 /* uart devices */
H A Dinit.c92 /* uart management */
117 int uart; s3c24xx_init_uartdevs() local
121 for (uart = 0; uart < no; uart++, cfg++, cfgptr++) { s3c24xx_init_uartdevs()
126 s3c24xx_uart_devs[uart] = platdev; s3c24xx_init_uartdevs()
145 printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n"); s3c24xx_init_uarts()
H A Dpm-debug.c52 /* restart uart clocks so we can use them to output */ s3c_pm_debug_init()
/linux-4.1.27/arch/m32r/platforms/oaks32r/
H A Dsetup.c89 /* SIO0_R : uart receive data */ init_IRQ()
95 /* SIO0_S : uart send data */ init_IRQ()
101 /* SIO1_R : uart receive data */ init_IRQ()
107 /* SIO1_S : uart send data */ init_IRQ()
/linux-4.1.27/drivers/clk/samsung/
H A Dclk-s3c2410.c221 ALIAS(PCLK_UART0, "s3c2410-uart.0", "uart"),
222 ALIAS(PCLK_UART1, "s3c2410-uart.1", "uart"),
223 ALIAS(PCLK_UART2, "s3c2410-uart.2", "uart"),
224 ALIAS(PCLK_UART0, "s3c2410-uart.0", "clk_uart_baud0"),
225 ALIAS(PCLK_UART1, "s3c2410-uart.1", "clk_uart_baud0"),
226 ALIAS(PCLK_UART2, "s3c2410-uart.2", "clk_uart_baud0"),
309 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
310 ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"),
311 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"),
312 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
313 ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"),
314 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
H A Dclk-s3c2412.c187 ALIAS(PCLK_UART0, "s3c2412-uart.0", "uart"),
188 ALIAS(PCLK_UART1, "s3c2412-uart.1", "uart"),
189 ALIAS(PCLK_UART2, "s3c2412-uart.2", "uart"),
190 ALIAS(PCLK_UART0, "s3c2412-uart.0", "clk_uart_baud2"),
191 ALIAS(PCLK_UART1, "s3c2412-uart.1", "clk_uart_baud2"),
192 ALIAS(PCLK_UART2, "s3c2412-uart.2", "clk_uart_baud2"),
H A Dclk-s3c2443.c196 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
197 ALIAS(PCLK_UART1, "s3c2440-uart.1", "uart"),
198 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"),
199 ALIAS(PCLK_UART3, "s3c2440-uart.3", "uart"),
200 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
201 ALIAS(PCLK_UART1, "s3c2440-uart.1", "clk_uart_baud2"),
202 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
203 ALIAS(PCLK_UART3, "s3c2440-uart.3", "clk_uart_baud2"),
H A Dclk-s3c64xx.c413 ALIAS(PCLK_UART3, "s3c6400-uart.3", "uart"),
414 ALIAS(PCLK_UART2, "s3c6400-uart.2", "uart"),
415 ALIAS(PCLK_UART1, "s3c6400-uart.1", "uart"),
416 ALIAS(PCLK_UART0, "s3c6400-uart.0", "uart"),
/linux-4.1.27/arch/arm/mach-s3c24xx/include/mach/
H A Ddma.h43 DMACH_UART0_SRC2, /* s3c2412 second uart sources */
46 DMACH_UART3, /* s3c2443 has extra uart */
H A Dmap.h38 #define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
H A Dpm-core.h23 /* re-start uart clocks */ s3c_pm_debug_init_uart()
/linux-4.1.27/arch/arm/include/debug/
H A Dimx.S14 #include "imx-uart.h"
20 * for low-level debug uart port across platforms.
H A Domap2plus.S141 /* AM33XX: Store both phys and virt address for the uart */
152 /* Store both phys and virt address for the uart */
H A Dtegra.S54 #define checkuart(rp, rv, lhu, bit, uart) \
72 ldr rp, =TEGRA_UART##uart##_BASE ; \
/linux-4.1.27/arch/mips/boot/compressed/
H A Ddbg.c4 * NOTE: putc() is board specific, if your board have a 16550 compatible uart,
H A DMakefile32 targets := head.o decompress.o string.o dbg.o uart-16550.o uart-alchemy.o
39 vmlinuzobjs-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o
40 vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o
H A Duart-16550.c2 * 16550 compatible uart based serial debug support for zboot
/linux-4.1.27/include/linux/
H A Dnwpserial.h2 * Serial Port driver for a NWP uart device
H A Dserial_s3c.h250 /* Default values for s5pv210 UCON and UFCON uart registers */
277 upf_t uart_flags; /* default uart flags */
H A Dserial_core.h139 unsigned int uartclk; /* base uart clock */
376 int uart_register_driver(struct uart_driver *uart);
377 void uart_unregister_driver(struct uart_driver *uart);
/linux-4.1.27/arch/arm/plat-samsung/include/plat/
H A Dirq-uart.h1 /* arch/arm/plat-samsung/include/plat/irq-uart.h
/linux-4.1.27/arch/powerpc/boot/
H A Dserial.c125 else if (dt_is_compatible(devp, "fsl,cpm1-scc-uart") || serial_console_init()
126 dt_is_compatible(devp, "fsl,cpm1-smc-uart") || serial_console_init()
127 dt_is_compatible(devp, "fsl,cpm2-scc-uart") || serial_console_init()
128 dt_is_compatible(devp, "fsl,cpm2-smc-uart")) serial_console_init()
130 else if (dt_is_compatible(devp, "fsl,mpc5200-psc-uart")) serial_console_init()
H A Dmpc52xx-psc.c31 * uart mode */ psc_open()
H A Dcpm-serial.c207 if (dt_is_compatible(devp, "fsl,cpm1-smc-uart")) { cpm_console_init()
209 } else if (dt_is_compatible(devp, "fsl,cpm2-scc-uart")) { cpm_console_init()
211 } else if (dt_is_compatible(devp, "fsl,cpm2-smc-uart")) { cpm_console_init()
H A Dcuboot-hotfoot.c29 u32 uart = mfdcr(DCRN_CPC0_UCR) & 0x7f; hotfoot_fixups() local
37 dt_fixup_clock("/plb/opb/serial@ef600300", bd.bi_procfreq / uart); hotfoot_fixups()
38 dt_fixup_clock("/plb/opb/serial@ef600400", bd.bi_procfreq / uart); hotfoot_fixups()
/linux-4.1.27/arch/m68k/coldfire/
H A Dm5441x.c187 &__clk_1_24, /* uart 4 */
188 &__clk_1_25, /* uart 5 */
189 &__clk_1_26, /* uart 6 */
190 &__clk_1_27, /* uart 7 */
191 &__clk_1_28, /* uart 8 */
192 &__clk_1_29, /* uart 9 */
/linux-4.1.27/arch/arm/mach-imx/
H A Dclk-imx1.c86 clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.0"); mx1_clocks_init()
87 clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx1-uart.0"); mx1_clocks_init()
88 clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.1"); mx1_clocks_init()
89 clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx1-uart.1"); mx1_clocks_init()
90 clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.2"); mx1_clocks_init()
91 clk_register_clkdev(clk[IMX1_CLK_UART3_GATE], "ipg", "imx1-uart.2"); mx1_clocks_init()
H A Dclk-imx27.c170 clk_register_clkdev(clk[IMX27_CLK_UART1_IPG_GATE], "ipg", "imx21-uart.0"); mx27_clocks_init()
171 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.0"); mx27_clocks_init()
172 clk_register_clkdev(clk[IMX27_CLK_UART2_IPG_GATE], "ipg", "imx21-uart.1"); mx27_clocks_init()
173 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.1"); mx27_clocks_init()
174 clk_register_clkdev(clk[IMX27_CLK_UART3_IPG_GATE], "ipg", "imx21-uart.2"); mx27_clocks_init()
175 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.2"); mx27_clocks_init()
176 clk_register_clkdev(clk[IMX27_CLK_UART4_IPG_GATE], "ipg", "imx21-uart.3"); mx27_clocks_init()
177 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.3"); mx27_clocks_init()
178 clk_register_clkdev(clk[IMX27_CLK_UART5_IPG_GATE], "ipg", "imx21-uart.4"); mx27_clocks_init()
179 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.4"); mx27_clocks_init()
180 clk_register_clkdev(clk[IMX27_CLK_UART6_IPG_GATE], "ipg", "imx21-uart.5"); mx27_clocks_init()
181 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.5"); mx27_clocks_init()
H A Dclk-imx31.c153 /* i.mx31 has the i.mx21 type uart */ mx31_clocks_init()
154 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); mx31_clocks_init()
155 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); mx31_clocks_init()
156 clk_register_clkdev(clk[uart2_gate], "per", "imx21-uart.1"); mx31_clocks_init()
157 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1"); mx31_clocks_init()
158 clk_register_clkdev(clk[uart3_gate], "per", "imx21-uart.2"); mx31_clocks_init()
159 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2"); mx31_clocks_init()
160 clk_register_clkdev(clk[uart4_gate], "per", "imx21-uart.3"); mx31_clocks_init()
161 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3"); mx31_clocks_init()
162 clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4"); mx31_clocks_init()
163 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4"); mx31_clocks_init()
H A Dclk-imx21.c128 clk_register_clkdev(clk[IMX21_CLK_PER1], "per", "imx21-uart.0"); mx21_clocks_init()
129 clk_register_clkdev(clk[IMX21_CLK_UART1_IPG_GATE], "ipg", "imx21-uart.0"); mx21_clocks_init()
130 clk_register_clkdev(clk[IMX21_CLK_PER1], "per", "imx21-uart.1"); mx21_clocks_init()
131 clk_register_clkdev(clk[IMX21_CLK_UART2_IPG_GATE], "ipg", "imx21-uart.1"); mx21_clocks_init()
132 clk_register_clkdev(clk[IMX21_CLK_PER1], "per", "imx21-uart.2"); mx21_clocks_init()
133 clk_register_clkdev(clk[IMX21_CLK_UART3_IPG_GATE], "ipg", "imx21-uart.2"); mx21_clocks_init()
134 clk_register_clkdev(clk[IMX21_CLK_PER1], "per", "imx21-uart.3"); mx21_clocks_init()
135 clk_register_clkdev(clk[IMX21_CLK_UART4_IPG_GATE], "ipg", "imx21-uart.3"); mx21_clocks_init()
H A Dmach-bug.c47 ARRAY_SIZE(bug_pins), "uart-4"); bug_board_init()
H A Dclk-imx35.c236 /* i.mx35 has the i.mx21 type uart */ mx35_clocks_init()
237 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); mx35_clocks_init()
238 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); mx35_clocks_init()
239 clk_register_clkdev(clk[uart2_gate], "per", "imx21-uart.1"); mx35_clocks_init()
240 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1"); mx35_clocks_init()
241 clk_register_clkdev(clk[uart3_gate], "per", "imx21-uart.2"); mx35_clocks_init()
242 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2"); mx35_clocks_init()
/linux-4.1.27/drivers/input/misc/
H A Drb532_button.c20 * pin is also used for uart input as alternate function, the
22 * 1) disable uart using set_latch_u5()
28 * 5) turn on uart again
/linux-4.1.27/arch/arm/mach-imx/devices/
H A Dplatform-imx-uart.c109 return imx_add_platform_device("imx1-uart", data->id, res, imx_add_imx_uart_3irq()
129 /* i.mx21 type uart runs on all i.mx except i.mx1 */ imx_add_imx_uart_1irq()
130 return imx_add_platform_device("imx21-uart", data->id, imx_add_imx_uart_1irq()
H A DMakefile17 obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o
/linux-4.1.27/arch/arm/mach-mmp/
H A Dclock-pxa168.c65 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
66 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
67 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
H A Dclock-mmp2.c90 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
91 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
92 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
93 INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL),
H A Dclock-pxa910.c50 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
51 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
H A Dmmp2.c140 MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5);
141 MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21);
142 MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23);
143 MMP2_DEVICE(uart4, "pxa2xx-uart", 3, UART4, 0xd4016000, 0x30, 18, 19);
H A Dpxa168.c95 PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
96 PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
97 PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
H A Dpxa910.c135 PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
136 PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
/linux-4.1.27/arch/m32r/platforms/mappi/
H A Dsetup.c90 /* SIO0_R : uart receive data */ init_IRQ()
96 /* SIO0_S : uart send data */ init_IRQ()
102 /* SIO1_R : uart receive data */ init_IRQ()
108 /* SIO1_S : uart send data */ init_IRQ()
/linux-4.1.27/arch/m32r/platforms/mappi2/
H A Dsetup.c91 /* SIO0_R : uart receive data */ init_IRQ()
97 /* SIO0_S : uart send data */ init_IRQ()
102 /* SIO1_R : uart receive data */ init_IRQ()
108 /* SIO1_S : uart send data */ init_IRQ()
/linux-4.1.27/arch/m32r/platforms/mappi3/
H A Dsetup.c90 /* SIO0_R : uart receive data */ init_IRQ()
96 /* SIO0_S : uart send data */ init_IRQ()
101 /* SIO1_R : uart receive data */ init_IRQ()
107 /* SIO1_S : uart send data */ init_IRQ()
/linux-4.1.27/arch/arm/mach-ks8695/include/mach/
H A Duncompress.h18 #include <mach/regs-uart.h>
H A Dregs-uart.h2 * arch/arm/mach-ks8695/include/mach/regs-uart.h
/linux-4.1.27/drivers/tty/serial/cpm_uart/
H A Dcpm_uart_core.c4 * Based on arch/ppc/cpm2_io/uart.c by Dan Malek
99 pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret); cpm_uart_tx_empty()
155 pr_debug("CPM uart[%d]:stop tx\n", port->line); cpm_uart_stop_tx()
173 pr_debug("CPM uart[%d]:start tx\n", port->line); cpm_uart_start_tx()
202 pr_debug("CPM uart[%d]:stop rx\n", port->line); cpm_uart_stop_rx()
218 pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line, cpm_uart_break_ctl()
232 pr_debug("CPM uart[%d]:TX INT\n", port->line); cpm_uart_int_tx()
256 pr_debug("CPM uart[%d]:RX INT\n", port->line); cpm_uart_int_rx()
381 pr_debug("CPM uart[%d]:IRQ\n", port->line); cpm_uart_int()
411 pr_debug("CPM uart[%d]:startup\n", port->line); cpm_uart_startup()
450 * Shutdown the uart
457 pr_debug("CPM uart[%d]:shutdown\n", port->line); cpm_uart_shutdown()
511 pr_debug("CPM uart[%d]:set_termios\n", port->line); cpm_uart_set_termios()
657 pr_debug("CPM uart[%d]:uart_type\n", port->line); cpm_uart_type()
670 pr_debug("CPM uart[%d]:verify_port\n", port->line); cpm_uart_verify_port()
766 pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line); cpm_uart_initbd()
804 pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line); cpm_uart_init_scc()
815 /* Set up the uart parameters in the cpm_uart_init_scc()
866 pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line); cpm_uart_init_smc()
889 /* Set up the uart parameters in the cpm_uart_init_smc()
925 pr_debug("CPM uart[%d]:request port\n", port->line); cpm_uart_request_port()
966 pr_debug("CPM uart[%d]:config_port\n", port->line); cpm_uart_config_port()
1052 /* Serial polling routines for writing and reading from the uart while
1187 if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") || cpm_uart_init_port()
1188 of_device_is_compatible(np, "fsl,cpm2-scc-uart")) { cpm_uart_init_port()
1191 } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") || cpm_uart_init_port()
1192 of_device_is_compatible(np, "fsl,cpm2-smc-uart")) { cpm_uart_init_port()
1319 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") && cpm_uart_console_setup()
1320 !of_device_is_compatible(np, "fsl,cpm1-scc-uart") && cpm_uart_console_setup()
1321 !of_device_is_compatible(np, "fsl,cpm2-smc-uart") && cpm_uart_console_setup()
1322 !of_device_is_compatible(np, "fsl,cpm2-scc-uart")) cpm_uart_console_setup()
1440 .compatible = "fsl,cpm1-smc-uart",
1443 .compatible = "fsl,cpm1-scc-uart",
1446 .compatible = "fsl,cpm2-smc-uart",
1449 .compatible = "fsl,cpm2-scc-uart",
H A Dcpm_uart_cpm1.c83 pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); cpm_uart_allocbuf()
H A Dcpm_uart_cpm2.c118 pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); cpm_uart_allocbuf()
/linux-4.1.27/arch/tile/gxio/
H A Duart.c23 #include <gxio/uart.h>
33 snprintf(file, sizeof(file), "uart/%d/iorpc", uart_index); gxio_uart_init()
/linux-4.1.27/drivers/clk/
H A Dclk-bcm2835.c49 ret = clk_register_clkdev(clk, NULL, "20201000.uart"); bcm2835_init_clocks()
57 ret = clk_register_clkdev(clk, NULL, "20215000.uart"); bcm2835_init_clocks()
H A Dclk-clps711x.c139 clk_register_fixed_factor(NULL, "uart", "bus", 0, 1, 10); _clps711x_clk_init()
169 NULL, "clps711x-uart.0"); clps711x_clk_init()
171 NULL, "clps711x-uart.1"); clps711x_clk_init()
/linux-4.1.27/arch/mips/ath79/
H A Ddev-common.c71 .name = "ar933x-uart",
81 uart_clk_rate = ath79_get_sys_clk_rate("uart"); ath79_register_uart()
H A Dclock.c83 clk_add_alias("uart", NULL, "ahb", NULL); ar71xx_clocks_init()
119 clk_add_alias("uart", NULL, "ahb", NULL); ar724x_clocks_init()
152 clk_add_alias("uart", NULL, "ahb", NULL); ar913x_clocks_init()
214 clk_add_alias("uart", NULL, "ref", NULL); ar933x_clocks_init()
348 clk_add_alias("uart", NULL, "ref", NULL); ar934x_clocks_init()
435 clk_add_alias("uart", NULL, "ref", NULL); qca955x_clocks_init()
/linux-4.1.27/drivers/usb/serial/
H A Dwhiteheat.h180 #define WHITEHEAT_TEST_UART_RW 0x01 /* read/write uart registers */
181 #define WHITEHEAT_TEST_UART_INTR 0x02 /* uart interrupt */
186 #define WHITEHEAT_TEST_UART_CLK_START 0x06 /* uart clock test start */
187 #define WHITEHEAT_TEST_UART_CLK_STOP 0x07 /* uart clock test stop */
229 __u8 modem; /* modem signal status (copy of uart's
231 __u8 error; /* line status (copy of uart's LSR register) */
243 __u8 mcr; /* copy of uart's MCR register */
H A Dssu100.c89 unsigned short uart, ssu100_getregister()
95 uart, data, sizeof(*data), 300); ssu100_getregister()
101 unsigned short uart, ssu100_setregister()
108 QT_SET_GET_REGISTER, 0x40, value, uart, ssu100_setregister()
250 dev_dbg(&port->dev, "%s - set uart failed\n", __func__); ssu100_set_termios()
308 dev_dbg(&port->dev, "%s - set uart failed\n", __func__); ssu100_open()
88 ssu100_getregister(struct usb_device *dev, unsigned short uart, unsigned short reg, u8 *data) ssu100_getregister() argument
100 ssu100_setregister(struct usb_device *dev, unsigned short uart, unsigned short reg, u16 data) ssu100_setregister() argument
/linux-4.1.27/arch/arm/mach-s3c24xx/
H A Ds3c2410.c60 /* our uart devices */
62 /* uart registration process */
66 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no); s3c2410_init_uarts()
H A Ds3c244x.c55 /* uart initialisation */
59 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); s3c244x_init_uarts()
H A Ds3c2412.c82 /* uart registration process */
86 s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no); s3c2412_init_uarts()
H A Ds3c2443.c83 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); s3c2443_init_uarts()
/linux-4.1.27/arch/arm/mach-netx/
H A Dnxdb500.c142 .name = "netx-uart",
162 .name = "netx-uart",
182 .name = "netx-uart",
H A Dnxdkn.c78 .name = "netx-uart",
H A Dnxeb500hmi.c160 .name = "netx-uart",
/linux-4.1.27/arch/mips/include/asm/octeon/
H A Dcvmx-ciu-defs.h1300 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_s
1308 uint64_t uart:2;
1346 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_cn30xx
1354 uint64_t uart:2;
1389 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_cn31xx
1397 uint64_t uart:2;
1428 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_cn38xx
1436 uint64_t uart:2;
1472 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_cn52xx
1480 uint64_t uart:2;
1521 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_cn56xx
1529 uint64_t uart:2;
1572 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_cn61xx
1580 uint64_t uart:2;
1623 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_cn66xx
1631 uint64_t uart:2;
1673 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0::cvmx_ciu_intx_en0_cnf71xx
1681 uint64_t uart:2;
1727 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1c::cvmx_ciu_intx_en0_w1c_s
1735 uint64_t uart:2;
1776 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1c::cvmx_ciu_intx_en0_w1c_cn52xx
1784 uint64_t uart:2;
1824 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1c::cvmx_ciu_intx_en0_w1c_cn56xx
1832 uint64_t uart:2;
1865 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1c::cvmx_ciu_intx_en0_w1c_cn58xx
1873 uint64_t uart:2;
1907 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1c::cvmx_ciu_intx_en0_w1c_cn61xx
1915 uint64_t uart:2;
1958 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1c::cvmx_ciu_intx_en0_w1c_cn66xx
1966 uint64_t uart:2;
2008 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1c::cvmx_ciu_intx_en0_w1c_cnf71xx
2016 uint64_t uart:2;
2062 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1s::cvmx_ciu_intx_en0_w1s_s
2070 uint64_t uart:2;
2111 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1s::cvmx_ciu_intx_en0_w1s_cn52xx
2119 uint64_t uart:2;
2159 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1s::cvmx_ciu_intx_en0_w1s_cn56xx
2167 uint64_t uart:2;
2200 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1s::cvmx_ciu_intx_en0_w1s_cn58xx
2208 uint64_t uart:2;
2242 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1s::cvmx_ciu_intx_en0_w1s_cn61xx
2250 uint64_t uart:2;
2293 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1s::cvmx_ciu_intx_en0_w1s_cn66xx
2301 uint64_t uart:2;
2343 uint64_t uart:2; member in struct:cvmx_ciu_intx_en0_w1s::cvmx_ciu_intx_en0_w1s_cnf71xx
2351 uint64_t uart:2;
3676 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0::cvmx_ciu_intx_en4_0_s
3684 uint64_t uart:2;
3722 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0::cvmx_ciu_intx_en4_0_cn50xx
3730 uint64_t uart:2;
3768 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0::cvmx_ciu_intx_en4_0_cn52xx
3776 uint64_t uart:2;
3817 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0::cvmx_ciu_intx_en4_0_cn56xx
3825 uint64_t uart:2;
3859 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0::cvmx_ciu_intx_en4_0_cn58xx
3867 uint64_t uart:2;
3902 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0::cvmx_ciu_intx_en4_0_cn61xx
3910 uint64_t uart:2;
3953 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0::cvmx_ciu_intx_en4_0_cn66xx
3961 uint64_t uart:2;
4003 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0::cvmx_ciu_intx_en4_0_cnf71xx
4011 uint64_t uart:2;
4057 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1c::cvmx_ciu_intx_en4_0_w1c_s
4065 uint64_t uart:2;
4106 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1c::cvmx_ciu_intx_en4_0_w1c_cn52xx
4114 uint64_t uart:2;
4154 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1c::cvmx_ciu_intx_en4_0_w1c_cn56xx
4162 uint64_t uart:2;
4195 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1c::cvmx_ciu_intx_en4_0_w1c_cn58xx
4203 uint64_t uart:2;
4237 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1c::cvmx_ciu_intx_en4_0_w1c_cn61xx
4245 uint64_t uart:2;
4288 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1c::cvmx_ciu_intx_en4_0_w1c_cn66xx
4296 uint64_t uart:2;
4338 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1c::cvmx_ciu_intx_en4_0_w1c_cnf71xx
4346 uint64_t uart:2;
4392 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1s::cvmx_ciu_intx_en4_0_w1s_s
4400 uint64_t uart:2;
4441 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1s::cvmx_ciu_intx_en4_0_w1s_cn52xx
4449 uint64_t uart:2;
4489 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1s::cvmx_ciu_intx_en4_0_w1s_cn56xx
4497 uint64_t uart:2;
4530 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1s::cvmx_ciu_intx_en4_0_w1s_cn58xx
4538 uint64_t uart:2;
4572 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1s::cvmx_ciu_intx_en4_0_w1s_cn61xx
4580 uint64_t uart:2;
4623 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1s::cvmx_ciu_intx_en4_0_w1s_cn66xx
4631 uint64_t uart:2;
4673 uint64_t uart:2; member in struct:cvmx_ciu_intx_en4_0_w1s::cvmx_ciu_intx_en4_0_w1s_cnf71xx
4681 uint64_t uart:2;
5994 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_s
6002 uint64_t uart:2;
6040 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_cn30xx
6048 uint64_t uart:2;
6083 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_cn31xx
6091 uint64_t uart:2;
6122 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_cn38xx
6130 uint64_t uart:2;
6166 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_cn52xx
6174 uint64_t uart:2;
6215 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_cn56xx
6223 uint64_t uart:2;
6266 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_cn61xx
6274 uint64_t uart:2;
6317 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_cn66xx
6325 uint64_t uart:2;
6367 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum0::cvmx_ciu_intx_sum0_cnf71xx
6375 uint64_t uart:2;
6421 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum4::cvmx_ciu_intx_sum4_s
6429 uint64_t uart:2;
6467 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum4::cvmx_ciu_intx_sum4_cn50xx
6475 uint64_t uart:2;
6513 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum4::cvmx_ciu_intx_sum4_cn52xx
6521 uint64_t uart:2;
6562 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum4::cvmx_ciu_intx_sum4_cn56xx
6570 uint64_t uart:2;
6604 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum4::cvmx_ciu_intx_sum4_cn58xx
6612 uint64_t uart:2;
6647 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum4::cvmx_ciu_intx_sum4_cn61xx
6655 uint64_t uart:2;
6698 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum4::cvmx_ciu_intx_sum4_cn66xx
6706 uint64_t uart:2;
6748 uint64_t uart:2; member in struct:cvmx_ciu_intx_sum4::cvmx_ciu_intx_sum4_cnf71xx
6756 uint64_t uart:2;
6802 uint64_t uart:2; member in struct:cvmx_ciu_int33_sum0::cvmx_ciu_int33_sum0_s
6810 uint64_t uart:2;
6852 uint64_t uart:2; member in struct:cvmx_ciu_int33_sum0::cvmx_ciu_int33_sum0_cn63xx
6860 uint64_t uart:2;
6902 uint64_t uart:2; member in struct:cvmx_ciu_int33_sum0::cvmx_ciu_int33_sum0_cn66xx
6910 uint64_t uart:2;
6952 uint64_t uart:2; member in struct:cvmx_ciu_int33_sum0::cvmx_ciu_int33_sum0_cnf71xx
6960 uint64_t uart:2;
H A Dcvmx-ciu2-defs.h519 uint64_t uart:2; member in struct:cvmx_ciu2_en_iox_int_mio::cvmx_ciu2_en_iox_int_mio_s
545 uint64_t uart:2;
572 uint64_t uart:2; member in struct:cvmx_ciu2_en_iox_int_mio_w1c::cvmx_ciu2_en_iox_int_mio_w1c_s
598 uint64_t uart:2;
625 uint64_t uart:2; member in struct:cvmx_ciu2_en_iox_int_mio_w1s::cvmx_ciu2_en_iox_int_mio_w1s_s
651 uint64_t uart:2;
1506 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip2_mio::cvmx_ciu2_en_ppx_ip2_mio_s
1532 uint64_t uart:2;
1559 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip2_mio_w1c::cvmx_ciu2_en_ppx_ip2_mio_w1c_s
1585 uint64_t uart:2;
1612 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip2_mio_w1s::cvmx_ciu2_en_ppx_ip2_mio_w1s_s
1638 uint64_t uart:2;
2493 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip3_mio::cvmx_ciu2_en_ppx_ip3_mio_s
2519 uint64_t uart:2;
2546 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip3_mio_w1c::cvmx_ciu2_en_ppx_ip3_mio_w1c_s
2572 uint64_t uart:2;
2599 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip3_mio_w1s::cvmx_ciu2_en_ppx_ip3_mio_w1s_s
2625 uint64_t uart:2;
3480 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip4_mio::cvmx_ciu2_en_ppx_ip4_mio_s
3506 uint64_t uart:2;
3533 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip4_mio_w1c::cvmx_ciu2_en_ppx_ip4_mio_w1c_s
3559 uint64_t uart:2;
3586 uint64_t uart:2; member in struct:cvmx_ciu2_en_ppx_ip4_mio_w1s::cvmx_ciu2_en_ppx_ip4_mio_w1s_s
3612 uint64_t uart:2;
4483 uint64_t uart:2; member in struct:cvmx_ciu2_raw_iox_int_mio::cvmx_ciu2_raw_iox_int_mio_s
4509 uint64_t uart:2;
4797 uint64_t uart:2; member in struct:cvmx_ciu2_raw_ppx_ip2_mio::cvmx_ciu2_raw_ppx_ip2_mio_s
4823 uint64_t uart:2;
5111 uint64_t uart:2; member in struct:cvmx_ciu2_raw_ppx_ip3_mio::cvmx_ciu2_raw_ppx_ip3_mio_s
5137 uint64_t uart:2;
5425 uint64_t uart:2; member in struct:cvmx_ciu2_raw_ppx_ip4_mio::cvmx_ciu2_raw_ppx_ip4_mio_s
5451 uint64_t uart:2;
5754 uint64_t uart:2; member in struct:cvmx_ciu2_src_iox_int_mio::cvmx_ciu2_src_iox_int_mio_s
5780 uint64_t uart:2;
6083 uint64_t uart:2; member in struct:cvmx_ciu2_src_ppx_ip2_mio::cvmx_ciu2_src_ppx_ip2_mio_s
6109 uint64_t uart:2;
6412 uint64_t uart:2; member in struct:cvmx_ciu2_src_ppx_ip3_mio::cvmx_ciu2_src_ppx_ip3_mio_s
6438 uint64_t uart:2;
6741 uint64_t uart:2; member in struct:cvmx_ciu2_src_ppx_ip4_mio::cvmx_ciu2_src_ppx_ip4_mio_s
6767 uint64_t uart:2;
/linux-4.1.27/drivers/staging/speakup/
H A Dserialio.h15 unsigned int uart; /* unused */ member in struct:old_serial_port
/linux-4.1.27/arch/tile/include/gxio/
H A Diorpc_uart.h22 #include <gxio/uart.h>
/linux-4.1.27/arch/tile/include/hv/
H A Ddrv_uart_intf.h22 #include <arch/uart.h>
/linux-4.1.27/include/linux/platform_data/
H A Dserial-omap.h29 * is used as console uart.
/linux-4.1.27/arch/mips/jz4740/
H A Dserial.c24 value |= 0x10; /* Enable uart module */ jz4740_serial_out()
/linux-4.1.27/arch/mips/loongson/common/
H A Dinit.c40 /*init the uart base address */ prom_init()
/linux-4.1.27/arch/m32r/platforms/usrv/
H A Dsetup.c146 /* SIO0_R : uart receive data */ init_IRQ()
152 /* SIO0_S : uart send data */ init_IRQ()
158 /* SIO1_R : uart receive data */ init_IRQ()
164 /* SIO1_S : uart send data */ init_IRQ()
/linux-4.1.27/arch/arm/mach-s3c64xx/
H A Ddev-uart.c1 /* linux/arch/arm/plat-s3c64xx/dev-uart.c
H A Dcommon.c51 #include <plat/irq-uart.h>
71 /* uart registration process */
75 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); s3c64xx_init_uarts()
103 /* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */
H A Dirq-pm.c115 /* Appropriate drivers (pinctrl, uart) handle this when using DT. */ s3c64xx_syscore_init()
/linux-4.1.27/arch/m32r/platforms/m32104ut/
H A Dsetup.c92 /* SIO0_R : uart receive data */ init_IRQ()
98 /* SIO0_S : uart send data */ init_IRQ()
/linux-4.1.27/arch/arm/mach-spear/include/mach/
H A Dspear.h40 /* Debug uart for linux, will be used for debug and uncompress messages */
86 /* Debug uart for linux, will be used for debug and uncompress messages */
/linux-4.1.27/arch/arm/mach-davinci/
H A Dserial.c39 WARN_ONCE(!p->membase, "unmapped write: uart[%d]\n", offset); serial_write_reg()
99 pr_err("uart regs ioremap failed\n"); davinci_serial_init()
/linux-4.1.27/drivers/char/mwave/
H A Dmwavedd.c433 struct uart_8250_port uart; register_serial_portandirq() local
465 memset(&uart, 0, sizeof(uart)); register_serial_portandirq()
467 uart.port.uartclk = 1843200; register_serial_portandirq()
468 uart.port.iobase = port; register_serial_portandirq()
469 uart.port.irq = irq; register_serial_portandirq()
470 uart.port.iotype = UPIO_PORT; register_serial_portandirq()
471 uart.port.flags = UPF_SHARE_IRQ; register_serial_portandirq()
472 return serial8250_register_8250_port(&uart); register_serial_portandirq()
662 /* uart is registered */ mwave_init()
H A Dsmapi.c303 "smapi::smapi_set_DSP_cfg: Serial port A base I/O address %x conflicts with mwave uart I/O %x\n", ausUartBases[usSI >> 8], ausUartBases[uartio_index]); smapi_set_DSP_cfg()
306 "smapi::smapi_set_DSP_cfg: Serial port A base I/O address %x conflicts with mwave uart I/O %x\n", ausUartBases[usSI >> 8], ausUartBases[uartio_index]); smapi_set_DSP_cfg()
356 "smapi::smapi_set_DSP_cfg: Serial port B base I/O address %x conflicts with mwave uart I/O %x\n", ausUartBases[usSI >> 8], ausUartBases[uartio_index]); smapi_set_DSP_cfg()
359 "smapi::smapi_set_DSP_cfg: Serial port B base I/O address %x conflicts with mwave uart I/O %x\n", ausUartBases[usSI >> 8], ausUartBases[uartio_index]); smapi_set_DSP_cfg()
417 "smapi::smapi_set_DSP_cfg: IR port base I/O address %x conflicts with mwave uart I/O %x\n", ausUartBases[usSI & 0xff], ausUartBases[uartio_index]); smapi_set_DSP_cfg()
420 "smapi::smapi_set_DSP_cfg: IR port base I/O address %x conflicts with mwave uart I/O %x\n", ausUartBases[usSI & 0xff], ausUartBases[uartio_index]); smapi_set_DSP_cfg()
/linux-4.1.27/arch/blackfin/mach-bf548/boards/
H A Dezkit.c291 .name = "bfin-uart",
362 .name = "bfin-uart",
417 .name = "bfin-uart",
488 .name = "bfin-uart",
725 .name = "bfin-sport-uart",
759 .name = "bfin-sport-uart",
793 .name = "bfin-sport-uart",
827 .name = "bfin-sport-uart",
2102 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.0", "pinctrl-adi2.0", NULL, "uart0"),
2103 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.1", "pinctrl-adi2.0", NULL, "uart1"),
2105 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.1", "pinctrl-adi2.0", NULL, "uart1_ctsrts"),
2107 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.2", "pinctrl-adi2.0", NULL, "uart2"),
2108 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.3", "pinctrl-adi2.0", NULL, "uart3"),
2110 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.3", "pinctrl-adi2.0", NULL, "uart3_ctsrts"),
2139 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sport-uart.0", "pinctrl-adi2.0", NULL, "sport0"),
2140 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sport-uart.1", "pinctrl-adi2.0", NULL, "sport1"),
2141 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sport-uart.2", "pinctrl-adi2.0", NULL, "sport2"),
2142 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sport-uart.3", "pinctrl-adi2.0", NULL, "sport3"),
H A Dcm_bf548.c169 .name = "bfin-uart",
233 .name = "bfin-uart",
281 .name = "bfin-uart",
345 .name = "bfin-uart",
582 .name = "bfin-sport-uart",
616 .name = "bfin-sport-uart",
650 .name = "bfin-sport-uart",
684 .name = "bfin-sport-uart",
/linux-4.1.27/arch/arm/mach-clps711x/
H A Ddevices.c94 platform_device_register_simple("clps711x-uart", 0, clps711x_uart1_res, clps711x_add_uart()
96 platform_device_register_simple("clps711x-uart", 1, clps711x_uart2_res, clps711x_add_uart()
/linux-4.1.27/drivers/clk/mxs/
H A Dclk-imx23.c92 clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif, enumerator in enum:imx23_clk
101 cpu, hbus, xbus, emi, uart,
151 clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31); mx23_clocks_init()
H A Dclk-imx28.c145 clk32k_div, rtc, lradc, spdif_div, clk32k, pwm, uart, ssp0, enumerator in enum:imx28_clk
155 cpu, hbus, xbus, emi, uart,
218 clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31); mx28_clocks_init()
/linux-4.1.27/drivers/clk/pxa/
H A Dclk-pxa25x.c126 PXA25X_PBUS147_CKEN("pxa2xx-uart.0", NULL, FFUART, 1, 10, 1),
127 PXA25X_PBUS147_CKEN("pxa2xx-uart.1", NULL, BTUART, 1, 10, 1),
128 PXA25X_PBUS147_CKEN("pxa2xx-uart.2", NULL, STUART, 1, 10, 1),
129 PXA25X_PBUS147_CKEN("pxa2xx-uart.3", NULL, HWUART, 1, 10, 1),
H A Dclk-pxa27x.c115 PXA27X_PBUS_CKEN("pxa2xx-uart.0", NULL, FFUART, 2, 42, 1),
116 PXA27X_PBUS_CKEN("pxa2xx-uart.1", NULL, BTUART, 2, 42, 1),
117 PXA27X_PBUS_CKEN("pxa2xx-uart.2", NULL, STUART, 2, 42, 1),
H A Dclk-pxa3xx.c144 PXA3XX_PBUS_CKEN("pxa2xx-uart.0", NULL, FFUART, 1, 4, 1, 42, 1),
145 PXA3XX_PBUS_CKEN("pxa2xx-uart.1", NULL, BTUART, 1, 4, 1, 42, 1),
146 PXA3XX_PBUS_CKEN("pxa2xx-uart.2", NULL, STUART, 1, 4, 1, 42, 1),
/linux-4.1.27/arch/blackfin/mach-bf537/boards/
H A Dminotaur.c272 .name = "bfin-uart",
320 .name = "bfin-uart",
439 .name = "bfin-sport-uart",
473 .name = "bfin-sport-uart",
H A Dtcm_bf537.c342 .name = "bfin-uart",
390 .name = "bfin-uart",
509 .name = "bfin-sport-uart",
543 .name = "bfin-sport-uart",
H A Dcm_bf537e.c425 .name = "bfin-uart",
491 .name = "bfin-uart",
610 .name = "bfin-sport-uart",
644 .name = "bfin-sport-uart",
H A Dcm_bf537u.c342 .name = "bfin-uart",
390 .name = "bfin-uart",
507 .name = "bfin-sport-uart",
541 .name = "bfin-sport-uart",
H A Ddnp5370.c271 .name = "bfin-uart",
320 .name = "bfin-uart",
H A Dpnav10.c340 .name = "bfin-uart",
388 .name = "bfin-uart",
/linux-4.1.27/include/linux/mfd/
H A Dmax77693.h53 * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB
/linux-4.1.27/arch/blackfin/mach-bf538/boards/
H A Dezkit.c95 .name = "bfin-uart",
143 .name = "bfin-uart",
191 .name = "bfin-uart",
306 .name = "bfin-sport-uart",
340 .name = "bfin-sport-uart",
374 .name = "bfin-sport-uart",
408 .name = "bfin-sport-uart",
/linux-4.1.27/arch/blackfin/include/asm/
H A Dbfin_serial.h269 #define port_membase(uart) (((struct bfin_serial_port *)(uart))->port.membase)
382 #define get_lsr_cache(uart) (((struct bfin_serial_port *)(uart))->lsr)
383 #define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))->lsr = (v))
/linux-4.1.27/arch/blackfin/kernel/
H A Dearly_printk.c127 if (!strncmp(buf, "serial,uart", 11)) { setup_early_printk()
205 /* This can happen before the uart is initialized, so initialize early_trap_c()
/linux-4.1.27/arch/arm/mach-sa1100/
H A Dhackkit.c98 * @port: uart port structure
105 /* TODO: switch on/off uart in powersave mode */ hackkit_uart_pm()
H A Dcerf.c42 .name = "sa11x0-uart",
H A Dgeneric.c139 .name = "sa11x0-uart",
151 .name = "sa11x0-uart",
/linux-4.1.27/drivers/clk/mmp/
H A Dclk-mmp2.c259 clk_register_clkdev(clk, NULL, "pxa2xx-uart.0"); mmp2_clk_init()
270 clk_register_clkdev(clk, NULL, "pxa2xx-uart.1"); mmp2_clk_init()
281 clk_register_clkdev(clk, NULL, "pxa2xx-uart.2"); mmp2_clk_init()
292 clk_register_clkdev(clk, NULL, "pxa2xx-uart.3"); mmp2_clk_init()
H A Dclk-pxa168.c210 clk_register_clkdev(clk, NULL, "pxa2xx-uart.0"); pxa168_clk_init()
221 clk_register_clkdev(clk, NULL, "pxa2xx-uart.1"); pxa168_clk_init()
232 clk_register_clkdev(clk, NULL, "pxa2xx-uart.2"); pxa168_clk_init()
H A Dclk-pxa910.c215 clk_register_clkdev(clk, NULL, "pxa2xx-uart.0"); pxa910_clk_init()
226 clk_register_clkdev(clk, NULL, "pxa2xx-uart.1"); pxa910_clk_init()
237 clk_register_clkdev(clk, NULL, "pxa2xx-uart.2"); pxa910_clk_init()
/linux-4.1.27/arch/mips/netlogic/common/
H A Dearlycons.c45 #include <asm/netlogic/xlp-hal/uart.h>
/linux-4.1.27/arch/mips/ralink/
H A Dmt7620.c118 FUNC("uart", 0, 20, 2),
125 FUNC("uart", 0, 45, 2),
151 FUNC("uart", 0, 12, 2),
408 ralink_clk_add("10000500.uart", periph_rate); ralink_clk_init()
H A Drt288x.c77 ralink_clk_add("300500.uart", cpu_rate / 2); ralink_clk_init()
H A Drt3883.c110 ralink_clk_add("10000500.uart", 40000000); ralink_clk_init()
/linux-4.1.27/arch/nios2/kernel/
H A Dprom.c96 if (strncmp(p, "altr,uart", 9) == 0) early_init_dt_scan_serial()
/linux-4.1.27/arch/blackfin/mach-bf518/boards/
H A Dtcm-bf518.c341 .name = "bfin-uart",
389 .name = "bfin-uart",
522 .name = "bfin-sport-uart",
556 .name = "bfin-sport-uart",
H A Dezbrd.c406 .name = "bfin-uart",
454 .name = "bfin-uart",
600 .name = "bfin-sport-uart",
634 .name = "bfin-sport-uart",
/linux-4.1.27/arch/blackfin/mach-bf561/boards/
H A Dtepla.c85 .name = "bfin-uart",
/linux-4.1.27/arch/arm/mach-omap1/include/mach/
H A Duncompress.h34 * Store the DEBUG_LL uart number into memory.
/linux-4.1.27/arch/blackfin/mach-bf533/boards/
H A Dblackstamp.c228 .name = "bfin-uart",
294 .name = "bfin-sport-uart",
328 .name = "bfin-sport-uart",
H A Dcm_bf533.c255 .name = "bfin-uart",
321 .name = "bfin-sport-uart",
355 .name = "bfin-sport-uart",
H A Dstamp.c334 .name = "bfin-uart",
400 .name = "bfin-sport-uart",
434 .name = "bfin-sport-uart",
/linux-4.1.27/arch/mips/cavium-octeon/
H A Docteon-platform.c738 /* Right now CN52XX is the only chip with a third uart */ octeon_prune_device_tree()
743 int uart; octeon_prune_device_tree() local
745 "uart%d", i); octeon_prune_device_tree()
750 uart = fdt_path_offset(initial_boot_params, alias_prop); octeon_prune_device_tree()
756 uart, "clock-frequency", octeon_prune_device_tree()
760 pr_debug("Deleting uart%d\n", i); octeon_prune_device_tree()
761 fdt_nop_node(initial_boot_params, uart); octeon_prune_device_tree()
/linux-4.1.27/drivers/net/hamradio/
H A Dbaycom_ser_fdx.c374 enum uart { c_uart_unknown, c_uart_8250, enum
380 static enum uart ser12_check_uart(unsigned int iobase) ser12_check_uart()
383 enum uart u; ser12_check_uart()
384 enum uart uart_tab[] = ser12_check_uart()
416 enum uart u; ser12_open()
472 printk(KERN_INFO "%s: ser_fdx at iobase 0x%lx irq %u baud %u uart %s\n", ser12_open()
H A Dbaycom_ser_hdx.c433 enum uart { c_uart_unknown, c_uart_8250, enum
439 static enum uart ser12_check_uart(unsigned int iobase) ser12_check_uart()
442 enum uart u; ser12_check_uart()
443 enum uart uart_tab[] = ser12_check_uart()
475 enum uart u; ser12_open()
508 printk(KERN_INFO "%s: ser12 at iobase 0x%lx irq %u uart %s\n", ser12_open()
H A Dyam.c243 #define ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */
244 #define ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */
501 enum uart { enum
509 static enum uart yam_check_uart(unsigned int iobase) yam_check_uart()
512 enum uart u; yam_check_uart()
513 enum uart uart_tab[] = yam_check_uart()
866 enum uart u; yam_open()
884 printk(KERN_ERR "%s: cannot find uart type\n", dev->name); yam_open()
914 printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq, yam_open()
/linux-4.1.27/drivers/misc/ti-st/
H A Dst_kim.c344 * Make sure we have enough free space in uart download_firmware()
354 "space info from uart tx buffer"); download_firmware()
365 "free space in uart tx buffer"); download_firmware()
375 * Free space found in uart buffer, call st_int_write download_firmware()
376 * to send current firmware command to the uart tx download_firmware()
387 * Check number of bytes written to the uart tx buffer download_firmware()
391 pr_err("Number of bytes written to uart " download_firmware()
501 * flush uart, power cycle BT_EN */ st_kim_start()
511 * flush uart & power cycle BT_EN */ st_kim_start()
/linux-4.1.27/drivers/mfd/
H A Dtimberdale.c386 .name = "timb-uart",
443 .name = "timb-uart",
510 .name = "timb-uart",
560 .name = "timb-uart",
/linux-4.1.27/drivers/ps3/
H A Dvuart.h2 * PS3 virtual uart
/linux-4.1.27/arch/unicore32/include/mach/
H A DPKUnity.h75 #include <mach/regs-uart.h>
/linux-4.1.27/arch/x86/boot/
H A Dearly_serial_console.c129 else if (!strncmp(options, "uart,io,", 8)) parse_console_uart8250()
/linux-4.1.27/arch/blackfin/mach-bf527/boards/
H A Dad7160eval.c404 .name = "bfin-uart",
464 .name = "bfin-uart",
623 .name = "bfin-sport-uart",
657 .name = "bfin-sport-uart",
H A Dcm_bf527.c571 .name = "bfin-uart",
631 .name = "bfin-uart",
769 .name = "bfin-sport-uart",
803 .name = "bfin-sport-uart",
H A Dezbrd.c450 .name = "bfin-uart",
510 .name = "bfin-uart",
643 .name = "bfin-sport-uart",
677 .name = "bfin-sport-uart",
H A Dtll6527m.c525 .name = "bfin-uart",
586 .name = "bfin-uart",
746 .name = "bfin-sport-uart",
781 .name = "bfin-sport-uart",
/linux-4.1.27/arch/arm/mach-spear/
H A Dspear310.c190 /* uart devices plat data */
/linux-4.1.27/arch/blackfin/mach-bf609/boards/
H A Dezkit.c281 .name = "bfin-uart",
352 .name = "bfin-uart",
498 .name = "bfin-sport-uart",
532 .name = "bfin-sport-uart",
566 .name = "bfin-sport-uart",
2126 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.0", "pinctrl-adi2.0", NULL, "uart0"),
2127 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.1", "pinctrl-adi2.0", NULL, "uart1"),
/linux-4.1.27/drivers/net/irda/
H A Dirtty-sir.c74 * If the tty sits on top of a 16550A-like uart, there are typically
77 * With usbserial the uart-fifo is basically replaced by the converter's
215 * serial.c: uart-interrupt / softint
/linux-4.1.27/drivers/ssb/
H A Ddriver_extif.c99 /* Set programmable interface timing for external uart */ ssb_extif_timing_init()

Completed in 3299 milliseconds

12